Patents by Inventor Chao Lai

Chao Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6498377
    Abstract: A nitride read only memory device that includes a substrate having a source region, a drain region, and a channel region formed therebetween, a first oxide layer formed over the channel region, a nitride layer formed over the first oxide layer, a second oxide layer formed over the nitride layer, a gate structure formed over the second oxide layer, wherein a region in the substrate underneath the gate structure excludes one of the source and drain regions, a plurality of sidewall spacers formed over the nitride layer and contiguous with the gate structure, and at least one injection point for injecting electrons into the nitride layer, wherein the injection point is located at a junction between the channel region and one of the source and drain regions, and wherein electron charges are stored in portions of the nitride layer underneath the sidewall spacers.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: December 24, 2002
    Assignee: Macronix International, Co., Ltd.
    Inventors: Hung-Sui Lin, Nian Kai Zous, Han Chao Lai, Tao Cheng Lu
  • Patent number: 6492235
    Abstract: A method for forming extension by using double etch spacer. The method includes at least the following steps. First a semiconductor substrate is provided. Then, the gate is formed on the substrate. A first spacer is formed on a sidewall of the gate. Then, numerous first ions are implanted in the substrate by a mask of both the gate and the first spacer to form the source/drain region. Then, the second spacer is formed by etching the first spacer, wherein the width of the second spacer is less than the width of the first spacer. Finally, numerous second ions are implanted in the substrate by a mask of both the gate and the second spacer to form an extension.
    Type: Grant
    Filed: January 26, 2001
    Date of Patent: December 10, 2002
    Assignee: Macronix International Co., Ltd.
    Inventors: Han-Chao Lai, Tao-Cheng Lu, Hung-Sui Lin
  • Patent number: 6482709
    Abstract: A manufacturing method of a MOS transistor. A gate oxide layer and a polysilicon layer are successively formed on a substrate. A nitrogen ion implantation is performed to implant nitrogen ions into the contact region of the polysilicon layer with the gate dielectric layer. An annealing is performed in order to enlarge the polysilicon grains within the polysilicon layer. The polysilicon layer is patterned to form a gate. A dopant is implanted into the substrate on the sides of the gate, thereby forming a source/drain region.
    Type: Grant
    Filed: July 6, 2001
    Date of Patent: November 19, 2002
    Assignee: Macronix International Co., Ltd.
    Inventors: Han-Chao Lai, Hung-Sui Lin, Tao-Cheng Lu
  • Publication number: 20020155686
    Abstract: A method of manufacturing a semiconductor device with a core device and an input/output (I/O) device on a semiconductor substrate has been developed. The semiconductor device, fabricated according to the present method, features the I/O device having graded dopant profiles, obtained from a transient enhanced diffusion effect for suppressing a hot carrier effect, and having pocket/halo implant region for decreasing leakage current.
    Type: Application
    Filed: April 24, 2001
    Publication date: October 24, 2002
    Inventors: Hung-Sui Lin, Han-Chao Lai, Yen-Hung Yeh, Tao-Cheng Lu
  • Patent number: 6458643
    Abstract: A semiconductor substrate is provided with at least a gate formed on the semiconductor substrate. A first ion implantation process is performed to form a pocket implant region within the semiconductor substrate beneath the gate. Following the first ion implantation process, a first rapid thermal annealing (RTA) process is immediately performed to reduce TED effects resulting from the first ion implantation process. Thereafter, a second implantation process is performed to form a source extension doping region and a drain extension doping region within the semiconductor substrate adjacent to the gate. A source doping region and a drain doping region are then formed within the semiconductor substrate adjacent to the gate. Finally, a second RTA process is performed to simultaneously activate dopants in the source extension doping region, the drain extension doping region, the source doping region and the drain doping region.
    Type: Grant
    Filed: July 3, 2001
    Date of Patent: October 1, 2002
    Assignee: Macronix International Co. Ltd.
    Inventors: Han-Chao Lai, Tao-Cheng Lu, Hung-Sui Lin
  • Patent number: 6455388
    Abstract: A method of fabricating a MOS transistor. First, a substrate having a gate electrode and spacers on the gate electrode sidewalls is provided. A source/drain region is formed in the substrate outside the outer edge of the spacer sidewalls. A self-aligned silicide layer is formed over the exposed surface of the gate electrode and the source/drain regions. A portion of the spacers is removed by etching to form a sharp-angled triangular spacer on the sidewalls of the gate electrode. A pocket implantation of the substrate is carried out to form a pocket region inside the substrate under the side edges of the gate electrode. By controlling the setting of the energy level and the implant angle in the pocket implantation, a precise distribution of the dopants at desired locations within the substrate is reproduced. Finally, the sharp-angled spacers are removed and then a light implantation is conducted to form source/drain extension regions in the substrate on each side of the gate electrode.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: September 24, 2002
    Assignee: Macronix International Co., Ltd.
    Inventors: Han-Chao Lai, Hung-Sui Lin, Tao-Cheng Lu
  • Patent number: 6448142
    Abstract: A fabrication method for a metal oxide semiconductor transistor is described. A source/drain implantation is conducted on a substrate beside the spacer that is on the sidewall of the gate to form a source/drain region in the substrate beside the spacer. A self-aligned silicide layer is further formed on the gate and the source/drain region. A portion of the spacer is removed to form a triangular spacer with a sharp corner, followed by performing a tilt angle implantation on the substrate to form a source/drain extension region in the substrate under the side of the gate and the spacer with the sharp corner. A thermal cycle is further conducted to adjust the junction depth and the dopant profile of the source/drain extension region.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: September 10, 2002
    Assignee: Macronix International Co., Ltd.
    Inventors: Han-Chao Lai, Hung-Sui Lin, Tao-Cheng Lu
  • Publication number: 20020102801
    Abstract: A method for forming extension by using double etch spacer. The method at least includes the following steps. First of all, provide a semiconductor substrate. Then, forms the gate on the substrate. A first spacer is formed on a sidewall of the gate. Then, numerous first ions are implanted to substrate by a mask of both the gate and the first spacer to form the source/drain region. Then, form the second spacer by etching the first spacer, wherein the width of the second spacer is less than the width of the first spacer. Finally, numerous second ions are implanted to substrate by a mask of both the gate and the second spacer to form an extension.
    Type: Application
    Filed: January 26, 2001
    Publication date: August 1, 2002
    Inventors: Han-Chao Lai, Tao-Cheng Lu, Hung-Sui Lin
  • Publication number: 20020086473
    Abstract: A process for fabricating CMOS transistor of IC devices that is free from short-changed effects is disclosed. The process of fabrication first forms a gate structure that has a gate polysilicon on top of a gate oxide layer on the surface of the IC substrate. A first spacer is then formed on the sidewall of the gate structure. Lightly-doped source/drain regions are then formed for the transistor by implanting impurities into the source/drain regions of the transistor. A second sidewall spacer then covers the first sidewall spacer. Heavily-doped source/drain regions underneath the lightly-doped source/drain regions are then formed by performing a source/drain implantation procedure. Finally, impurities in the lightly- and heavily-doped source/drain regions are then driven-in into the channel region of the transistor in a rapid thermal annealing procedure.
    Type: Application
    Filed: March 6, 2001
    Publication date: July 4, 2002
    Inventors: Wen-Jer Tsai, Tao-Cheng Lu, Hung-Sui Lin, Han-Chao Lai
  • Publication number: 20020044908
    Abstract: This invention discloses a method for removing and stabilizing liquid chromate ion and other oxy-metal ions with barium compounds.
    Type: Application
    Filed: December 13, 2000
    Publication date: April 18, 2002
    Inventors: Ching-Tsuen Huang, Tzeng-Ming Liu, Tsye-Shing Lee, Wen-Chao Lai
  • Patent number: 5664994
    Abstract: The present invention concerns a pair of fish-holding tongs, designed to be a practical tool for sport fishermen to immobilize their catch. The pair of fish-holding tongs of the present invention is fabricated of a metallic or plastic material, comprising components shown in the attached FIGS. 1 to 8. The inventor arrived at the present invention after observing that many sport fishermen hold their catch with their hands and that the struggling fish, particularly those equipped with sharp spines for defense purposes and those capable of fighting fiercely, such as ray, tiger fish and sea eel, can cause painful hand injuries. Specifically, the pair of fish-holding tongs is designed so that fish of different shapes can be immobilized easily from different angles, thereby preventing the struggling fish from escaping or injuring the hands of the sport fisherman.
    Type: Grant
    Filed: July 23, 1996
    Date of Patent: September 9, 1997
    Inventor: Tsan-Chao Lai
  • Patent number: 5180563
    Abstract: A process for treating a sludge comprises digesting the waste material with a mixture of sulfuric acid and hydrogen peroxide to form an acidic digestion solution and a digestion residue. The digestion residue containing the major portion of tungsten and other refractory metals is reacted with NaOH to solubilize the major portion of tungsten values to a liquid concentrate that is separated from the insoluble solid that contains the major portion of the other refractory metals such as tantalum and niobium. The digestion solution containing the major portion of the transition and rare metals is treated with a base to selectively recover iron as a solid iron hydroxide precipitate which is separated from the resulting liquor. The liquor is then treated again with a base to selectively recover the other metals such as Sc, Cr, rare earths, but not Mn, as a solid metal hydroxide precipitate that is separated from the solution.
    Type: Grant
    Filed: October 24, 1989
    Date of Patent: January 19, 1993
    Assignee: GTE Products Corporation
    Inventors: Wen-Chao Lai, William J. Rourke, Samuel Natansohn
  • Patent number: 4988487
    Abstract: A process for eliminating an industrial waste sludge by converting its metal values into useful products involves the selective leaching of Mn, divalent Fe, and other valuable metals, such as Sc, Co, Cr, Ni, Th, rare earths, etc. with a mixture of dilute sulfuric acid and a reductant at ambient temperature. Scandium is recovered by passing the leachate through an ion exchange column which is packed with a weakly cationic resin. The retention of other metals on the resin column is negligible. The scandium is eluted from the resin column and converted to a solid product. The raffinate from the ion exchange column is titrated with an alkali solution to convert the metals, except divalent Mn and Fe, to a solid metal hydroxide. After the separation the filtrate is treated with an alkali and an oxidant to recover iron as a solid product of iron oxide which is separated from the solution.
    Type: Grant
    Filed: October 24, 1989
    Date of Patent: January 29, 1991
    Assignee: GTE Laboratories Incorporated
    Inventors: Wen-Chao Lai, William J. Rourke, Samuel Natansohn
  • Patent number: 4898719
    Abstract: A process for recovering the scandium present as a trace constituent in a mixture of iron, manganese and other oxides comprise bringing the scandium into solution along with much of the other base metals, reducing the dissolved iron to the ferrous state, adjusting the pH of the resulting solution to a value of about 2.0 and selectively extracting the scandium with an organic extractant consisting of thenoyltrifluoroacetone dissolved in an aromatic solvent. The scandium values are recovered quantitatively from the organic extractant by treating it with a dilute acid. The process effects a complete separation of the scandium from the base metals resulting in a scandium product of high purity.
    Type: Grant
    Filed: March 10, 1989
    Date of Patent: February 6, 1990
    Assignee: GTE Laboratories Incorporated
    Inventors: William J. Rourke, Wen-Chao Lai, Samuel Natansohn
  • Patent number: 4816233
    Abstract: A method of recovering quantitatively trace amounts of scandium from aqueous solutions containing large amounts of other metals consists of reducing any manganese and iron in the solution to the divalent states of manganese and iron. The solution is then adjusted to a pH from about 1.9 to about 2.1 and passed through a column of the ion exchange resin in the hydrogen form having an iminodiacetic acid functionality. The scandium is absorbed on the column and any base metals and rare earth metals which were also absorbed are removed by eluting with a dilute acid without removing the scandium. The scandium is subsequently removed from the column by eluting with a solution containing a chelating agent such as diglycolic acid. The scandium is then recovered from the solution by precipitation, filtering, washing, drying and calcined to the oxide.
    Type: Grant
    Filed: September 11, 1987
    Date of Patent: March 28, 1989
    Assignee: GTE Laboratories Incorporated
    Inventors: William J. Rourke, Wen-Chao Lai, Samuel Natansohn
  • Patent number: 4765909
    Abstract: A method for a quantitative separation of scandium from thorium comprises adsorption of both metals on a cation exchange resin followed by selective elution of scandium with an acidic solution of a chelating agent followed by the elution of thorium by a six normal hydrochloric acid solution.
    Type: Grant
    Filed: April 23, 1987
    Date of Patent: August 23, 1988
    Assignee: GTE Laboratories Incorporated
    Inventors: William J. Rourke, Wen-Chao Lai, Samuel Natansohn