Abstract: The present disclosure relates to a method, a device, and a computer program product for managing indexes in a storage system. The storage system includes storage data. In the method, a first set of data objects associated with the storage data is acquired. A first set of hashes of the first set of data objects is determined respectively. Hashes in the first set of hashes are hashes of data objects in the first set of data objects. A first file is generated in the storage system to store the first set of hashes. A first name of the first file is determined based on the hashes in the first set of hashes. An index of the storage data is created based on the first file.

Abstract: Provided is a method of forming an interconnect structure including: forming a via; forming a first barrier layer to at least cover a top surface and a sidewall of the via; forming a first dielectric layer on the first barrier layer; performing a planarization process to remove a portion of the first dielectric layer and a portion of the first barrier layer, thereby exposing the top surface of the via; forming a second dielectric layer on the first dielectric layer, wherein the second dielectric layer has an opening exposing the top surface of the via; forming a blocking layer on the top surface of the via; forming a second barrier layer on the second dielectric layer; removing the blocking layer to expose the top surface of the via; and forming a conductive feature in the opening, wherein the conductive feature is in contact with the top surface of the via.

Abstract: A memory cell includes a bottom electrode, a memory element, spacers, a selector and a top electrode. The memory element is located on the bottom electrode and includes a first conductive layer, a second conductive layer and a storage layer. The first conductive layer is electrically connected to the bottom electrode. The second conductive layer is located on the first conductive layer, wherein a width of the first conductive layer is smaller than a width of the second conductive layer. The storage layer is located in between the first conductive layer and the second conductive layer. The spacers are located aside the second conductive layer and the storage layer. The selector is disposed on the spacers and electrically connected to the memory element. The top electrode is disposed on the selector.

Abstract: Implementations of the subject matter described herein provide methods and systems of controlling data backup, and a computer readable storage medium. The method comprises: obtaining test data for performing data backup with a plurality of backup solutions, the plurality of backup solutions being associated with each set of values amongst a plurality of sets of values of a plurality of factors affecting the data backup; generating a training sample set based on comparison of the test data; converting the training sample set into a decision model for controlling data backup; and optimizing the decision model based on the configuration parameters obtained by performing data backup with the decision model.

Abstract: A system may detect a quit operation corresponding to a child application. In response to detection the quit operation, the system may store, in a memory, a mapping between the child application identifier and the child application task, and suspend display of the child application. The system may generate a foreground and background switching entry corresponding to the child application, the foreground and background switching entry associated with the child application identifier. The system may display the foreground and background switching entry in a visible region of the graphical user interface generated based on a parent application. The system may detect a selection operation indicative of the foreground and background switching entry. In response to the selection operation, the system may obtain the child application task from the memory according to the child application identifier, and resume display of the child application based on the child application task.

Abstract: This document describes techniques and apparatuses for supporting web components associated with a document object model (DOM) corresponding to a data file in a web testing environment. A user interaction, relative to a web page or web application from which the DOM is rendered, is monitored in the web testing environment. The monitoring identifies a target element selected by the user that is referenced in a shadow DOM associated with the DOM. One or more parent shadow host elements of the DOM are identified relative to the target element. The one or more shadow host elements define a reduced path, with respect to a tree data structure representing the DOM and the shadow DOM, for linking a document object of the DOM to the target element. Indicia identifying the one or more shadow host elements as linking the document object of the DOM to the target element are recorded.

Abstract: The disclosure provides an antenna module adapted for an electronic device having a metal casing. The antenna module includes an antenna structure and a slot structure. The antenna structure includes a radiation portion, a feeding portion, a ground portion and an extension portion, wherein the feeding portion, the ground portion and the extension portion are connected to the radiation portion. The slot structure has an open end and a closed end, wherein the open end of the slot structure is adjacent to the extension portion of the antenna structure. The antenna structure is excited and resonates to generate a first antenna resonant mode, and the slot structure is coupled to the antenna structure and resonates to generate a second antenna resonant mode.

Abstract: Disclosed are an instantaneous dental implant surgery guiding device and a method thereof, of which a main structure includes a base, a receiving space, a sphere, a through hole, and a adjustor. With the above structure, a dentist places the base at a tooth missing site in a patient oral portion, and, after applying glue for fixing, carries out computer-tomographic scanning to allow the dentist to diagnose and assess, and then, the adjustor may be operated to drive the sphere to move in the receiving space in order to change angle and position of the through hole of the sphere, thereby allowing the dentist to apply an implant driller to make a drill along a predetermined route defined by the through hole of the sphere, enabling subsequent operations of expanding the implant route in a bone with drillers of different sizes and positioning the implant.

Abstract: An antenna device is provided in the disclosure. The antenna device includes a metal component, a signal cable, and a grounding component. The metal component includes a slot. The slot includes an open end and a closed end, and the open end forms an opening at a side of the metal component. The signal cable includes a signal portion and a grounding portion. The signal cable is disposed such that a projection of the signal portion is partially overlapped with the opening. The grounding portion is electrically connected to the metal component through the grounding component.

Abstract: Embodiments of the present disclosure relate creating a snapview backup. The embodiments include acquiring, at a backup client, a first file list corresponding to the snapview backup to be created at a backup server, the first file list indicating a plurality of files to be referenced by the snapview backup, and data of the plurality of files being contained in a plurality of containers at the backup server; generating a second file list by sorting the plurality of files indicated in the first file list according to the containers to which they belong, the second file list indicating that each of the plurality of containers contains data of at least one of the plurality of files; and causing the backup server to reference the data of the plurality of files in the plurality of containers based on the second file list, to create the snapview backup.

Abstract: A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduced the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.

Abstract: Herein disclosed are an electronic component testing system and a time certification method. The electronic component testing system comprising a testing device and an interface device. The testing device comprises a backboard, and the backboard electrically connected to at least one test board and comprising a time certification component. The interface device, electrically connected to the testing device, provides a test instruction. Wherein the time certification component stores an authorization start time and an authorization end time. Wherein the testing device starts a test procedure according to the test instruction, the time certification component updates the authorization start time to a first stop time of the test procedure after the test procedure is completed.

Abstract: An embodiment is a method including forming an opening in a mask layer, the opening exposing a conductive feature below the mask layer, forming a conductive material in the opening using an electroless deposition process, the conductive material forming a conductive via, removing the mask layer, forming a conformal barrier layer on a top surface and sidewalls of the conductive via, forming a dielectric layer over the conformal barrier layer and the conductive via, removing the conformal barrier layer from the top surface of the conductive via, and forming a conductive line over and electrically coupled to the conductive via.

Abstract: A method includes forming a dielectric layer over a substrate, the dielectric layer having a top surface; etching an opening in the dielectric layer; forming a bottom electrode within the opening, the bottom electrode including a barrier layer; forming a phase-change material (PCM) layer within the opening and on the bottom electrode, wherein a top surface of the PCM layer is level with or below the top surface of the dielectric layer; and forming a top electrode on the PCM layer.

Abstract: Provided are a memory cell and a method of forming the same. The memory cell includes a bottom electrode, a top electrode, a storage element layer, and a protective layer. The storage element layer is disposed between the bottom and top electrodes. The protective layer covers the storage element layer and the top electrode, and a material of the protective layer is derived from the storage element layer. A semiconductor device having the memory cell is also provided.

Abstract: A memory cell includes a storage element layer, a bottom electrode, a top electrode and a liner layer. The storage element layer has a first surface and a concaved second surface opposite to the first surface. The bottom electrode is disposed on the first surface and connected to the storage element layer. The top electrode is on the concaved second surface and connected to the storage element layer. The liner layer is surrounding the storage element layer and the top electrode.

Abstract: The present disclosure relates to a method, a device, and a computer program product for managing indexes in a storage system. The storage system includes storage data. In the method, a first set of data objects associated with the storage data is acquired. A first set of hashes of the first set of data objects is determined respectively. Hashes in the first set of hashes are hashes of data objects in the first set of data objects. A first file is generated in the storage system to store the first set of hashes. A first name of the first file is determined based on the hashes in the first set of hashes. An index of the storage data is created based on the first file.

Abstract: Embodiments of the present disclosure provide a storage management method, an electronic device, and a computer program product. The method includes determining at least one count corresponding to at least one data segment of a file in a file set, the file set being stored in a local storage device, and the at least one count indicating the number of occurrences of the at least one data segment in the file set. The method further includes determining a deduplication ratio of the file based on the at least one count, the deduplication ratio indicating an overlapping level of the file with other files in the file set. The method further includes migrating the file from the local storage device to a remote storage device according to a determination that the deduplication ratio of the file is lower than a threshold.

Abstract: Embodiments of the present disclosure relate to establishing and verifying an index file. The method for establishing an index file includes: in response to receiving a data block to be stored, determining first verification information for verifying the data block and a first storage address for storing the data block. This method further includes: based on the first verification information, determining an index entry for the data block and a second storage address for storing the index entry, wherein the index entry includes the first verification information and the first storage address, and the index entry will be included in the index file. This method further includes: based on the index entry and the second storage address, determining second verification information. This method further includes: based on the second verification information and historical verification information for the index file, determining third verification information for verifying the index file.

Abstract: In an embodiment, a device includes: a first metallization layer over a substrate, the substrate including active devices; a first bit line over the first metallization layer, the first bit line connected to first interconnects of the first metallization layer, the first bit line extending in a first direction, the first direction parallel to gates of the active devices; a first phase-change random access memory (PCRAM) cell over the first bit line; a word line over the first PCRAM cell, the word line extending in a second direction, the second direction perpendicular to the gates of the active devices; and a second metallization layer over the word line, the word line connected to second interconnects of the second metallization layer.