Patents by Inventor Chao-Wen (Kevin) Chen

Chao-Wen (Kevin) Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • TOP EMISSION MICROLED DISPLAY AND BOTTOM EMISSION MICROLED DISPLAY AND A METHOD OF FORMING THE SAME
    Publication number: 20200083280
    Abstract: A microLED display includes a first main substrate, micrLEDs disposed above the first main substrate, a first light blocking layer disposed above the first main substrate to define emission areas, a light guiding layer disposed in the emission areas, and a plurality of connecting structures disposed in the emission areas respectively and electrically connected with the microLEDs.
    Type: Application
    Filed: September 11, 2018
    Publication date: March 12, 2020
    Inventors: Biing-Seng Wu, Chao-Wen Wu
  • PACKAGE STRUCTURE
    Publication number: 20200067173
    Abstract: A package structure including a first redistribution circuit structure, a semiconductor die, first antennas and second antennas is provided. The semiconductor die is located on and electrically connected to the first redistribution circuit structure. The first antennas and the second antennas are located over the first redistribution circuit structure and electrically connected to the semiconductor die through the first redistribution circuit structure. A first group of the first antennas are located at a first position, a first group of the second antennas are located at a second position, and the first position is different from the second position in a stacking direction of the first redistribution circuit structure and the semiconductor die.
    Type: Application
    Filed: November 1, 2019
    Publication date: February 27, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Nan-Chin Chuang, Chen-Hua Yu, Chung-Shi Liu, Chao-Wen Shih, Shou-Zen Chang
  • Managing dynamic connection intervals for implantable and external devices
    Patent number: 10575346
    Abstract: A method, system and external instrument are provided. The method initiates a communication link between an external instrument (EI) and an implantable medical device (MD), established a first connection interval for conveying data packets between the EI and IMD and monitors a connection criteria that includes at least one of a data throughput requirement. A battery indicator or link condition of the communications link is between the IMD and EI. The method further changes from the first connection interval to a second connection interval based on the connection criteria.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: February 25, 2020
    Assignee: PACESETTER, INC.
    Inventors: Yongjian Wu, Chao-Wen Young, Jun Yang, Xing Pei, Reza Shahandeh
  • PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
    Publication number: 20200058607
    Abstract: A package structure include a ground plate, a semiconductor die, a molding compound, and an antenna element. The semiconductor die is located over the ground plate. The molding compound is located over the semiconductor die. The antenna element is located in the molding compound and overlaps with the ground plate along a stacking direction of the ground plate, the semiconductor die and the molding compound. The antenna element has a first side levelled with a first surface of the molding compound, and the ground plate is located between the semiconductor die and the antenna element.
    Type: Application
    Filed: October 23, 2019
    Publication date: February 20, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Albert Wan, Chao-Wen Shih, Shou-Zen Chang, Nan-Chin Chuang
  • WAVELENGTH CONVERSION FILM
    Publication number: 20200041101
    Abstract: A wavelength conversion film including a phosphor layer and a light scattering layer is provided. The phosphor layer includes a first phosphor and a first substrate. The light scattering layer includes a plurality of titanium dioxide particles and a second substrate. The wavelength conversion film further includes a photoluminescence material and a plurality of nanoparticles. The photoluminescence material and the plurality of nanoparticles are located in at least one of the phosphor layer and the light scattering layer or respectively located in the phosphor layer and the light scattering layer. The wavelength conversion film of the invention may prevent the occurrence of photocatalytic effect and increase the light conversion efficiency.
    Type: Application
    Filed: October 1, 2018
    Publication date: February 6, 2020
    Applicant: Chunghwa Picture Tubes, LTD.
    Inventors: Wen-Jiunn Hsieh, Chao-Wen Yeh
  • Utilizing signed credentials for secure communication with an implantable medical device
    Patent number: 10541977
    Abstract: Methods and devices for establishing secure communications with an implantable medical device (IMD) are provided. The method and devices receive a credential from an external instrument (EI). The credential is signed utilizing a private key, and the credential includes at least two of a credential time to live (TTL) indicator, an IMD Identifier (ID), and an EI ID. The method and device authenticate the credential using a public key and verify the at least two of the TTL indicator, the IMD ID, and the EI ID. The method and device establish a secure communications session with the EI based on the verification and authentication.
    Type: Grant
    Filed: July 25, 2017
    Date of Patent: January 21, 2020
    Assignee: PACESETTER, INC.
    Inventors: Yongjian Wu, Mostafa Sadeghi, Chao-Wen Young, Jun Yang, Samir Shah, Simon Skup
  • Package structure, electronic device and method of fabricating package structure
    Patent number: 10535913
    Abstract: In accordance with some embodiments, a package structure includes an RFIC chip. an insulating encapsulation, a redistribution circuit structure, an antenna and a microwave director. The insulating encapsulation encapsulates the RFIC chip. The redistribution circuit structure is disposed on the insulating encapsulation and electrically connected to the RFIC chip. The antenna is disposed on the insulating encapsulation and electrically connected to the RFIC chip through the redistribution circuit structure. The antenna is located between the microwave director and the RFIC chip. The microwave director has a microwave directivity enhancement surface located at a propagating path of a microwave received or generated by the antenna.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: January 14, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Min-Chien Hsiao, Chen-Hua Yu, Chung-Shi Liu, Chao-Wen Shih, Shou-Zen Chang
  • LIGHT EMITTING ELEMENT
    Publication number: 20190387616
    Abstract: The present invention discloses a light emitting element comprising a printed circuit board and a light emitting diode. The printed circuit board comprises a photosensitive solder resist layer. Materials of the photosensitive solder resist layer comprise a reflective material and at least one of a conductive nanoparticle and a photoluminescent material. The light emitting diode is disposed on the photosensitive solder resist layer of the circuit board, and is electrically connected to the printed circuit board. By adding at least one of the conductive nanoparticle and the photoluminescent material, the light emitting element of the present invention reduces the photodegradation of the solder resist layer, and improves the reflectivity of the photosensitive solder resist layer.
    Type: Application
    Filed: August 23, 2018
    Publication date: December 19, 2019
    Applicant: Chunghwa Picture Tubes, LTD.
    Inventors: Wen-Jiunn Hsieh, Chao-Wen Yeh
  • SUPPORT STRUCTURE FOR LIGHT-EMITTING DIODE AND MANUFACTURING METHOD THEREOF
    Publication number: 20190386176
    Abstract: A support structure for a light-emitting diode utilizes the configuration of a sacrifice structure to achieve safe separation of a light-emitting diode from a carrier substrate. Specifically, when an external force is applied on the light-emitting diode or the carrier substrate, a breaking layer of the sacrifice structure is the first layer to be broken, so that the light-emitting diode and carrier substrate will become separated from each other.
    Type: Application
    Filed: June 14, 2019
    Publication date: December 19, 2019
    Inventors: BIING-SENG WU, CHAO-WEN WU, CHUN-JEN WENG
  • BONDING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE THEREOF
    Publication number: 20190386191
    Abstract: A bonding method of a semiconductor device is disclosed. The method includes steps of forming a plurality of holes on two bonding parts of a main substrate, respectively; disposing a semiconductor device on the main substrate, and aligning the two bonding parts with two conduction parts of the semiconductor device; aligning a laser to the conduction parts and operating the laser to emit a laser beam from a lower part of the main substrate, wherein the laser beam passes through the holes of the bonding part to strike on the conduction part, so as to melt each conduction part to bond with the bonding part. With configuration of the holes, the conduction parts and the bonding part can be smoothly bonded by using laser, so as to achieve the purpose of transferring the semiconductor device.
    Type: Application
    Filed: February 5, 2019
    Publication date: December 19, 2019
    Inventors: Biing-Seng WU, Chao-Wen WU, Hsing-Ying LEE
  • HEAT SINK
    Publication number: 20190383566
    Abstract: A heat sink includes a heat conduction portion and a heat dissipation portion. The heat conduction portion contacts a heat source with a flat form. The heat dissipation portion is extended outward from at least one side of the thickness of the heat conduction portion and parallel to the heat conduction portion. The heat dissipation portion includes at least a first branch extended from the heat conduction portion and at least a second branch extended from the first branch.
    Type: Application
    Filed: August 30, 2019
    Publication date: December 19, 2019
    Inventor: Chao-Wen LU
  • Method of manufacturing semiconductor device
    Patent number: 10510652
    Abstract: A method of manufacturing a semiconductor device includes: receiving a first substrate with a surface; receiving a second substrate; determining a pad array on the surface of the first substrate, wherein the pad array includes a first type pad and a second type pad; forming a via pattern underlying the pad array in the first substrate according to the location of each via, wherein the first type pad in the pad array is directly contacting a via of the via pattern and the second type pad in the pad array is clear of any via of the via pattern; laterally connecting the second type pad with a conductive trace, wherein the conductive trace connects to another via that is same level with the via contacting the first type pad; and disposing a first conductive bump and a second conductive bump between the first substrate and the second substrate.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: December 17, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tsung-Yuan Yu, Hao-Yi Tsai, Chao-Wen Shih, Hung-Yi Kuo, Pi-Lan Chang
  • Semiconductor package structure
    Patent number: 10510693
    Abstract: A semiconductor package structure including an encapsulation body, an RFIC chip, a first antenna structure, and a second antenna structure is provided. The RFIC chip may be embedded in the encapsulation body. The first antenna structure may be disposed at a lateral side of the RFIC chip, electrically connected to the RFIC chip, and include a first conductor layer and a plurality of first patches opposite to the first conductor layer. The second antenna structure may be stacked on the RFIC chip, electrically connected to the RFIC chip, and include a second conductor layer and a plurality of second patches opposite to the second conductor layer. The first patches and the second patches are located at a surface of the encapsulation body. A first distance between the first conductor layer and the first patches is different from a second distance between the second conductor layer and the second patches.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kai-Chiang Wu, Chun-Lin Lu, Chao-Wen Shih, Han-Ping Pu, Nan-Chin Chuang
  • Centrifugal blower
    Patent number: 10502226
    Abstract: A centrifugal blower is provided. The centrifugal blower includes a hub, a shaft, a motor, a plurality of blades, a rib, and a first fin. The shaft is connected to the hub. The motor rotates the shaft. Each blade includes a rib and a first fin. The rib is connected to the hub, wherein the rib extends from the hub to an end of the blade. The first fin is disposed on a first side of the rib and connected to the hub, wherein the first fin includes a first surface, the rib protrudes from the first surface, and the thickness of the first fin is less than the thickness of the rib.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: December 10, 2019
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chao-Wen Lu, Chun-Chih Wang, Ding-Wei Chiu
  • CROSS FLOW FAN
    Publication number: 20190368510
    Abstract: A cross flow fan includes a fan frame and a rotor having a hub, a shaft connected with the hub at its rotation center, a plurality of blades, and a disk structure connected with the blades and hub within the fan frame. The fan frame has a frame wall having a lateral flow inlet to the rotor and a lateral flow outlet from the rotor, a base carrying the rotor and frame wall, a cover on one side of the frame wall opposite to the base, and a partition structure disposed between the blades and an inner wall surface of the frame wall. A normal line of the lateral flow inlet and a normal line of the lateral flow outlet are not parallel to an extension direction of the shaft. The blades directly face the lateral flow inlet and the lateral flow outlet along radial directions of the shaft.
    Type: Application
    Filed: August 19, 2019
    Publication date: December 5, 2019
    Inventors: Tsung-Ying LEE, Shih-Han CHEN, Chao-Wen LU
  • Packaging of semiconductor device with antenna and heat spreader
    Patent number: 10490479
    Abstract: A semiconductor package includes an integrated circuit (IC), a heat dissipation structure, a molding layer and an antenna. The IC is mounted on a first surface of a first redistribution layer (RDL). The heat dissipation structure is mounted on a second surface of the first RDL. The molding compound is disposed over the first surface of the first RDL. The antenna is disposed on the second surface of the first RDL, wherein the antenna is disposed side-by-side to the heat dissipation structure.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: November 26, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Albert Wan, Chao-Wen Shih, Han-Ping Pu, Hsin-Yu Pan, Sen-Kuei Hsu
  • METHOD OF MANUFACTURING INTEGRATED FAN-OUT PACKAGE
    Publication number: 20190355694
    Abstract: A method of manufacturing an integrated fan-out (InFO) package includes at least the following steps. A package array is formed. A dielectric layer having a core layer formed thereon is provided. The core layer includes a plurality of cavities penetrating through the core layer. The dielectric layer and the core layer are attached onto the package array such that the core layer is located between the dielectric layer and the package array. A plurality of first conductive patches is formed on the dielectric layer above the cavities.
    Type: Application
    Filed: July 28, 2019
    Publication date: November 21, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Albert Wan, Ching-Hua Hsieh, Chung-Hao Tsai, Chuei-Tang Wang, Chao-Wen Shih, Han-Ping Pu, Chien-Ling Hwang, Pei-Hsuan Lee, Tzu-Chun Tang, Yu-Ting Chiu, Jui-Chang Kuo
  • Package structure
    Patent number: 10483617
    Abstract: A package structure including an insulating encapsulation, at least one semiconductor die, at least one first antenna and at least one second antenna is provided. The insulating encapsulation includes a first portion, a second portion and a third portion, wherein the second portion is located between the first portion and the third portion. The at least one semiconductor die is encapsulated in the first portion of the insulating encapsulation, and the second portion and the third portion are stacked on the at least one semiconductor die. The at least one first antenna is electrically connected to the at least one semiconductor die and encapsulated in the third portion of the insulating encapsulation. The at least one second antenna is electrically connected to the at least one semiconductor die and encapsulated in the second portion of the insulating encapsulation.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: November 19, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Nan-Chin Chuang, Chen-Hua Yu, Chung-Shi Liu, Chao-Wen Shih, Shou-Zen Chang
  • Package structure and manufacturing method thereof
    Patent number: 10475757
    Abstract: A package structure includes at least one die, an antenna element, and at least one through interlayer via. The antenna element is located on the at least one die. The at least one through interlayer via is located between the antenna element and the at least one die, wherein the antenna element is electrically connected to the at least one die through the at least one through interlayer via.
    Type: Grant
    Filed: January 21, 2019
    Date of Patent: November 12, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Albert Wan, Chao-Wen Shih, Shou-Zen Chang, Nan-Chin Chuang
  • Integrated Devices in Semiconductor Packages and Methods of Forming Same
    Publication number: 20190341363
    Abstract: An embodiment package comprises an integrated circuit die encapsulated in an encapsulant, a patch antenna over the integrated circuit die, and a dielectric feature disposed between the integrated circuit die and the patch antenna. The patch antenna overlaps the integrated circuit die in a top-down view. The thickness of the dielectric feature is in accordance with an operating bandwidth of the patch antenna.
    Type: Application
    Filed: July 15, 2019
    Publication date: November 7, 2019
    Inventors: Chen-Hua Yu, Kai-Chiang Wu, Chung-Shi Liu, Shou Zen Chang, Chao-Wen Shih