Patents by Inventor Chao Wen

Chao Wen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    Publication number: 20160307859
    Abstract: The invention provides a semiconductor device including a substrate, a dielectric layer, a dummy bonding pad, a bonding pad, a redistribution layer, and a metal interconnect. The substrate includes a non-device region and a device region. The dielectric layer is on the non-device region and the device region. The dummy bonding pad is on the dielectric layer of the non-device region. The metal interconnect is in the dielectric layer of the non-device region and connected to the dummy bonding pad. The bonding pad is on the dielectric layer of the device region. The buffer layer is between the bonding pad and the dielectric layer. The buffer layer includes metal, metal nitride, or a combination thereof. The redistribution layer is on the dielectric layer and connects the dummy bonding pad and the bonding pad.
    Type: Application
    Filed: June 27, 2016
    Publication date: October 20, 2016
    Inventors: Chung-Hsin Lin, Ping-Heng Wu, Chao-Wen Lay, Hung-Mo Wu, Ying-Cheng Chuang
  • Conductive Traces in Semiconductor Devices and Methods of Forming Same
    Publication number: 20160307852
    Abstract: An embodiment device package includes a semiconductor device die comprising a passivation layer at a top surface, a first conductive line over the passivation layer and electrically connected to the device die, and a second conductive line over the passivation layer and electrically connected to the device die. The first conductive line is thicker than the second conductive line, and the first conductive line and the second conductive line are formed in a same device package layer.
    Type: Application
    Filed: April 16, 2015
    Publication date: October 20, 2016
    Inventors: Chao-Wen Shih, Chen-Hua Yu, Han-Ping Pu, Hsin-Yu Pan, Hao-Yi Tsai, Sen-Kuei Hsu
  • Systems and methods for maintaining a bi-directional communication between an implantable medical device and an external device
    Patent number: 9463325
    Abstract: Systems and methods are provided for maintaining a bi-directional communication link between an external device and an implantable medical device (IMD). The systems and methods receive a connection request from an external device at the IMD. The communication request includes one or more communication link parameters based on a wireless protocol, defining a first communication interval. The systems and methods establish a bi-directional communication link between the external device and the IMD based on the one or more communication link parameters, and receive, during the first communication interval, a data packet from the external device along a first data channel, the data packet including an adjusted communication link parameter. The adjusted communication link parameter include a second communication interval.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: October 11, 2016
    Assignee: Pacesetter, Inc.
    Inventors: Chao-Wen Young, Germinal Ibarrola, Yongjian Wu, Mostafa Sadeghi, Erik Shreve, Andrew Rissing, Min Yang, Jun Yang, Thanh Tieu
  • Systems and Methods For A Communication Bridge Between An Implantable Medical Device And An External Device
    Publication number: 20160287887
    Abstract: Systems and methods are provided for bridging a bi-directional communication link between an external device and an implantable medical device (IMD). The systems and methods establish a first bi-directional communication link between an external device and a wireless bridge device according to a wireless protocol, and establish a second bi-directional communication link between the wireless bridge device and an IMD concurrently with the first bi-direction communication link according to the wireless protocol. The systems and methods further receive a data packet from the external device at the wireless bridge device. The data packet is received during the communication interval. The systems and methods further transmit the data packet from the wireless bridge device to the IMD during the communication interval.
    Type: Application
    Filed: April 1, 2015
    Publication date: October 6, 2016
    Inventors: Yonjian Wu, Reza Shahandeh, Samir Shah, Chao-Wen Young, Mostafa Sadeghi, Jun Yang, Thanh Tieu
  • MANUFACTURING METHOD OF SILATRANE WITH THIOL GROUP AND PRESERVATION METHOD THEREOF
    Publication number: 20160264602
    Abstract: A manufacturing method of silatrane with thiol group and a preservation method thereof are disclosed. (3-Mercaptopropyl)trimethoxysilane and triethanolamine are reacted for a pre-determined time at a pre-determined temperature under nitrogen atmosphere in presence or absence of catalyst, and then a recrystallization process is performed with a solvent to obtain silatrane with thiol group of formula (1). Silatrane with thiol group is dissolved in an organic solvent to preserve the silatrane with thiol group.
    Type: Application
    Filed: September 16, 2015
    Publication date: September 15, 2016
    Inventors: Wen-Hao CHEN, Lai-Kwan CHAU, Yen-Ta TSENG, Chao-Wen CHEN
  • System and method for establishing a secured connection between an implantable medical device and an external device
    Patent number: 9445264
    Abstract: A system and method are provided for initiating a secured bi-directional communication session with an implantable medical device. The system and method include configuring a pulse generator (PG) device and an external device to establish a communication link there between through a wireless protocol with a defined bonding procedure. The system and method also include transmitting a static identification and dynamic seed from the PG device through a dedicated advertisement channel to the external device and generating a passkey from a pre-defined algorithm based on the dynamic seed and a static identification. Further, the system and method include starting the defined bonding procedure.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: September 13, 2016
    Assignee: Pacesetter, Inc.
    Inventors: Chao-Wen Young, Yongjian Wu, Min Yang, Erik Shreve, Andrew Rissing, Jun Yang, Thanh Tieu, Mostafa Sadeghi
  • Semiconductor device and manufacturing method thereof
    Patent number: 9437490
    Abstract: A semiconductor device includes a first substrate including a surface, and a pad array on the surface of the substrate, wherein the pad array comprises a first type pad and a second type pad located on a same level. The semiconductor device further includes a conductive bump connecting either the first type pad or the second type pad to a second substrate and a via connected a conductive feature at a different level to the first type pad and the via located within a projection area of the first type pad and directly contacting the first type pad. The semiconductor device also has a dielectric in the substrate and directly contacting the second type pad, wherein the second type pad is floated on the dielectric.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: September 6, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tsung-Yuan Yu, Hao-Yi Tsai, Chao-Wen Shih, Hung-Yi Kuo, Pi-Lan Chang
  • Electronic device and heat dissipation module and centrifugal fan thereof
    Patent number: 9433126
    Abstract: A centrifugal fan includes an impeller and a housing. The housing includes an upper plate, a lower plate and a side wall, wherein the upper plate axially corresponds to the lower plate, a side wall is formed between the upper plate and the lower plate, an axial inlet is formed on the upper plate, a lateral outlet is formed on the side wall, the impeller is disposed in the housing and corresponds to the inlet, and a flow path communicates the inlet to the outlet. The housing further includes a guiding groove, and at least one auxiliary inlet is formed in the guiding groove.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: August 30, 2016
    Assignee: DELTA ELECTRONICS, INC.
    Inventor: Chao-Wen Lu
  • Systems and methods for low energy wake-up and pairing for use with implantable medical devices
    Patent number: 9427592
    Abstract: Techniques are provided for use with implantable medical devices or trial medical devices for wirelessly connecting the devices to external instruments such as tablet computers or smartphones. In an example where the medical device is an implantable neurostimulator, the neurostimulator passively detects wireless wake-up signals generated by the external instrument, i.e. the neurostimulator “sniffs” for advertisement signals generated by the external instrument. In response to passive detection of a wake-up signal, the implantable neurostimulator determines if a response is warranted and, if so, the neurostimulator activates its wireless transmission components to transmit an acknowledgement signal to the external instrument so as to complete a wake-up and handshake protocol.
    Type: Grant
    Filed: August 28, 2013
    Date of Patent: August 30, 2016
    Assignee: Pacesetter, Inc.
    Inventors: Yongjian Wu, Chao-Wen Young, Jun Yang, Reza Shahandeh, Thanh Tieu, Min Yang
  • Semiconductor structure and manufacturing method thereof
    Patent number: 9431360
    Abstract: A semiconductor structure includes a substrate including a front side, a conductive bump disposed over the front side, and an opaque molding disposed over the front side and around a periphery portion of an outer surface of the conductive bump, wherein the opaque molding includes a recessed portion disposed above a portion of the front side adjacent to a corner of the substrate and extended through the opaque molding to expose the portion of the front side and an alignment feature disposed within the portion of the front side.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: August 30, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Hsuan-Ting Kuo, Yu-Peng Tsai, Wei-Hung Lin, Chun-Lung Jao, Chao-Wen Shih, Ming-Da Cheng, Chung-Shi Liu
  • SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20160240453
    Abstract: The method of manufacturing a semiconductor device includes receiving a substrate. The substrate comprises at least one chip region and at least one scribe line next to the chip region, and each chip region comprises an active region. The method further includes disposing a buffer layer at least covering the scribe line, disposing a dielectric layer including an opening over each chip region, and disposing a bump material to the opening of the dielectric layer and electrically connecting to the active region. The method further includes forming a mold over the substrate, covering the buffer layer and cutting the substrate along the scribe line. Furthermore, the buffer layer includes an elastic modulus less than that of the mold, or the buffer layer includes a coefficient of thermal expansion less than that of the mold.
    Type: Application
    Filed: April 27, 2016
    Publication date: August 18, 2016
    Inventors: NIEN-FANG WU, CHAO-WEN SHIH, YUNG-PING CHIANG, HAO-YI TSAI
  • Semiconductor device having voids between top metal layers of metal interconnects
    Patent number: 9418949
    Abstract: The invention provides a semiconductor device including a substrate, a dielectric layer, a dummy bonding pad, a bonding pad, a redistribution layer, and a metal interconnect. The substrate includes a non-device region and a device region. The dielectric layer is on the non-device region and the device region. The dummy bonding pad is on the dielectric layer of the non-device region. The metal interconnect is in the dielectric layer of the non-device region and connected to the dummy bonding pad. The bonding pad is on the dielectric layer of the device region. The buffer layer is between the bonding pad and the dielectric layer. The buffer layer includes metal, metal nitride, or a combination thereof. The redistribution layer is on the dielectric layer and connects the dummy bonding pad and the bonding pad.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: August 16, 2016
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chung-Hsin Lin, Ping-Heng Wu, Chao-Wen Lay, Hung-Mo Wu, Ying-Cheng Chuang
  • High efficiency wireless charging system and its control method
    Patent number: 9419469
    Abstract: A control method for a wireless charging system has steps of performing impedance matching on an antenna of the wireless charging system; tracing an optimal frequency point by sending a sensing signal with a default transmission frequency, and calculating a transmission efficiency of the sensing signal; determining whether the transmission efficiency meets a transmission requirement. When the transmission efficiency does not meet the transmission requirement, repeats the previous steps with another default transmission frequency until the transmission efficiency meeting the transmission requirement. When the transmission efficiency meeting the transmission requirement, the default transmission frequency is defined as the optimal frequency point for charging.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: August 16, 2016
    Assignee: AUTOMOTIVE RESEARCH & TESTING CENTER
    Inventors: Chao-Wen Chiang, Chou-Yu Hsieh
  • 3D Package With Through Substrate Vias
    Publication number: 20160218090
    Abstract: A package, comprising a substrate having electrical devices disposed at a first side of the substrate, vias extending from the first side of the substrate to a second side of the substrate opposite the first side and metallization layers disposed on the first side of the substrate. Contact pads are disposed over the first metallization layers and a protection layer is disposed over the contact pads. Post-passivation interconnects are disposed over the protection layer and extend to the contact pads through openings in the protection layer. Connectors are disposed on the PPIs and a molding compound extends over the PPIs and around the connectors.
    Type: Application
    Filed: April 4, 2016
    Publication date: July 28, 2016
    Inventors: Chen-Hua Yu, Mirng-Ji Lii, Hung-Yi Kuo, Hao-Yi Tsai, Chao-Wen Shih, Tsung-Yuan Yu, Min-Chien Hsiao
  • Semiconductor device having trench adjacent to receiving area and method of forming the same
    Patent number: 9397056
    Abstract: In some embodiments in accordance with the present disclosure, a semiconductor device including a semiconductor substrate is received. An interconnect structure is provided over the semiconductor substrate, and a passivation is provided over the interconnect structure. The passivation includes an opening such that a portion of the interconnect structure is exposed. Moreover, a dielectric is provided over the passivation, and a post-passivation interconnect (PPI) is provided over the dielectric. The PPI is configured to connect with the exposed portion of the interconnect structure through an opening in the dielectric. Furthermore, the PPI includes a receiving area for receiving a conductor, and a trench adjacent to the receiving area. In certain embodiments, the receiving area is defined by the trench.
    Type: Grant
    Filed: June 3, 2014
    Date of Patent: July 19, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yen-Ping Wang, Chao-Wen Shih, Yung-Ping Chiang, Shih-Wei Liang, Tsung-Yuan Yu, Hao-Yi Tsai, Mirng-Ji Lii, Chen-Hua Yu
  • Method for fixing metal onto surface of substrate
    Patent number: 9394320
    Abstract: A method for fixing metal onto a surface of the substrate. The present method includes steps of: providing a substrate and a mercaptoalkylsilatrane compound; dissolving the mercaptoalkylsilatrane compound in a solvent; performing a condensation reaction of the substrate with and the dissolved mercaptoalkylsilatrane compound to complete the surface modification of the substrate; and performing a covalent bonding process to metal with the mercaptoalkylsilatrane compound already modified onto the surface of the substrate to fix the metal onto the surface of the substrate.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: July 19, 2016
    Assignee: National Chung Cheng University
    Inventors: Lai-Kwan Chau, Wen-Hao Chen, Yen-Ta Tseng, Chin-Wei Wu, Chao-Wen Chen
  • WIRELESS CHARGING SYSTEM AND FOREIGN METAL OBJECT DETECTION METHOD THEREFOR
    Publication number: 20160190852
    Abstract: A wireless charging system includes a wireless charging device and a power-consuming device installed in a charging area. The wireless charging device has a signal conversion module connected to a controller, a transmitter antenna and a power input terminal. The power-consuming device has a receiver coil connected to a rectifier and outputting generated power through a power output terminal. Before or when the wireless charging device charges the power-consuming device, the controller of the wireless charging device can detect a power consumption status, voltage and current information and phase difference information of the transmitter antenna to instantly determine if any foreign metal object enters the charging area, thereby preventing high temperature generated by the foreign metal object from causing equipment damage and danger and enhancing wireless charging safety.
    Type: Application
    Filed: December 30, 2014
    Publication date: June 30, 2016
    Applicant: AUTOMOTIVE RESEARCH & TESTING CENTER
    Inventors: Chao-Wen CHIANG, Yu-Chuan WANG
  • Semiconductor device and manufacturing method thereof
    Patent number: 9379076
    Abstract: A method of manufacturing a semiconductor structure includes receiving a substrate including a die pad disposed thereon; disposing a passivation over the substrate and around the die pad; disposing a polymer over the passivation; forming a post passivation interconnect (PPI) including an elongated portion and a via portion contacting with the die pad; depositing a metallic paste on the elongated portion of the PPI by a stencil; disposing a conductive bump over the metallic paste; and disposing a molding over the PPI and around the metallic paste and the conductive bump.
    Type: Grant
    Filed: October 1, 2014
    Date of Patent: June 28, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chen-Chih Hsieh, Hao-Yi Tsai, Chao-Wen Shih, Yung-Ping Chiang, Tsung-Yuan Yu
  • Semiconductor device comprising a chip substrate, a mold, and a buffer layer
    Patent number: 9343385
    Abstract: A semiconductor device and a method of manufacturing the semiconductor device are disclosed. The semiconductor device includes a chip substrate, a mold, and a buffer layer. The mold is disposed over the chip substrate. The buffer layer is externally embedded between the chip substrate and the mold. The buffer layer has an elastic modulus or a coefficient of thermal expansion less than that of the mold. The method includes disposing a buffer layer at least covering scribe lines of a substrate, forming a mold over the substrate and covering the buffer layer, and cutting along the scribe lines and through the mold, the buffer layer and the substrate.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: May 17, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Nien-Fang Wu, Chao-Wen Shih, Yung-Ping Chiang, Hao-Yi Tsai
  • Copper post structure for wafer level chip scale package
    Patent number: 9343415
    Abstract: In a method for forming a packaging structure, a metal pad is formed on a semiconductor substrate, and a first polymer insulating layer is formed over the semiconductor substrate. An opening passing through the first polymer insulating layer is formed to expose a portion of the metal pad. A copper-containing material is deposited in the opening and over the first polymer insulating layer, thereby forming a copper-containing layer having a first thickness and a first width over the first polymer insulating layer. A conductive bump having a second width is formed over the copper-containing layer, in which the second width is smaller than the first width. An exposed portion of the copper-containing layer is etched using the conductive bump as a mask until the exposed portion is reduced to a second thickness, thereby forming a monolithic copper-containing structure.
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: May 17, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chao-Wen Shih, Yung-Ping Chiang, Chen-Chih Hsieh, Hao-Yi Tsai