Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a substrate, forming an interfacial layer on the substrate by treating the substrate with radicals, and forming a high-k dielectric layer on the interfacial layer. The radicals are selected from the group consisting of hydrous radicals, nitrogen/hydrogen radicals, and sulfur/hydrogen radicals.

Abstract: A power supply apparatus with a protection function includes a pulse width modulation control unit, a pulse width modulation detecting unit, a switch unit and a feedback circuit. The feedback circuit detects a bus voltage. When the feedback circuit detects that the bus voltage is greater than a predetermined voltage, the feedback circuit sends an informing signal to the pulse width modulation control unit. The pulse width modulation control unit adjusts a duty cycle of a pulse width modulation signal and sends the pulse width modulation signal to the pulse width modulation detecting unit. When the pulse width modulation detecting unit detects that the duty cycle of the pulse width modulation signal is less than a predetermined cycle, the pulse width modulation detecting unit turns off the switch unit to stop outputting power to avoid a reverse current phenomenon.

Abstract: A semiconductor device having a high-k gate dielectric, and a method of manufacture, is provided. A gate dielectric layer is formed over a substrate. An interfacial layer may be interposed between the gate dielectric layer and the substrate. A barrier layer, such as a TiN layer, having a higher concentration of nitrogen along an interface between the barrier layer and the gate dielectric layer is formed. The barrier layer may be formed by depositing, for example, a TiN layer and performing a nitridation process on the TiN layer to increase the concentration of nitrogen along an interface between the barrier layer and the gate dielectric layer. A gate electrode is formed over the barrier layer.

Abstract: A semiconductor device having a high-k gate dielectric, and a method of manufacture, is provided. A gate dielectric layer is formed over a substrate. An interfacial layer may be interposed between the gate dielectric layer and the substrate. A barrier layer, such as a TiN layer, having a higher concentration of nitrogen along an interface between the barrier layer and the gate dielectric layer is formed. The barrier layer may be formed by depositing, for example, a TiN layer and performing a nitridation process on the TiN layer to increase the concentration of nitrogen along an interface between the barrier layer and the gate dielectric layer. A gate electrode is formed over the barrier layer.

Abstract: A power supply apparatus includes a rectification circuit, a power factor correction circuit, an auxiliary boost circuit and a direct current to direct current conversion circuit. The auxiliary boost circuit includes an input contact, an output contact, a voltage detection unit, a control unit, a boost unit and a boost bypass unit. When a voltage value of a power factor correction power is not greater than a predetermined voltage value, the control unit is configured to turn off the boost bypass unit and turn on the boost unit, so that the boost unit boosts the power factor correction power and then the power factor correction power is sent to the direct current to direct current conversion circuit through the boost unit and the output contact.

Abstract: A power supply apparatus includes a rectification circuit, a power factor correction circuit, an auxiliary boost circuit and a direct current to direct current conversion circuit. The auxiliary boost circuit includes an input contact, an output contact, a voltage detection unit, a control unit, a boost unit and a boost bypass unit. When a voltage value of a power factor correction power is not greater than a predetermined voltage value, the control unit is configured to turn off the boost bypass unit and turn on the boost unit, so that the boost unit boosts the power factor correction power and then the power factor correction power is sent to the direct current to direct current conversion circuit through the boost unit and the output contact.

Abstract: A semiconductor device having a high-k gate dielectric, and a method of manufacture, is provided. A gate dielectric layer is formed over a substrate. An interfacial layer may be interposed between the gate dielectric layer and the substrate. A barrier layer, such as a TiN layer, having a higher concentration of nitrogen along an interface between the barrier layer and the gate dielectric layer is formed. The barrier layer may be formed by depositing, for example, a TiN layer and performing a nitridation process on the TiN layer to increase the concentration of nitrogen along an interface between the barrier layer and the gate dielectric layer. A gate electrode is formed over the barrier layer.

Abstract: A method for manufacturing a semiconductor device is provided. A substrate having a first area with a first poly layer and a second area with a second poly layer is provided. A nitride HM film is then deposited above the first poly layer of a first device in the first area and above the second poly layer in the second area. Afterwards, a first patterned passivation is formed on the nitride HM film in the first area to cover the nitride HM film and the first device, and a second patterned passivation is formed above the second poly layer in the second area. The second poly layer in the second area is defined by the second patterned passivation.

Abstract: A method for manufacturing a semiconductor device is provided. A substrate having a first area with a first poly layer and a second area with a second poly layer is provided. A nitride HM film is then deposited above the first poly layer of a first device in the first area and above the second poly layer in the second area. Afterwards, a first patterned passivation is formed on the nitride HM film in the first area to cover the nitride HM film and the first device, and a second patterned passivation is formed above the second poly layer in the second area. The second poly layer in the second area is defined by the second patterned passivation.

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a substrate, forming an interfacial layer on the substrate by treating the substrate with radicals, and forming a high-k dielectric layer on the interfacial layer. The radicals are selected from the group consisting of hydrous radicals, nitrogen/hydrogen radicals, and sulfur/hydrogen radicals.

Abstract: The present invention provides for novel metallacycles and processes for making the same.

Abstract: A magnetic tunneling junction structure for magnetic random access memory is disclosed. A composite structure includes at least a pinning layer, a barrier layer, a ferromagnetic layer and a free layer, and the material of the pinning layer and the free layer are perpendicularly anisotropic ferrimagnetic. As the structures include of several barrier layers, free layers and ferrimagnetic layers, that lower coercivity and high squareness for the hysteresis curves can be obtained, and reduction of the coercivity of the free layer can be achieved.

Abstract: A construction device includes a rack secured to one or more rods with one or more couplers. Each coupler includes a bore for receiving the rod, a base portion, a wall extended upward from the base portion and a panel extended downward from the base portion. The bottom portions of the panels are inclined relative to the wall for engaging with the rods and for securing the couplers to the rods. The couplers may further include one or more protrusions for engaging with the grooves formed in the rods and for further securing the coupler to the rod.