Abstract: A method including clamping an integrated circuit package substrate between first and second supporting substrates; exposing the clamped package substrate to a heat source from a single direction; and modifying a shape of the package substrate. An apparatus including a first and second supporting substrates, the first supporting substrate including a two-dimensional area that is 75 percent to 95 percent of the area of the first side of the package substrate and the second supporting substrate including a two-dimensional area that is at least equivalent to the area of a package substrate and each of the first supporting substrate and the second supporting substrate include a body having a cavity therein such that when assembled on opposite sides of a package substrate, each cavity has a volume dimension such that the body of the supporting substrate is not in contact with an area of a package substrate.

Abstract: An organic-inorganic hybrid structure is described for integrated circuit packages. In one example, an integrated circuit package includes a ceramic frame having a top side and a bottom side, the top side having a pocket with a bottom floor and a plurality of conductive through holes in the bottom floor, an integrated circuit die attached to the bottom floor over the conductive through holes, and a redistribution layer on the bottom side connected to the conductive through holes.

Abstract: A system may include a first integrated circuit die comprising a first upper surface, an integrated circuit package substrate comprising a second upper surface, a wire coupled to the a first upper surface and to the second upper surface, a plurality of elements coupled to the first upper surface, and a second integrated circuit die coupled to the plurality of elements. A portion of the wire is disposed between the first integrated circuit die and the second integrated circuit die.

Abstract: A ball grid array device includes a substrate, further including a first major surface and a second major surface. An array of pads is positioned on one of the first major surface or the second major surface. At least some of the pads include a barrier layer having pores or openings therein. When solder is placed on the pad, the barrier layer forms an intermetallic compound at a rate different from the rate of the intermetallic compound formed between the pad and the solder. The result is a solder ball on a pad that has a first intermetallic compound and a second intermetallic compound.

Abstract: A method for forming a via in an integrated circuit packaging substrate includes embedding an interfacial adhesion layer at a base of a via, and heating the materials at the base of the via. Embedding the interfacial adhesion layer further includes placing a conductive material over the interfacial adhesion layer. An interfacial layer material is deposited within at the base of opening and a conductive material is placed over the interfacial material. The interfacial layer material is a material that will diffuse into the conductive material at the temperature produced by heating the materials at the base of the via opening. Heating the materials at the base of the via opening includes directing energy from a laser at the base of the opening. An integrated circuit packaging substrate includes a first layer of conductive material, and a second layer of conductive material.

Abstract: A system may include a first integrated circuit die comprising a first upper surface, an integrated circuit package substrate comprising a second upper surface, a wire coupled to the a first upper surface and to the second upper surface, a plurality of elements coupled to the first upper surface, and a second integrated circuit die coupled to the plurality of elements. A portion of the wire is disposed between the first integrated circuit die and the second integrated circuit die.

Abstract: In some embodiments, a substrate slot design for die stack packaging is presented. In this regard, an apparatus is introduced having a top integrated circuit die, a bottom integrated circuit die, and a substrate, including a slot through which the bottom integrated circuit die is wirebonded to contacts on a bottom surface of the substrate. Other embodiments are also disclosed and claimed.

Abstract: A method for forming a via in an integrated circuit packaging substrate includes embedding an interfacial adhesion layer at a base of a via, and heating the materials at the base of the via. Embedding the interfacial adhesion layer further includes placing a conductive material over the interfacial adhesion layer. An interfacial layer material is deposited within at the base of opening and a conductive material is placed over the interfacial material. The interfacial layer material is a material that will diffuse into the conductive material at the temperature produced by heating the materials at the base of the via opening. Heating the materials at the base of the via opening includes directing energy from a laser at the base of the opening. An integrated circuit packaging substrate includes a first layer of conductive material, and a second layer of conductive material.