Abstract: The disclosure relates to power modules that include elevated inductors with capacitors disposed under the inductors. In one aspect, a power module includes a first circuit board having a first surface and a second surface opposite the first surface. One or more inductors are mounted on the first surface. Each of the one or more inductors includes a top surface and a bottom surface opposite the top surface and that faces the first surface of the first circuit board. Each inductor is elevated above the first surface of the first circuit board such that at least a portion of the bottom surface of the inductor does not contact the first surface of the first circuit board. The first circuit board includes capacitors arranged in an area below the portion of the bottom surface of the inductor that does not contact the first surface of the first circuit board.

Abstract: The disclosure relates to power modules that include elevated inductors with capacitors disposed under the inductors. In one aspect, a power module includes a first circuit board having a first surface and a second surface opposite the first surface. One or more inductors are mounted on the first surface. Each of the one or more inductors includes a top surface and a bottom surface opposite the top surface and that faces the first surface of the first circuit board. Each inductor is elevated above the first surface of the first circuit board such that at least a portion of the bottom surface of the inductor does not contact the first surface of the first circuit board. The first circuit board includes capacitors arranged in an area below the portion of the bottom surface of the inductor that does not contact the first surface of the first circuit board.

Abstract: An apparatus that includes an interposer, first power connectors that are disposed on a first surface and that receive respective power inputs from one or more power sources, second power connectors that are disposed on the second surface and that receive a respective third power connecter of an integrated circuit when the integrated circuit is mounted on the second surface of the interposer, a plurality of switches formed within the interposer, control circuitry formed within the interposer, and a sequencer circuit coupled to the control input of the control circuitry and that generates a different values for a control input signal that causes the control logic of the control circuitry to generate a corresponding set of switch signals, and the plurality of different values for the control input signal are generated according to a predefined sequence to provide power to the integrated circuit according to power up sequence.

Abstract: An apparatus that includes an interposer, first power connectors that are disposed on a first surface and that receive respective power inputs from one or more power sources, second power connectors that are disposed on the second surface and that receive a respective third power connecter of an integrated circuit when the integrated circuit is mounted on the second surface of the interposer, a plurality of switches formed within the interposer, control circuitry formed within the interposer, and a sequencer circuit coupled to the control input of the control circuitry and that generates a different values for a control input signal that causes the control logic of the control circuitry to generate a corresponding set of switch signals, and the plurality of different values for the control input signal are generated according to a predefined sequence to provide power to the integrated circuit according to power up sequence.

Abstract: An electromagnetic interference (“EMI”) sheet attenuator includes a planar conductive layer, a first flexible substrate and a second flexible substrate. The first flexible substrate overlies the metal backing layer and including a conductive pattern on a surface of the first flexible substrate. The second flexible substrate overlies the first flexible substrate and also includes the conductive pattern. The conductive pattern on the second flexible substrate is aligned with the conductive pattern on the first flexible substrate.

Abstract: An apparatus that includes an interposer, first power connectors that are disposed on a first surface and that receive respective power inputs from one or more power sources, second power connectors that are disposed on the second surface and that receive a respective third power connector of an integrated circuit when the integrated circuit is mounted on the second surface of the interposer, a plurality of switches formed within the interposer, control circuitry formed within the interposer, and a sequencer circuit coupled to the control input of the control circuitry and that generates a different values for a control input signal that causes the control logic of the control circuitry to generate a corresponding set of switch signals, and the plurality of different values for the control input signal are generated according to a predefined sequence to provide power to the integrated circuit according to power up sequence.

Abstract: An apparatus that includes first and second parallel converter branches, each parallel converter branch including an input node, N output nodes, a plurality of switches, a converter output node, and control logic. The control logic generates a first set of switch signals to control the switches of the first parallel converter branch and a second set of switch signals to control the second parallel converter branch, the first set switch signals and the second set of switch signals having respective duty cycles to cause each of the first and second parallel converter branches to output the DC output voltage on each of the N output nodes.

Abstract: An apparatus that includes first and second parallel converter branches, each parallel converter branch including an input node, N output nodes, a plurality of switches, a converter output node, and control logic. The control logic generates a first set of switch signals to control the switches of the first parallel converter branch and a second set of switch signals to control the second parallel converter branch, the first set switch signals and the second set of switch signals having respective duty cycles to cause each of the first and second parallel converter branches to output the DC output voltage on each of the N output nodes.

Abstract: An apparatus that includes first and second parallel converter branches, each parallel converter branch including an input node, N output nodes, a plurality of switches, a converter output node, and control logic. The control logic generates a first set of switch signals to control the switches of the first parallel converter branch and a second set of switch signals to control the second parallel converter branch, the first set switch signals and the second set of switch signals having respective duty cycles to cause each of the first and second parallel converter branches to output the DC output voltage on each of the N output nodes.

Abstract: A housing for a portable electronic device including a first transparent curved portion configured to curve from a front face of the housing to a first side face of the housing; a second transparent curved portion configured to curve from the front face of the housing to a second side face of the housing; a third transparent curved portion configured to curve from a rear face of the housing to the first side face of the housing; and a fourth transparent curved portion configured to curve from the rear face of the housing to the second side face of the housing.

Abstract: A power-line adaptor comprising a communication interface configured to provide bidirectional communication with a camera via a communication connector and a power interface coupled to the communication interface and configured to connect to a power line via a power-line connector, the power interface being further configured to transmit data received from the camera via the communication interface over the power line and to transmit data received over the power line to the camera via the communication interface.

Abstract: An optical bus of an integrated circuit comprises: a polymer waveguide, a micromirror, and an optical coupler. The polymer waveguide is disposed in a via formed through at least one die layer of the integrated circuit comprising an active circuit. The micromirror is disposed adjacent to the via and optically coupled to the polymer waveguide. The optical coupler is connected to the polymer waveguide to couple the active circuit to the optical bus. A stacked integrated circuit is described comprising such an optical bus. A method of fabricating a rear 45° micromirror on a silicon substrate that can be used in the optical bus is also described. Furthermore, alignment/lock mechanisms for use in a stacked integrated circuit comprising first and second silicon substrates are described.

Abstract: A housing for a portable electronic device including a first transparent curved portion configured to curve from a front face of the housing to a first side face of the housing; a second transparent curved portion configured to curve from the front face of the housing to a second side face of the housing; a third transparent curved portion configured to curve from a rear face of the housing to the first side face of the housing; and a fourth transparent curved portion configured to curve from the rear face of the housing to the second side face of the housing.

Abstract: A housing for a portable electronic device including a first transparent curved portion configured to curve from a front face of the housing to a first side face of the housing; a second transparent curved portion configured to curve from the front face of the housing to a second side face of the housing; a third transparent curved portion configured to curve from a rear face of the housing to the first side face of the housing; and a fourth transparent curved portion configured to curve from the rear face of the housing to the second side face of the housing.

Abstract: An optical bus of an integrated circuit comprises: a polymer waveguide, a micromirror, and an optical coupler. The polymer waveguide is disposed in a via formed through at least one die layer of the integrated circuit comprising an active circuit. The micromirror is disposed adjacent to the via and optically coupled to the polymer waveguide. The optical coupler is connected to the polymer waveguide to couple the active circuit to the optical bus. A stacked integrated circuit is described comprising such an optical bus. A method of fabricating a rear 45° micromirror on a silicon substrate that can be used in the optical bus is also described. Furthermore, alignment/lock mechanisms for use in a stacked integrated circuit comprising first and second silicon substrates are described.

Abstract: A housing for a portable electronic device including a first transparent curved portion configured to curve from a front face of the housing to a first side face of the housing; a second transparent curved portion configured to curve from the front face of the housing to a second side face of the housing; a third transparent curved portion configured to curve from a rear face of the housing to the first side face of the housing; and a fourth transparent curved portion configured to curve from the rear face of the housing to the second side face of the housing.

Abstract: An optical bus (130) of an integrated circuit (100) comprises: a polymer waveguide (112), a micromirror (114, 116), and an optical coupler (120). The polymer waveguide (112) is disposed in a via (110) formed through at least one die layer (102, 104, 106) of the integrated circuit (100) comprising an active circuit (210). The micromirror (114) is disposed adjacent to the via (110) and optically coupled to the polymer waveguide (112). The optical coupler (120) is connected to the polymer waveguide (112) to couple the active circuit (210) to the optical bus (130). A stacked integrated circuit (100) is described comprising such an optical bus (130). A method (800) of fabricating a rear 45° micromirror on a silicon substrate that can be used in the optical bus (130) is also described. Furthermore, alignment/lock mechanisms for use in a stacked integrated circuit comprising first and second silicon substrates are described.

Abstract: Disclosed is a piezo-electrically actuated micro-mechanical deformable member comprising a corrugated longitudinal beam (521) formed in a substrate, and having a first anchored end (502) and a second end (509), as well as a plurality of piezoelectric film (PZET) actuating segments (522, 523, 524) formed in or on at least some grooves and ridges of the corrugated beam, the beam (521) being configured to assume one of a number of different geometric configurations depending upon which of a corresponding set of electric actuation signals (105) are applied to the PZET elements, the electric actuation signals establishing corresponding electric fields in the associated PZET segments to thereby deform the member.

Abstract: Disclosed is a piezo-electrically actuated micro-mechanical deformable member comprising a corrugated longitudinal beam (521) formed in a substrate, and having a first anchored end (502) and a second end (509), as well as a plurality of piezoelectric film (PZET) actuating segments (522, 523, 524) formed in or on at least some grooves and ridges of the corrugated beam, the beam (521) being configured to assume one of a number of different geometric configurations depending upon which of a corresponding set of electric actuation signals (105) are applied to the PZET elements, the electric actuation signals establishing corresponding electric fields in the associated PZET segments to thereby deform the member.

Abstract: An optical bus (130) of an integrated circuit (100) comprises: a polymer waveguide (112), a micromirror (114, 116), and an optical coupler (120). The polymer waveguide (112) is disposed in a via (110) formed through at least one die layer (102, 104, 106) of the integrated circuit (100) comprising an active circuit (210). The micromirror (114) is disposed adjacent to the via (110) and optically coupled to the polymer waveguide (112). The optical coupler (120) is connected to the polymer waveguide (112) to couple the active circuit (210) to the optical bus (130). A stacked integrated circuit (100) is described comprising such an optical bus (130). A method (800) of fabricating a rear 45° micromirror on a silicon substrate that can be used in the optical bus (130) is also described. Furthermore, alignment/lock mechanisms for use in a stacked integrated circuit comprising first and second silicon substrates are described.