Abstract: The present invention provides a circuit board with a plated-through hole, wherein a first end of the plated-through hole is electrically attached to a cap formed of conductive material. One or more surface pads terminate on a surface layer of the printed circuit board, and are connected to the cap by one or more vias extending from the cap to the one or more surface pads. In some embodiments, the circuit board is a substrate for mounting an integrated circuit, such as a ball-grid array integrated circuit. The invention includes methods for making the novel circuit board, as well as integrated circuit assemblies comprising the novel circuit board with an integrated circuit mounted thereto.

Abstract: A capacitor assembly having one or more capacitors embedded in the core layer of a package having integrated circuits (ICs) mounted thereon. Each embedded capacitor has plural pairs of first and second electrodes and the package core layer has plural sets of first and second vias dispersed over the pairs of electrodes and being connected thereto. A metal layer is provided on the core layer and includes a first portion having at least one metal strip and a second portion, electrically isolated from each strip. Each metal strip is positioned such that it is extended to overlie both the first electrode of a distinct pair of electrodes and the second electrode of an adjacent, succeeding pair of electrodes and effects a mutual electrical connection between them through first and second vias associated therewith, respectively.

Abstract: A four quadrant multiplier using multiple input floating-gate MOS transistors is provided. It is based on the square law characteristics of the MOS transistor and can be realised with only four floating gate MOS transistors, two resistors and a current source. The four floating gate transistors are configured with their sources connected in common and biased by a single current source. Output is taken between two common drain connections. Each transistor has three control gates with two being provided for selected ones of the two input signals and one for a biasing signal (optional). Input signals can be connected to the control gates in either a differential or single ended configuration. In one application, a programmable synaptic cell for neural networks employs the multi-input floating-gate MOS four-quadrant analog multiplier. Varying of the neural weight connection strength of each synaptic cell is achieved by two possible methods.