Patents by Inventor Chen-Ming Huang
Chen-Ming Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9437603Abstract: A flash memory device is disposed on a semiconductor substrate. The flash memory device includes flash memory cells arranged in rows and columns. Respective flash memory cells include respective access transistors and respective floating gate transistors. The respective access transistors have respective access gates, and the respective floating gate transistors have respective control gates arranged over respective floating gates. First and second wordlines extend substantially in parallel with one another and correspond to first and second rows which neighbor one another. The first wordline is coupled to access gates of access transistors along the first row. The second wordline is coupled to access gates of access transistors along the second row. Nearest edges of the first and second wordlines include at least one wing which extends laterally outward from a sidewall of one of the first and second wordlines towards a sidewall the other of the first and second wordlines.Type: GrantFiled: October 29, 2014Date of Patent: September 6, 2016Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chia-Ta Hsieh, Chi-Wei Ho, Kao-Chao Lin, Josh Lin, Nai-Chao Su, Shih-Jung Tu, Po-Kai Hsu, Shih-Ching Lee, Chen-Ming Huang
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Patent number: 9377503Abstract: A method performed using a resistive device, where the resistive device includes a substrate with an active region separated from a gate electrode by a dielectric and electrical contacts along a longest dimension of the gate electrode, the method comprising, performing one or more processes to form the resistive device, measuring a resistance between the electrical contacts, and correlating the measured resistance with a variation in one or more of the processes.Type: GrantFiled: April 7, 2014Date of Patent: June 28, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: An-Chun Tu, Chen-Ming Huang, Chih-Jen Wu, Chin-Hsiang Lin
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Publication number: 20160158087Abstract: A portable human exoskeleton system (1) includes a pelvis module (10), a leg module (20) and a foot module (30). The pelvis module (10) includes a bendable member (11) and a pelvis module connector (12). The foot module (30) includes a foot module connector (33). The leg module (20) includes: a femur module (21) detachably coupled to the pelvis module connector (12); a tibia module (22) detachably coupled to the foot module connector (33); and a knee joint component (23) having at least two linkages with different lengths wherein each linkage is pivotally coupled to the femur module (21) and the tibia module (22). Weight above the hip of the user is exerted on the pelvis module (10), and transferred to the leg module (20) and the foot module (30). The exoskeleton system is easily disassembled and carried, and can be worn inside attire without affecting appearance of the user.Type: ApplicationFiled: February 9, 2016Publication date: June 9, 2016Inventors: Chen-Ming HUANG, Yen-Chieh MAO
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Publication number: 20160141387Abstract: A fin shaped structure and a method of forming the same, wherein the method includes forming a fin structure on a substrate. Next, an insulation layer is formed on the substrate and surrounds the fin structure, wherein the insulation layer covers a bottom portion of the fin structure to expose an exposed portion of the fin structure protruded from the insulation layer. Then, a buffer layer is formed on the fin structure. Following this, a threshold voltage implantation process is performed to penetrate through the buffer layer after forming the insulation layer, to form a first doped region on the exposed portion of the fin structure.Type: ApplicationFiled: November 13, 2014Publication date: May 19, 2016Inventors: I-Ming Tseng, Rai-Min Huang, Tong-Jyun Huang, Kuan-Hsien Li, Chen-Ming Huang
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Patent number: 9330901Abstract: A method of forming a nitrogen-containing oxide film is disclosed. The method comprises (a) exposing a substrate to a first gas pulse having one of an oxygen-containing gas and a metal-containing gas; (b) exposing the substrate to a second gas pulse having the other of the oxygen-containing gas and the metal-containing gas to form an oxide film over the substrate; and (c) exposing the oxide film to a third gas pulse having a nitrogen-containing plasma to form a nitrogen-containing oxide film, wherein the nitrogen-containing oxide film has a nitrogen concentration between about 0.1 and about 3 atomic percent (at %).Type: GrantFiled: March 1, 2013Date of Patent: May 3, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: An-Chun Tu, Chih-Hong Hwang, Yi Hsien Lu, Chun-Heng Chen, Chen-Chien Li, Chih-Jen Wu, Kuei-Shu Chang-Liao, Chen-Ming Huang
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Publication number: 20160104713Abstract: A flash memory device is disposed on a semiconductor substrate. The flash memory device includes flash memory cells arranged in rows and columns. Respective flash memory cells include respective access transistors and respective floating gate transistors. The respective access transistors have respective access gates, and the respective floating gate transistors have respective control gates arranged over respective floating gates. First and second wordlines extend substantially in parallel with one another and correspond to first and second rows which neighbor one another. The first wordline is coupled to access gates of access transistors along the first row. The second wordline is coupled to access gates of access transistors along the second row. Nearest edges of the first and second wordlines include at least one wing which extends laterally outward from a sidewall of one of the first and second wordlines towards a sidewall the other of the first and second wordlines.Type: ApplicationFiled: October 29, 2014Publication date: April 14, 2016Inventors: Chia-Ta Hsieh, Chi-Wei Ho, Kao-Chao Lin, Josh Lin, Nai-Chao Su, Shih-Jung Tu, Po-Kai Hsu, Shih-Ching Lee, Chen-Ming Huang
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Publication number: 20160099179Abstract: A method of forming a semiconductor device is disclosed. A substrate having multiple fins is provided. An insulating layer fills a lower portion of a gap between two adjacent fins. At least one first stacked structure is formed on one fin and at least one second stacked structure is formed on one insulation layer. A first dielectric layer is formed to cover the first and second stacked structures. A portion of the first dielectric layer and portions of the first and second stacked structures are removed. Another portion of the first dielectric layer is removed until a top of the remaining first dielectric layer is lower than tops of the first and second stacked structures. A second dielectric layer is formed to cover the first and second stacked structures. A portion of the second dielectric layer is removed until the tops of the first and second stacked structures are exposed.Type: ApplicationFiled: October 3, 2014Publication date: April 7, 2016Inventors: Chun-Tsen Lu, Chih-Jung Su, Jian-Wei Chen, Shui-Yen Lu, Yi-Wen Chen, Po-Cheng Huang, Chen-Ming Huang, Shih-Fang Tzou
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Patent number: 9257326Abstract: A method of making a backside illuminated image sensor includes forming a first isolation structure in a pixel region of a substrate, where a bottom of the first isolation structure is exposed at a back surface of the substrate. The method further includes forming a second isolation structure in a peripheral region of the substrate, where the second isolation structure has a depth less than a depth of the first isolation structure. Additionally, the method includes forming an implant region adjacent to at least a portion of sidewalls of the first isolation structure, where the portion of the sidewalls is located closer to the back surface than a front surface of the substrate, and where the second isolation structure is free of the implant region.Type: GrantFiled: December 31, 2014Date of Patent: February 9, 2016Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Kuan-Chieh Huang, Chih-Jen Wu, Chen-Ming Huang, Dun-Nian Yaung, An-Chun Tu
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Patent number: 9250286Abstract: A method performed using a resistive device, where the resistive device includes a substrate with an active region separated from a gate electrode by a dielectric and electrical contacts along a longest dimension of the gate electrode, the method comprising, performing one or more processes to form the resistive device, measuring a resistance between the electrical contacts, and correlating the measured resistance with a variation in one or more of the processes.Type: GrantFiled: April 7, 2014Date of Patent: February 2, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: An-Chun Tu, Chen-Ming Huang, Chih-Jen Wu, Chin-Hsiang Lin
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Publication number: 20150255563Abstract: A method for manufacturing a semiconductor device is provided, comprising steps of providing a substrate with an underlying layer formed thereon; forming a gate layer overlying the underlying layer; and forming a multi-layer hard mask layer on the gate layer, and the multi-layer hard mask layer comprising a plurality of material layers and a top hard mask formed on the material layers, wherein the gate layer and the top hard mask contain the same element, such as silicon.Type: ApplicationFiled: March 4, 2014Publication date: September 10, 2015Applicant: United Microelectronics Corp.Inventors: Yen-Liang Wu, Chung-Fu Chang, Yu-Hsiang Hung, Man-Ling Lu, Cho-Han Fan, Ssu-I Fu, Chen-Ming Huang
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Publication number: 20150179502Abstract: Methods of making an integrated circuit are disclosed. An embodiment method includes etching a trench in a silicon substrate, depositing a first layer of isolation material in the trench, the first layer of isolation material projecting above surface of the silicon substrate, capping the first layer of isolation material by depositing a second layer of isolation material, the second layer of isolation material extending along at least a portion of sidewalls of the first layer of isolation material, epitaxially-growing a silicon layer upon the silicon substrate, the silicon layer horizontally adjacent to the second layer of isolation material, and forming a gate structure on the silicon layer, the gate structure defining a channel.Type: ApplicationFiled: March 6, 2015Publication date: June 25, 2015Inventors: Min Hao Hong, You-Hua Chou, Chih-Tsung Lee, Shiu-Ko JangJian, Miao-Cheng Liao, Hsiang Hsiang Ko, Chen-Ming Huang
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Publication number: 20150111334Abstract: A method of making a backside illuminated image sensor includes forming a first isolation structure in a pixel region of a substrate, where a bottom of the first isolation structure is exposed at a back surface of the substrate. The method further includes forming a second isolation structure in a peripheral region of the substrate, where the second isolation structure has a depth less than a depth of the first isolation structure. Additionally, the method includes forming an implant region adjacent to at least a portion of sidewalls of the first isolation structure, where the portion of the sidewalls is located closer to the back surface than a front surface of the substrate, and where the second isolation structure is free of the implant region.Type: ApplicationFiled: December 31, 2014Publication date: April 23, 2015Inventors: Kuan-Chieh HUANG, Chih-Jen WU, Chen-Ming HUANG, Dun-Nian YAUNG, An-Chun TU
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Patent number: 9006070Abstract: Methods of making an integrated circuit are disclosed. An embodiment method includes etching a trench in a silicon substrate, depositing a first layer of isolation material in the trench, the first layer of isolation material projecting above surface of the silicon substrate, capping the first layer of isolation material by depositing a second layer of isolation material, the second layer of isolation material extending along at least a portion of sidewalls of the first layer of isolation material, epitaxially-growing a silicon layer upon the silicon substrate, the silicon layer horizontally adjacent to the second layer of isolation material, and forming a gate structure on the silicon layer, the gate structure defining a channel.Type: GrantFiled: February 25, 2014Date of Patent: April 14, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Min Hao Hong, You-Hua Chou, Chih-Tsung Lee, Shiu-Ko JangJian, Miao-Cheng Liao, Hsiang-Hsiang Ko, Chen-Ming Huang
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Patent number: 8952474Abstract: Provided is a method of fabricating a backside illuminated image sensor that includes providing a device substrate having a frontside and a backside, where pixels are formed at the frontside and an interconnect structure is formed over pixels, forming a re-distribution layer (RDL) over the interconnect structure, bonding a first glass substrate to the RDL, thinning and processing the device substrate from the backside, bonding a second glass substrate to the backside, removing the first glass substrate, and reusing the first glass substrate for fabricating another backside-illuminated image sensor.Type: GrantFiled: October 4, 2012Date of Patent: February 10, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuan-Chieh Huang, Dun-Nian Yaung, Chih-Jen Wu, Chen-Ming Huang
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Patent number: 8946847Abstract: A backside illuminated image sensor includes a substrate with a substrate depth, where the substrate includes a pixel region and a peripheral region. The substrate further includes a front surface and a back surface. The backside illuminated image sensor includes a first isolation structure formed in the pixel region of the substrate, where a bottom of the first isolation structure is exposed at the back surface of the substrate. The backside illuminated image sensor includes a second isolation structure formed in the peripheral region of the substrate, where the second isolation structure has a depth less than a depth of the first isolation structure. The backside illuminated image sensor includes an implant region adjacent to at least a portion of sidewalls of each isolation structure in the pixel region.Type: GrantFiled: February 4, 2014Date of Patent: February 3, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuan-Chieh Huang, Chih-Jen Wu, Chen-Ming Huang, Dun-Nian Yaung, An-Chun Tu
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Patent number: 8809179Abstract: A method for forming a semiconductor structure includes providing a substrate; forming a gate stack of a flash memory cell, wherein a top portion of the gate stack comprises a capping layer; forming a gate having at least a portion over the capping layer; and reducing a thickness of the portion of the gate over the capping layer. The topography height difference between the flash memory cell and MOS devices on the same chip is reduced.Type: GrantFiled: March 9, 2007Date of Patent: August 19, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shih Wei Wang, Derek Lin, Chen-Ming Huang, Chang-Jen Hsieh, Chi-Hsin Lo, Chung-Yi Yu, Feng-Jia Shiu, Yeur-Luen Tu, Yi-Shin Chu, Jen-Sheng Yang
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Patent number: 8796105Abstract: A method for depositing a polysilazane on a semiconductor wafer is provided. The method includes steps of disposing a silazane onto the semiconductor wafer, and heating the silazane to form the polysilazane on the semiconductor wafer. An apparatus for preparing a polysilazane on a semiconductor wafer is also provided.Type: GrantFiled: July 25, 2012Date of Patent: August 5, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: You-Hua Chou, Chih-Tsung Lee, Min-Hao Hong, Ming-Huei Lien, Chih-Jen Wu, Chen-Ming Huang
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Patent number: 8791541Abstract: Provided is a method of fabricating a backside illuminated image sensor that includes providing a device substrate having a frontside and a backside, where pixels are formed at the frontside and an interconnect structure is formed over pixels, forming a re-distribution layer (RDL) over the interconnect structure, bonding a first glass substrate to the RDL, thinning and processing the device substrate from the backside, bonding a second glass substrate to the backside, removing the first glass substrate, and reusing the first glass substrate for fabricating another backside-illuminated image sensor.Type: GrantFiled: July 5, 2012Date of Patent: July 29, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuan-Chieh Huang, Dun-Nian Yaung, Chih-Jen Wu, Chen-Ming Huang
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Publication number: 20140206113Abstract: A method performed using a resistive device, where the resistive device includes a substrate with an active region separated from a gate electrode by a dielectric and electrical contacts along a longest dimension of the gate electrode, the method comprising, performing one or more processes to form the resistive device, measuring a resistance between the electrical contacts, and correlating the measured resistance with a variation in one or more of the processes.Type: ApplicationFiled: April 7, 2014Publication date: July 24, 2014Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: An-Chun Tu, Chen-Ming Huang, Chih-Jen Wu, Chin-Hsiang Lin
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Publication number: 20140203282Abstract: A method performed using a resistive device, where the resistive device includes a substrate with an active region separated from a gate electrode by a dielectric and electrical contacts along a longest dimension of the gate electrode, the method comprising, performing one or more processes to form the resistive device, measuring a resistance between the electrical contacts, and correlating the measured resistance with a variation in one or more of the processes.Type: ApplicationFiled: April 7, 2014Publication date: July 24, 2014Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: An-Chun Tu, Chen-Ming Huang, Chih-Jen Wu, Chin-Hsiang Lin