Abstract: A method, apparatus and system for detecting a timing of a server are provided. The method includes: identifying a state of a server when a power-on signal or a power-off signal of the server is detected; when the state of the server is a power-on state, respectively recording a timestamp when a Power Good (PG) signal of respective Voltage Regulator (VR) turns active; obtaining, according to the timestamp when the PG signal of the respective VR turns active, an actual output voltage timing of the respective VR when the server is powered on; when the state of the server is a power-off state, respectively recording a timestamp when the PG signal of the respective VR turns inactive; and obtaining, according to the timestamp when the PG signal of the respective VR turns inactive, the actual output voltage timing of the respective VR when the server is powered off.

Abstract: A method is described for determining well integrity including deploying seismic sensors in a wellbore; attaching a vibrational source to well hardware; using the vibrational source to generate seismic signal that moves through the wellbore; creating a seismic dataset by recording the seismic signal at the seismic sensors; and processing the seismic dataset to make a processed seismic image. The processed seismic image may be displayed on a graphical display in order to identify well integrity problems such as wellbore deformation, well casing damage, or problems with cement.

Abstract: Systems and methods are provided for correcting distributed acoustic sensing (DAS) data. The system can receive a seismic dataset with a plurality of initial seismic phase picks and a plurality of traces, and cross-correlate each of the plurality of initial seismic phase picks using the plurality of traces as reference traces. Each initial seismic phase pick can receive a set of corrected phase picks. The system can calculate a probability density function for each set of corrected phase picks. The system can select a peak of each probability density functions as accurate seismic phase picks. These accurate seismic phase picks can be used for event location in the DAS data.

Abstract: A method is described for predicting and preventing wellbore interactions at wells that are near the injection well. The method includes receiving fiber optics data; performing object detection by detecting object-like events in the fiber optic data; and sending instructions to a hydraulic fracturing system based on the object detection. The method is executed by a computer system.

Abstract: A method for adjusting the uniformity of a display is provided. The method includes the following steps. An angle sensor is disposed on a display. The display opposite to a measurement device is disposed on a rotation axis. The uniformity of a frame of the display at at least one use angle is measured by the measurement device, wherein the display is adjusted to a first use angle and is left still for a period of time, so that the uniformity of the display arranged at the first use angle has a first uniformity correction parameter; and a correspondence table relevant to the first use angle and the first uniformity correction parameter is stored to the display.

Abstract: A method is described for predicting and preventing wellbore interactions at wells that are near the injection well. The method includes receiving fiber optics data; performing object detection by detecting object-like events in the fiber optic data; and sending instructions to a hydraulic fracturing system based on the object detection. The method is executed by a computer system.

Abstract: There are provided a lighting control method, system, and device for an NVME backboard, and a medium. The method is applied to a mainboard. The method includes: executing a target code for parsing a target VPP signal upon reception of the target VPP signal, where the target code is added in the mainboard in advance and stores VPP addresses respectively corresponding to NVME backboards connected with the mainboard; parsing the target VPP signal to obtain a target VPP address corresponding to the target VPP signal; and delivering the target VPP address to a target NVME backboard corresponding to the target VPP address to light the target NVME backboard.

Abstract: There are provided a lighting control method, system, and device for an NVME backboard, and a medium. The method is applied to a mainboard. The method includes: executing a target code for parsing a target VPP signal upon reception of the target VPP signal, where the target code is added in the mainboard in advance and stores VPP addresses respectively corresponding to NVME backboards connected with the mainboard; parsing the target VPP signal to obtain a target VPP address corresponding to the target VPP signal; and delivering the target VPP address to a target NVME backboard corresponding to the target VPP address to light the target NVME backboard.

Abstract: A data storage device waking up from a sleep mode rapidly is disclosed. The data storage device uses a controller to operate a non-volatile memory. The controller has a microprocessor and a volatile memory. The microprocessor loads boot code from the non-volatile memory to a not-always-on area of the volatile memory according to a script loaded on an always-on area of the volatile memory. The microprocessor executes the boot code loaded on the not-always-on area to load an in-system program from the non-volatile memory to the not-always-on area for execution of the in-system program. The script loaded on the always-on area is loaded from the non-volatile memory, and the non-volatile memory is searched to load the script to the always-on area in response to powering on a data storage device containing the non-volatile memory from a power-off state.

Abstract: A data storage device is provided. The data storage includes: a flash memory, a dynamic random access memory (DRAM), and a memory controller. The flash memory stores a logical-to-physical mapping (L2P) table that is divided into a plurality of group-mapping (G2P) tables, and includes a first logical unit number (LUN) and a second LUN that are respectively controlled by a first chip enable (CE) signal and a second CE signal. The memory controller receives a write command from a host, and forms super page data using logical pages of data in the write command. The memory controller reads one of the group-mapping tables from the first LUN or the second LUN to the DRAM after sequentially enabling the first CE signal and second CE signal to write a first portion and a second portion of the super page data to the first LUN and the second LUN.

Abstract: A data storage device waking up from a sleep mode rapidly is disclosed. The data storage device uses a controller to operate a non-volatile memory. The controller has a microprocessor and a volatile memory. The microprocessor loads boot code from the non-volatile memory to a not-always-on area of the volatile memory according to a script loaded on an always-on area of the volatile memory. The microprocessor executes the boot code loaded on the not-always-on area to load an in-system program from the non-volatile memory to the not-always-on area for execution of the in-system program. The script loaded on the always-on area is loaded from the non-volatile memory, and the non-volatile memory is searched to load the script to the always-on area in response to powering on a data storage device containing the non-volatile memory from a power-off state.

Abstract: A data storage device waking up from a sleep mode rapidly is disclosed. The data storage device uses a controller to operate a non-volatile memory. The controller has a microprocessor and a volatile memory. The microprocessor loads boot code from the non-volatile memory to a not-always-on area of the volatile memory according to a script loaded on an always-on area of the volatile memory. The microprocessor executes the boot code loaded on the not-always-on area to load an in-system program from the non-volatile memory to the not-always-on area for execution of the in-system program.

Abstract: Various examples of the present disclosure provide a high efficient battery system, and systems and methods for intelligently discharging and charging the battery system such that an output voltage of the battery system is maintained within a predetermined voltage range. In some examples, a base board controller (BMC) is used to manage charging and discharging of the battery system. The BMC can provide both over-charging protection and over-discharging protection for the battery system.

Abstract: The present invention provides methods for characterizing obstructive sleep apnea (OSA) patients in the treatment of OSA, and devices thereof. The methods comprise measuring polysomnography of said patients; analyzing polysomnography, and determining a characteristic of the polysomnography and selections of suitable treatments based on the patterns.

Abstract: A power supply unit that allows measurement of the capacitance without interrupting operation of the unit is disclosed. The unit includes a controller that causes a voltage change of a capacitor from a first threshold voltage between two periods of time. The time difference of when the voltage reaches a second threshold voltage is measured and the capacitance is determined from the time measurement, voltage change and power dissipation. The determination of capacitance may be performed while the power supply unit is actively supplying power.

Abstract: The present disclosure includes a method for suppressing 4D noise. The method includes calculating a first similarity map based on the similarity of one of one or more first 3D images and a second 3D image. The first and second 3D images are derived from first and second surveys, respectively. The method also includes calculating a second similarity map based on the similarity of one of the one or more first 3D images and a third 3D image, which is derived from the second survey. The method also includes calculating a third similarity map based on the similarity of first and second 4D images, which are based on differences between the 3D images. The method also includes generating a composite 4D image based at least on the first, second, and third similarity maps. The present disclosure may also include associated systems and apparatus.

Abstract: Various examples of the present disclosure provide a high efficient battery backup (BBU) system and systems and methods for managing the BBU system through a microcontroller unit (MCU) and an ORing FET system of the BBU system. In some examples, a baseboard management controller (BMC) of a server system is used to control the MCU and the ORing FET system of the BBU system such that the BBU system can operate in multiple operating modes without a battery discharger. The operating modes of the BBU system includes, but are not limited to, a battery constant-current-charging mode, a battery constant-voltage-charging mode, a battery discharging mode, or a battery capacity calibration mode.

Abstract: A data storage device waking up from a sleep mode rapidly is disclosed. The data storage device uses a controller to operate a non-volatile memory. The controller has a microprocessor and a volatile memory. The microprocessor loads boot code from the non-volatile memory to a not-always-on area of the volatile memory according to a script loaded on an always-on area of the volatile memory. The microprocessor executes the boot code loaded on the not-always-on area to load an in-system program from the non-volatile memory to the not-always-on area for execution of the in-system program.

Abstract: A power supply unit that allows measurement of the capacitance without interrupting operation of the unit is disclosed. The unit includes a controller that causes a voltage change of a capacitor from a first threshold voltage between two periods of time. The time difference of when the voltage reaches a second threshold voltage is measured and the capacitance is determined from the time measurement, voltage change and power dissipation. The determination of capacitance may be performed while the power supply unit is actively supplying power.

Abstract: Various examples of the present disclosure provide a high efficient battery backup (BBU) system and systems and methods for managing the BBU system through a microcontroller unit (MCU) and an ORing FET system of the BBU system. In some examples, a baseboard management controller (BMC) of a server system is used to control the MCU and the ORing FET system of the BBU system such that the BBU system can operate in multiple operating modes without a battery discharger. The operating modes of the BBU system includes, but are not limited to, a battery constant-current-charging mode, a battery constant-voltage-charging mode, a battery discharging mode, or a battery capacity calibration mode.