Abstract: A method for polar encoding includes: receiving a message including information bits; encoding the message using a first polar code to obtain a first codeword; and encoding the message using a second polar code to obtain a second codeword. The second codeword includes two parts, and the first part of the second codeword is same as the first codeword. The method for polar encoding also includes transmitting the first codeword to a receiver in a first transmission; and transmitting the second part of the second codeword in a second transmission without transmitting the first part of the second codeword when the receiver is unable to decode the message based on the first codeword.

Abstract: A magnetic recording medium includes a substrate, an underlayer provided above the substrate, and a magnetic layer provided on and in contact with the underlayer. The underlayer includes a compound represented by a general formula MgO(1-x), where x falls within a range of 0.07 to 0.25. The magnetic layer includes an alloy having a L10 structure, and the alloy having the L10 structure includes one or more elements selected from a group consisting of Al, Si, Ga, and Ge.

Abstract: Embodiments of polar encoding/decoding methods and apparatuses are described. CRC encoding is performed on an information block to obtain a CRC encoded block with a length of B, where a CRC length is Lcrc, an information block length is K, and B=K+Lcrc. The CRC encoded block is interleaved. Lpc CRC bits in the interleaved encoded block are located between bits of the information block. Each CRC bit of the Lpc CRC bits is located after all bits checked by using the CRC bit. Lpc is an integer greater than 0 and less than Lcrc. The interleaved encoded block is mapped to information bits. A frozen bit is set to an agreed fixed value. Polar encoding is performed on the information bits and the frozen bit to obtain a polar encoded codeword to improve performance of a CA-polar code.

Abstract: The present disclosure relates to polar code encoding methods and apparatus. One example method includes separately performing check encoding on the at least two to-be-checked first bit sequences to obtain at least two check bit sequences, where a union set of the at least two to-be-checked first bit sequences includes the K information bits, and K is a positive integer, interleaving the K information bits and the at least two check bit sequences, or interleaving a first part of information bit sequence and a first check bit sequence to obtain an interleaved third bit sequence, where a second check bit sequence, a third check bit sequence, and a second part of information bit sequence in a sequence of all information bits except the first part of information bit sequence form a second bit sequence, and performing polar encoding on the second bit sequence.

Abstract: A thin film transistor, an array substrate, a display device and a method for manufacturing a thin film transistor are provided. The thin film transistor is formed on a base substrate and includes a source; a drain; and a semiconductor active layer having an amorphous silicon layer and one polysilicon portion or a plurality of polysilicon portions, the amorphous silicon layer being contacted with the one polysilicon portion or the plurality of polysilicon portions. The method includes a process of forming a source, a drain, and a semiconductor active layer: wherein forming a semiconductor active layer comprises: forming a first amorphous silicon thin film on a base substrate; and performing a crystallization treatment to the first amorphous silicon thin film to convert a part of the amorphous silicon in the first amorphous silicon thin film into polysilicon, such that a semiconductor active layer comprising one polysilicon portion or a plurality of polysilicon portions are formed.

Abstract: An encoding method and apparatus are provided. The method by a transmit end includes: performing check encoding on to-be-encoded information to obtain a check encoding codeword that comprises K information bits and J check bits; performing an interleaving operation on the check encoding codeword with an interleaving sequence including J subsequences, and an ith subsequence includes a position index of an element 1 in an intermediate result vector Ti and a value of (K+i), where 1?i?J, i is an integer, Ti=(˜M)&(Vi), M=M|(Vi), M is a masked vector, Vi is a column vector of a checking part matrix P, P is a submatrix of a generator matrix G for check encoding, ˜ represents a bit-by-bit NOT operation, & represents a bit-by-bit AND operation, and | represents a bit-by-bit OR operation; and performing polar encoding on a check encoding codeword obtained after the interleaving operation.

Abstract: A method for manufacturing a display substrate is provided to include: forming an amorphous silicon layer on a base substrate; irradiating at least part of the display region through a mask plate with a laser, to convert a portion of the amorphous silicon layer in the irradiated part of the display region corresponding to channel regions of active layers of transistors into polycrystalline silicon by a laser annealing process; irradiating at least part of the peripheral region with a laser, to convert the amorphous silicon layer in the irradiated part of the peripheral region into polycrystalline silicon; and forming the active layers of the transistors from the amorphous silicon layer which is converted to polycrystalline silicon by a patterning process.

Abstract: Disclosed is a display device, including a plurality of pixel circuits located in a display area, and a light-emitting driving circuit located in a non-display area and electrically connected to the plurality of pixel circuits; the light-emitting driving circuit includes a plurality of cascaded shift registers; except a last stage of shift register, a signal output terminal of each stage of remaining shift registers is electrically connected to an input signal terminal of a next stage of shift register adjacent thereto; each of the plurality of cascaded shift registers includes: an input circuit, a first node potential control circuit, a second node potential control circuit, a first isolation circuit, a second isolation circuit, a first output control circuit, a second output control circuit, a capacitor circuit, a first output circuit and a second output circuit.

Abstract: The present invention relates to a magnetic recording medium including a substrate; an underlayer laminated upon the substrate; and a magnetic layer laminated upon the underlayer, wherein the underlayer includes a first underlayer containing a compound represented by a following general formula: MgO(1-X), where X is within a range of 0.07 to 0.25, the magnetic layer includes a first magnetic layer containing an alloy having a L10 structure, and the alloy having the L10 structure includes B, and the first underlayer is in contact with the first magnetic layer.

Abstract: A magnetic recording medium includes a substrate; a soft magnetic underlayer laminated on the substrate; an amorphous barrier layer laminated on the soft magnetic underlayer; and a magnetic recording layer laminated on the amorphous barrier layer, wherein the soft magnetic underlayer includes Fe, B, Si, and one or more elements selected from the group consisting of Nb, Zr, Mo, and Ta, wherein the amorphous barrier layer includes Si, W, and one or more elements selected from the group consisting of Nb, Zr, Mo, and Ta, and wherein the magnetic recording layer includes an alloy having an L10 structure.

Abstract: Disclosed are an array substrate, a display panel and a display device. The display panel includes a plurality of sub-pixel regions; each of the sub-pixel regions includes a pixel driving circuit, a white electroluminescent device connected with the pixel driving circuit and a color resist layer corresponding to the sub-pixel region; the plurality of sub-pixel regions include a first-color sub-pixel region, a second-color sub-pixel region and a third-color sub-pixel region; a width-to-length ratio of a channel region of the driving transistor in the first-color sub-pixel region is greater than a width-to-length ratio of a channel region of the driving transistor in the second-color sub-pixel region, and the width-to-length ratio of the channel region of the driving transistor in the second-color sub-pixel region is greater than a width-to-length ratio of a channel region of the driving transistor in the third-color sub-pixel region.

Abstract: Disclosed is a display device, including a plurality of pixel circuits located in a display area, and a light-emitting driving circuit located in a non-display area and electrically connected to the plurality of pixel circuits; the light-emitting driving circuit includes a plurality of cascaded shift registers; except a last stage of shift register, a signal output terminal of each stage of remaining shift registers is electrically connected to an input signal terminal of a next stage of shift register adjacent thereto; each of the plurality of cascaded shift registers includes: an input circuit, a first node potential control circuit, a second node potential control circuit, a first isolation circuit, a second isolation circuit, a first output control circuit, a second output control circuit, a capacitor circuit, a first output circuit and a second output circuit.

Abstract: Provided are a control method and a device for active power of a wind power plant cluster. The wind power plant cluster includes wind power plants of m priorities, wherein m is a positive integer. The control method includes: monitoring the consumption capability of a power grid in real time, and determining object active power of the wind power plant cluster according to the consumption capability of the power grid; determining a command active power of the wind power plant within each priority according to the object active power of the wind power plant cluster in a descending order of the priorities; and controlling real active power of the wind power plant within each priority according to the command active power.

Abstract: A magnetic recording medium includes a substrate; a soft magnetic underlayer laminated on the substrate; an amorphous barrier layer laminated on the soft magnetic underlayer; and a magnetic recording layer laminated on the amorphous barrier layer, wherein the soft magnetic underlayer includes Fe, B, Si, and one or more elements selected from the group consisting of Nb, Zr, Mo, and Ta, wherein the amorphous barrier layer includes Si, W, and one or more elements selected from the group consisting of Nb, Zr, Mo, and Ta, and wherein the magnetic recording layer includes an alloy having an L10 structure.

Abstract: A display device and a manufacturing method thereof are disclosed. The display device includes a base substrate and at least one pixel circuit provided on the base substrate. The pixel circuit includes a driving transistor, a first transistor, and a second transistor; the base substrate includes a semiconductor body that can be doped, and a first conductive layer and a second conductive layer that are on the semiconductor body; the first transistor includes a first doped region in contact with the first electrode of the first transistor, and a second doped region in contact with a second electrode of the first transistor, and the first doped region of the first transistor and the second doped region of the first transistor are spaced apart from each other, have a same doping type, and are both in the semiconductor body.

Abstract: A heat-assisted magnetic recording medium includes: a substrate; an underlayer; and a magnetic layer including an alloy having an L10 structure, wherein the underlayer includes, from the substrate side, a bcc underlayer including a substance having a bcc structure, a first oxide layer that is in contact with the bcc underlayer, and a second oxide layer that is in contact with the magnetic layer. The bcc underlayer, the first oxide layer, and the second oxide layer are stacked in the recited order. The first oxide layer and the second oxide layer include magnesium oxide, and the second oxide layer further includes one or more compounds selected from the group consisting of vanadium oxide, vanadium nitride, and vanadium carbide.

Abstract: A magnetic recording medium includes a substrate, an underlayer, and a magnetic layer that are arranged in this order. The magnetic layer has a granular structure including magnetic grains having a L10 crystal structure, and grain boundary parts having a volume fraction in a range of 25 volume % to 50 volume %. The magnetic grains have a c-axis orientation with respect to the substrate. The grain boundary parts include a material having a lattice constant in a range of 0.30 nm to 0.36 nm, or in a range of 0.60 nm to 0.72 nm.

Abstract: This application provides an encoding method and apparatus in wireless communications between a network device and a terminal. The method includes: performing cyclic redundancy check (CRC) encoding on A to-be-encoded information bits based on a CRC polynomial, to obtain a first bit sequence, where the first bit sequence includes L CRC bits and A information bits, L=11; and performing polar encoding on the first bit sequence.

Abstract: A non-transitory computer-readable storage medium includes instructions for commissioning a power meter that has a Bluetooth Low Energy (BLE) communication capability, the instructions, when executed by one or more processors of a mobile device, cause the mobile device to discover the presence of the power meter by recognizing a signal produced by the Bluetooth Low Energy (BLE) communication capability of the power meter and receive a unique identifier for the power meter. When the received unique identifier matches a unique identifier stored by the power meter, the mobile device will establish a communication link between the mobile device and the power meter using the Bluetooth Low Energy (BLE) communication capability of the power meter and will transmit one or more commissioning parameters to the power meter via the established communication link between the mobile device and the power meter.

Abstract: The present disclosure relates to a thin film transistor and a manufacturing method thereof. The thin film transistor includes a substrate, a first semiconductor layer, a gate dielectric layer, and a gate electrode sequentially stacked on the substrate, the first semiconductor layer has a first portion located in a channel region of the thin film transistor and a second portion in source/drain regions of the thin film transistor and located on both sides of the first portion, the second portion and first sub-portions of the first portion adjacent to the second portion include an amorphous semiconductor material, a second sub-portion of the first portion between the first sub-portions includes a polycrystalline semiconductor material, and a second semiconductor layer located in the source/drain regions and in contact with the second portion, wherein a conductivity of the second semiconductor layer is higher than a conductivity of the amorphous semiconductor material.