Patents by Inventor Chen Yang

Chen Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12009161
    Abstract: A key structure includes a base and a linkage mechanism. The linkage mechanism includes a plurality of linking members movably connected to each other. The plurality of linking members includes at least two linking members rotatably positioned on the base, respectively. When a pressing force is applied to the linkage mechanism, the plurality of linking members move associated with each other to restrict a rotation range of the plurality of linking members with respect to the base.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: June 11, 2024
    Assignee: DARFON ELECTRONICS CORP.
    Inventors: Yu-Chun Hsieh, Ling-Hsi Chao, Shao-Lun Hsiao, Chen Yang
  • Publication number: 20240184941
    Abstract: A method for integrated design of compressor blade and casing treatment is applied in the field of turbomachinery. The method includes: determining a parameterization method for blade and casing treatment based on a compressor blade model and a casing treatment model, respectively; obtaining an initial parameter set by using a sampling technology; and obtaining a design with a wide stability margin by using an advanced optimization algorithm without reducing a compressor efficiency. The method may couple an interaction between blades and casing treatment, greatly improving fitness of the casing treatment, so that the compressor may operate stably over a wide working range and R&D costs may be saved.
    Type: Application
    Filed: October 25, 2023
    Publication date: June 6, 2024
    Inventors: Juan Du, Zhonggang Fan, Dun Ba, Min Zhang, Chen Yang, Xiaobin Xu
  • Publication number: 20240185916
    Abstract: The present disclosure relates to a sensing-memory-computing synergy device, chip and electronic device. The said device comprises: at least one sensing-memory-computing synergy cell, wherein each sensing-memory-computing synergy cell comprises K sensing elements, where the first end of each sensing element is connected to wordline, the second end of each sensing element is connected to bitline, the sensing element can sense changes in external inputs, and K is an integer greater than or equal to zero; a control module which controls the voltages of each wordline and bitline so that the sensing-memory-computing synergy cell can perform desired operations, and sense the voltage or current on bitlines to obtain the operation results. The present embodiment of the disclosure implements the sensing-memory-computing synergy cell by sensing elements, which combines sensing and in-memory computing.
    Type: Application
    Filed: November 28, 2023
    Publication date: June 6, 2024
    Applicant: TSINGHUA UNIVERSITY
    Inventors: Wenjun Tang, Xueqing Li, Weihang Long, Jialong Liu, Yilun Zhong, Chen Jiang, Huazhong Yang
  • Publication number: 20240186123
    Abstract: Embodiments of substrate supports for process chambers are provided herein. In some embodiments, a substrate support for a process chamber includes: a pedestal having a support surface for supporting a substrate, one or more heating elements disposed therein, and a radio frequency (RF) electrode disposed therein; a hollow shaft coupled to a lower surface of the pedestal; and an RF rod extending through the hollow shaft and coupled to the RF electrode, wherein an impedance of the RF rod is less than about 0.2 ohms.
    Type: Application
    Filed: December 2, 2022
    Publication date: June 6, 2024
    Inventors: Yao-Hung YANG, Chih-Yang CHANG, Yikai CHEN, Rongping WANG
  • Patent number: 12002522
    Abstract: A memory device and an operation method thereof are provided. The operation method includes: in a programming operation, programming a plurality of threshold voltages of a plurality of switches on a plurality of string select lines and a plurality of ground select lines as a first reference threshold voltage, and programming a plurality of threshold voltages of a plurality of dummy memory cells on a plurality of dummy word lines as being gradually increased along a first direction or a second direction, and the threshold voltages of the dummy memory cells being higher than the first reference threshold voltage; wherein the first direction being from the string select lines to a plurality of word lines and the second direction being from the ground select lines to the word lines.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: June 4, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Tao-Yuan Lin, I-Chen Yang, Yao-Wen Chang
  • Patent number: 11999258
    Abstract: A method of detecting safe and other states of battery while electric vehicle is being driven controls an inverter to generate ripple current on the battery; ripple voltages of a plurality of battery cells are measured, voltage phase shifts between the battery cells are calculated. The battery can be analyzed as normal or otherwise according to the voltage phase shift between plurality of the battery cells. A vehicle-mounted device and a non-volatile storage medium therein, for performing the above-described method, are also disclosed.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: June 4, 2024
    Assignee: GUANGZHOU AUTOMOBILE GROUP CO., LTD.
    Inventors: Chen Zhang, Meng Yao, Xiaohui Li, Bozhi Yang, Meng Wang
  • Patent number: 12003633
    Abstract: Disclosed are apparatuses, systems, and techniques to perform and facilitate secure ladder computational operations whose iterative execution depends on secret values associated with input data. Disclosed embodiments balance execution of various iterations in a way that is balanced for different secret values, significantly reducing vulnerability of ladder computations to adversarial side-channel attacks.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: June 4, 2024
    Assignee: Nvidia Corporation
    Inventors: Shuai Wang, Chen Yao, Xiao Wu, Rongzhe Zhu, Yuji Qian, Kun Yang, Weiping Pan, Xixi Xie
  • Patent number: 11999689
    Abstract: The present disclosure provides a method for extracting long chain dicarboxylic acid, the method comprising: (1) subjecting a long chain dicarboxylic acid fermentation broth to a primary membrane filtration treatment to give a first filtrate; subjecting the first filtrate to decolorization, crystallization, and solid-liquid separation to give a first solid; (2) redissolving the first solid in water to form a solution; subjecting the solution to decolorization, crystallization by acidification, and solid-liquid separation to give a second solid. By the method, the resulted long chain dicarboxylic acid product has a high purity and no residual organic solvent.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: June 4, 2024
    Assignees: Cathay Biotech Inc., CIBT America Inc., Cathay (Jinxiang) Biomaterial Co., Ltd.
    Inventors: Chen Yang, Shuhua Zhang, Yufeng Yang, Xiucai Liu
  • Patent number: 12000455
    Abstract: A method that includes measuring vibration levels in a semiconductor manufacturing apparatus, determining one or more sections of the semiconductor manufacturing apparatus that vibrate at levels greater than a predetermined vibration level, and reducing the vibration levels in the one or more sections to be at or within the predetermined vibration level by coupling one or more weights to an external surface of the semiconductor manufacturing apparatus in the one or more sections.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: June 4, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi Chen Ho, Chih Ping Liao, Chien Ting Lin, Jie-Ying Yang, Wei-Ming Wang, Ker-Hsun Liao, Chi-Hsun Lin
  • Patent number: 12000319
    Abstract: The invention provides a three-way catalytic converter preheating control method and system, a vehicle and a storage medium. The includes when the temperature of an exhaust pipe of the hybrid electric vehicle is lower than a first temperature threshold value, sending a first work instruction; the high-low pressure conversion module outputting a first working voltage according to the first working instruction so as to start preheating of a catalyst in a three-way catalytic converter; when working data of the hybrid electric vehicle meets the switching condition, sending a second working instruction to make the high-low voltage conversion module outputs a second working voltage and stops outputting the first working voltage so as to stop the electric heating. According to the invention, two working modes can be provided, and the power battery can be used for electrically heating the catalyst in advance through the high-low pressure conversion module.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: June 4, 2024
    Assignees: Zhejiang Geely Holding Group Co., Ltd., Ningbo Geely Royal Engine Components Co., Ltd., Aurobay Technology Co., Ltd.
    Inventors: Junqi Liu, Chen Yang, Shubo Li, Rongchun Ma, Jie Chen, Xudong Sun, Yige Xiao, Ruiping Wang
  • Patent number: 12002709
    Abstract: The present disclosure provides an interconnect structure, including a first metal line, a second metal line spaced away from the first metal line, a conductive contact over the first metal line, including a first portion, a second portion over the first portion, wherein a bottom width of the second portion is greater than a top width of the first portion, wherein a shortest distance between the second portion and the second metal line is in a range from 50 Angstrom to 200 Angstrom, and a third portion over the second portion, wherein a bottom width of the third portion is greater than a top width of the second portion, the entire first portion and the entire second portion are under a coverage of a vertical projection area of the third portion, a first layer, and a second layer over the first layer.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: June 4, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Hsiang-Wei Liu, Wei-Chen Chu, Chia-Tien Wu, Tai-I Yang
  • Publication number: 20240173396
    Abstract: Provided herein are multi-antigenic human papilloma virus (HPV) molecular vaccine constructs for use and treatment of HPV associated disorders and pathologies; such as HPV molecular vaccines targeting HPV6 and HPV11 associated pathologies.
    Type: Application
    Filed: November 23, 2021
    Publication date: May 30, 2024
    Inventors: Douglas E. BROUGH, Damodar R. ETTYREDDY, Qi YANG, Chen WANG
  • Publication number: 20240177756
    Abstract: A magnetic random access memory (MRAM) structure is provided. The MRAM structure includes a first write electrode, a first magnetic tunnel junction (MTJ) stack, a voltage control electrode, a second MTJ stack, and a second write electrode. The first MTJ stack includes a first free layer disposed on the first write electrode, a first tunnel barrier layer disposed on the first free layer, and a first fixed layer disposed on the first tunnel barrier layer. The voltage control electrode is disposed on the first MTJ stack. The second MTJ stack includes a second fixed layer disposed on the voltage control electrode, a second tunnel barrier layer disposed on the second fixed layer, and a second free layer disposed on the second tunnel barrier layer. The second write electrode is disposed on the second MTJ stack.
    Type: Application
    Filed: December 23, 2022
    Publication date: May 30, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Hsin-Han LEE, Jeng-Hua WEI, Shan-Yi YANG, Yu-Chen HSIN
  • Patent number: 11990418
    Abstract: A method for forming a chip package structure is provided. The method includes removing a first portion of a substrate to form a first recess in the substrate. The method includes forming a buffer structure in the first recess. A first Young's modulus of the buffer structure is less than a second Young's modulus of the substrate. The method includes forming a first wiring structure over the buffer structure and the substrate. The method includes bonding a chip package to the first wiring structure. The chip package has an interposer substrate and a chip structure over the interposer substrate, and a first corner of the interposer substrate and a second corner of the chip structure overlap the buffer structure in a top view of the chip package and the buffer structure.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Hua Wang, Po-Chen Lai, Ping-Tai Chen, Che-Chia Yang, Yu-Sheng Lin, Po-Yao Lin, Shin-Puu Jeng
  • Patent number: 11991886
    Abstract: A method of forming a ferroelectric random access memory (FeRAM) device includes: forming a first layer stack and a second layer stack successively over a substrate, where the first layer stack and the second layer stack have a same layered structure that includes a layer of a first electrically conductive material over a layer of a first dielectric material, where the first layer stack extends beyond lateral extents of the second layer stack; forming a trench that extends through the first layer stack and the second layer stack; lining sidewalls and a bottom of the trench with a ferroelectric material; conformally forming a channel material in the trench over the ferroelectric material; filling the trench with a second dielectric material; forming a first opening and a second opening in the second dielectric material; and filling the first opening and the second opening with a second electrically conductive material.
    Type: Grant
    Filed: January 9, 2023
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Meng-Han Lin, Bo-Feng Young, Han-Jong Chia, Sheng-Chen Wang, Feng-Cheng Yang, Sai-Hooi Yeong, Yu-Ming Lin
  • Patent number: 11990401
    Abstract: A device structure according to the present disclosure includes a passivation layer, a first conductor plate layer disposed on the passivation layer, a second conductor plate layer disposed over the first conductor layer, a third conductor plate layer disposed over the second conductor layer, and a fourth conductor plate layer disposed over the third conductor layer. The second conductor plate layer encloses the first conductor plate layer and the fourth conductor plate layer encloses the third conductor plate layer. The device structure, when used in a back-end-of-line passive device, reduces leakage and breakdown due to corner discharge effect.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Chieh Hsiao, Hsiang-Ku Shen, Yuan-Yang Hsiao, Chen-Chiu Huang, Dian-Hau Chen
  • Patent number: 11990295
    Abstract: An illuminated keyswitch includes a keycap, a pair of frames adapted to support the keycap in an up-down movement, the pair of frames disposed corresponding to each other and substantially rotatably coupled to each other to define an inner space under the keycap, a pair of elastic members connecting the pair of frames to be located at two opposite sides of the inner space, respectively, and an illumination light source disposed between the pair of elastic members in the inner space and adapted to provide an illumination light. During the up-down movement of the keycap, a vertical projection of the pair of frames surrounds the inner space without interfering therewith, so the illumination light passes the inner space to illuminate the keycap.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: May 21, 2024
    Assignee: DARFON ELECTRONICS CORP.
    Inventors: Chen Yang, Ling-Hsi Chao, Shao-Lun Hsiao, Yu-Chun Hsieh
  • Patent number: 11991633
    Abstract: The present disclosure provides a resource configuration method, a resource obtaining method, a network device and a terminal, so as to solve the problem that there is currently no scheme about how to configure a power-saving signal within an opportunity for DRX. The resource configuration method includes configuring a transmission resource for a power-saving signal within an opportunity for DRX statically or semi-statically.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: May 21, 2024
    Assignee: DATANG MOBILE COMMUNICATIONS EQUIPMENT CO., LTD.
    Inventors: Jiaqing Wang, Meiying Yang, Zheng Zhao, Chen Luo
  • Publication number: 20240160928
    Abstract: A method for enhancing kernel reparameterization of a non-linear machine learning model includes providing a predefined machine learning model, expanding a kernel of the predefined machine learning model with a non-linear network for convolution operation of the predefined machine learning model to generate the non-linear machine learning model, training the non-linear machine learning model, reparameterizing the non-linear network back to a kernel for convolution operation of the non-linear machine learning model to generate a reparameterized machine learning model, and deploying the reparameterized machine learning model to an edge device.
    Type: Application
    Filed: November 10, 2023
    Publication date: May 16, 2024
    Applicant: MEDIATEK INC.
    Inventors: Po-Hsiang Yu, Hao Chen, Cheng-Yu Yang, Peng-Wen Chen
  • Publication number: 20240161013
    Abstract: A reparameterization method for initializing a machine learning model includes initializing a prefix layer of a first low dimensional layer in the machine learning model and a postfix layer of the first low dimensional layer, inverting the prefix layer to generate an inverse prefix layer of the first low dimensional layer, inverting the postfix layer to generate an inverse postfix layer of the first low dimensional layer, combining the inverse prefix layer, the first low dimensional layer and the inverse postfix layer to form a high dimensional layer, generating parallel operation layers from the high dimensional layer, and assigning initial weights to the parallel operation layers.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 16, 2024
    Applicant: MEDIATEK INC.
    Inventors: Cheng-Yu Yang, Hao Chen, Po-Hsiang Yu, Peng-Wen Chen