Patents by Inventor Chen Ying
Chen Ying has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240153998Abstract: A method for the selective formation of epitaxial layers is described herein. In the method, epitaxial layers are deposited to form source and drain regions around a horizontal gate all around (hGAA structure). The method includes co-flowing a combination of chlorinated silicon containing precursors, antimony containing precursors, and n-type dopant precursors. The resulting source and drain regions are selectively grown from crystalline nanosheets or nanowires of the hGAA structure over the non-crystalline gate structure and dielectric layers. The source and drain regions are predominantly grown in a <110> direction.Type: ApplicationFiled: December 11, 2023Publication date: May 9, 2024Inventors: CHEN-YING WU, Abhishek DUBE, Yi-Chiau HUANG
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Publication number: 20240145240Abstract: Methods for selectively depositing an epitaxial layer are provided. In some implementations, the selective epitaxial deposition process includes providing the co-flow of chlorosilane precursors with at least one of an antimony-containing precursor and a phosphorous-containing precursor. The method utilizes co-flowing of multiple chlorosilane precursors to enable combination of silicon and at least one of phosphorous and antimony in the same matrix using a low-temperature selective process. The deposited epitaxial layer using the epitaxial deposition techniques described not only contains phosphorous and/or antimony but also has a high activated phosphorous and/or antimony concentration.Type: ApplicationFiled: October 18, 2023Publication date: May 2, 2024Applicant: Applied Materials, Inc.Inventors: Chen-Ying WU, Abhishek DUBE
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Patent number: 11966867Abstract: A technique includes displaying, by a computer using a graphical interface, a map of a geographical area, where the map includes political boundaries. The technique includes displaying, by the computer, graphical images on the map representing a plurality of aspects that are associated with the management of a plurality of projects as corresponding geographical features on the map. The technique includes graphically segregating, by the computer, the plurality of projects on the map using the political boundaries; receiving input, via interaction with the displayed map; and changing, by the computer, in response to the interaction, how a given aspect of the plurality of aspects of a given project of the plurality of projects is represented on the map.Type: GrantFiled: December 13, 2018Date of Patent: April 23, 2024Assignee: Micro Focus LLCInventors: Hai-Ying Liu, Chen Ding, Jing-Chun Xia
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Patent number: 11968512Abstract: In an example, a speaker device may include a first transducer and a second transducer. The first transducer may include a first diaphragm, a first magnetic circuit, and a first voice coil disposed in a magnetic gap of the first magnetic circuit to cause vibration of the first diaphragm. The second transducer may include a second diaphragm, a second magnet circuit, and a second voice coil disposed in a magnetic gap of the second magnetic circuit to cause vibration of the second diaphragm. Further, the speaker device may include a magnetic plate having a first surface coupled to the first transducer and a second surface coupled to the second transducer. The first surface is opposite to the second surface.Type: GrantFiled: June 22, 2022Date of Patent: April 23, 2024Assignee: Hewlett-Packard Development Company, L.P.Inventors: Yen-Hsin Ho, Yi-Ying Lai, Chen-Hui Hu, Chen-Yu Chang
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Patent number: 11959606Abstract: A package structure including a carrier, a photonic device, a supporting frame, and an encapsulant is provided. The photonic device is disposed on the carrier. The supporting frame is disposed on the carrier and surrounds the photonic device. The encapsulant covers the supporting frame and surrounds the photonic device.Type: GrantFiled: March 30, 2021Date of Patent: April 16, 2024Assignees: LITE-ON OPTO TECHNOLOGY (CHANGZHOU) CO., LTD., LITE-ON TECHNOLOGY CORPORATIONInventors: Chen-Hsiu Lin, Cheng-Ying Lee, Ming-Sung Tsai
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Publication number: 20240113262Abstract: A light-emitting device includes: a semiconductor stack, including a first semiconductor layer, an active region and a second semiconductor layer; a first contact electrode and a second contact electrode formed on the semiconductor stack, wherein the first contact electrode includes a first contact part formed on the first semiconductor layer and the second contact electrode includes a second contact part formed on the second semiconductor layer; an insulating stack formed on the semiconductor stack, including an opening on the second contact part; a first electrode pad and a second electrode pad formed on the insulating stack, wherein the second electrode pad filled in the opening and connecting the second contact part; wherein the second electrode pad includes an upper surface, and the upper surface includes a platform area and a depression area on the second contact part; wherein the platform area has a maximum height relative to other areas of the upper surface; wherein an area of a projection of the platType: ApplicationFiled: September 1, 2023Publication date: April 4, 2024Inventors: Hsin-Ying WANG, Hui-Chun YEH, Jhih-Yong YANG, Chen OU, Cheng-Lin LU
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Publication number: 20240111337Abstract: An electronic device including a body and a receptacle connector is provided. The body has a side wall surface, a receptacle slot located at the side wall surface, a waterproof protrusion protruding from the side wall surface, and two gutters located at the side wall surface, where the waterproof protrusion is located above the receptacle slot, and the two gutters are respectively located at two opposite sides of the receptacle slot. The receptacle connector is disposed in the receptacle slot.Type: ApplicationFiled: May 8, 2023Publication date: April 4, 2024Applicant: Acer IncorporatedInventors: Wei-Chih Wang, Chen-Min Hsiu, Chien-Yu Lee, Szu-Wei Yang, Fang-Ying Huang
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Patent number: 11948884Abstract: A semiconductor device includes: a substrate, including an upper surface and a first to a fourth side surfaces; wherein the upper surface includes a first edge connecting the first side surface and a second edge opposite to the first edge and connecting the second side surface; a first modified trace formed on the first side surface; and a semiconductor stack formed on the upper surface, including a lower surface connecting the upper surface of the substrate, and the lower surface comprises a fifth edge adjacent to the first edge and a sixth edge opposite to the fifth edge and adjacent to the second edge; wherein a shortest distance between the first edge and the fifth edge is S1 ?m, and a shortest distance between the second edge and the sixth edge is S2 ?m; wherein in a lateral view viewing from the third side surface, the first side surface forms a first acute angle with a degree of ?1 with the vertical direction, the second side surface forms a second acute angle with a degree of ?2 with the vertical direType: GrantFiled: August 24, 2021Date of Patent: April 2, 2024Assignee: EPISTAR CORPORATIONInventors: Lin Tzu Hsiang, Chen Chih Hao, Wu Wei Che, Chen Ying Chieh
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Patent number: 11948796Abstract: One or more embodiments described herein relate to selective methods for fabricating devices and structures. In these embodiments, the devices are exposed inside the process volume of a process chamber. Precursor gases are flowed in the process volume at certain flow ratios and at certain process conditions. The process conditions described herein result in selective epitaxial layer growth on the {100} planes of the crystal planes of the devices, which corresponds to the top of each of the fins. Additionally, the process conditions result in selective etching of the {110} plane of the crystal planes, which corresponds to the sidewalls of each of the fins. As such, the methods described herein provide a way to grow or etch epitaxial films at different crystal planes. Furthermore, the methods described herein allow for simultaneous epitaxial film growth and etch to occur on the different crystal planes.Type: GrantFiled: June 10, 2020Date of Patent: April 2, 2024Assignee: APPLIED MATERIALS, INC.Inventors: Yi-Chiau Huang, Chen-Ying Wu, Abhishek Dube, Chia Cheng Chin, Saurabh Chopra
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Patent number: 11944019Abstract: A memory device includes a substrate, a transistor disposed over the substrate, an interconnect structure disposed over and electrically connected to the transistor, and a memory stack disposed between two adjacent metallization layers of the interconnect structure. The memory stack includes a bottom electrode disposed over the substrate and electrically connected to a bit line, a memory layer disposed over the bottom electrode, a selector layer disposed over the memory layer, and a top electrode disposed over the selector layer and electrically connected to a word line. Besides, at least one moisture-resistant layer is provided adjacent to and in physical contact with the selector layer, and the at least one moisture-resistant layer includes an amorphous material.Type: GrantFiled: August 27, 2021Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Feng Hsu, Chien-Min Lee, Tung-Ying Lee, Cheng-Hsien Wu, Hengyuan Lee, Xinyu Bao
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Patent number: 11940659Abstract: An optical integrated circuit (IC) structure includes: a substrate including a fiber slot formed in an upper surface of the substrate and extending from an edge of the substrate, and an undercut formed in the upper surface and extending from the fiber slot; a semiconductor layer disposed on the substrate; a dielectric structure disposed on the semiconductor layer; an interconnect structure disposed in the dielectric structure; a plurality of vents that extend through a coupling region of the dielectric structure and expose the undercut; a fiber cavity that extends through the coupling region of dielectric structure and exposes the fiber slot; and a barrier ring disposed in the dielectric structure, the barrier ring surrounding the interconnect structure and routed around the perimeter of the coupling region.Type: GrantFiled: August 30, 2021Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Chen-Hao Huang, Hau-Yan Lu, Sui-Ying Hsu, Yuehying Lee, Chien-Ying Wu, Chia-Ping Lai
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Patent number: 11928456Abstract: The present disclosure provides a software upgrade system, which is applicable to at least one autonomous mobile robot installed with software in a data distribution service domain. The at least one autonomous mobile robot publishes a version information about the software to the version synchronization topic and receives other version information from the version synchronization topic. Also, the at least one autonomous mobile robot subscribes to a version synchronization topic, and takes the software of the at least one autonomous mobile robot itself as the latest version by a software update procedure to upload to a software update topic, or downloads the latest version of the software from the software update topic and installs it. The present disclosure provides a software upgrade method and a non-transitory recording medium.Type: GrantFiled: March 16, 2022Date of Patent: March 12, 2024Assignee: ADLINK TECHNOLOGY INC.Inventors: Chen-Ying Kuo, Cheng-Ting Chang, Yi-Chen Liu
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Publication number: 20240074337Abstract: A memory device includes a substrate, a bottom electrode disposed over the substrate, a top electrode disposed over the bottom electrode, and a phase change layer disposed between the top electrode and bottom electrode. The phase change layer includes a GeSbTe material that contains a Ge content of about 20 at % or less, a Sb content of about 30 at % or more, and a Te content of about 40 at % at or more.Type: ApplicationFiled: August 26, 2022Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hengyuan Lee, Cheng-Chun Chang, Chen-Feng Hsu, Tung-Ying Lee, Xinyu BAO
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Patent number: 11866969Abstract: An integrated hinge for connecting an article of a furniture assembly to one or more articles or a main body of the furniture assembly comprising a multi-rod rigid structure and a flexible membrane. The multi-rod rigid structure comprises two or more rods arranged in a default shape, wherein each of the rods functions as a hinge arm, and wherein the rods are lateral-rotatable or pivot-able about an intersecting or meeting point of the rods. The flexible membrane has a three-dimensional contour configured to wrap around the multi-rod rigid structure tightly, fixing the multi-rod rigid structure in its default shape. The flexible membrane can be configured to wrap around the integrated hinge and articles of furniture assembly forming a single integrated furniture piece. The elasticity in the flexible membrane turns the integrated hinge into a spring hinge.Type: GrantFiled: March 19, 2020Date of Patent: January 9, 2024Inventor: Chen Ying Paulina Chu
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Patent number: 11860451Abstract: Disclosed herein is a cleaning device for orthokeratology lens, comprising a housing, a cap, a gear module, two cleaning shaft, two cleaning head, and a rotating shaft. The housing comprises two orthokeratology lens bases and an opening. The cap is disposed on the opening. The cleaning shaft comprises a first end connecting to the gear module and a second end. The cleaning head is disposed on the second end of the cleaning shaft. The rotating shaft connects to the gear module.Type: GrantFiled: October 6, 2020Date of Patent: January 2, 2024Assignee: National Taipei University of TechnologyInventors: Hsu-Wei Fang, Chen-Ying Su, Hsiao-Hung Chiang
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Patent number: 11843033Abstract: A method for the selective formation of epitaxial layers is described herein. In the method, epitaxial layers are deposited to form source and drain regions around a horizontal gate all around (hGAA structure). The method includes co-flowing a combination of chlorinated silicon containing precursors, antimony containing precursors, and n-type dopant precursors. The resulting source and drain regions are selectively grown from crystalline nanosheets or nanowires of the hGAA structure over the non-crystalline gate structure and dielectric layers. The source and drain regions are predominantly grown in a <110> direction.Type: GrantFiled: April 15, 2021Date of Patent: December 12, 2023Assignee: Applied Materials, Inc.Inventors: Chen-Ying Wu, Abhishek Dube, Yi-Chiau Huang
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Publication number: 20230355394Abstract: Provided is an orthopedic composition, including: a powder composition including calcium sulfate hemihydrate, ?-tricalcium phosphate and hydroxypropyl methylcellulose; and a solvent including glycerol and water. The orthopedic composition exhibits improved washout resistance. A method of manufacturing the orthopedic composition and a bone graft set including the orthopedic composition are further provided.Type: ApplicationFiled: September 15, 2022Publication date: November 9, 2023Applicant: National Taipei University of TechnologyInventors: Hsu-Wei Fang, Hsiao-Hung Chiang, Chen-Ying Su
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Publication number: 20230357670Abstract: Provided are a polysaccharide composition and method capable of reducing, whether during pre-wear immersion or during post-wear cleaning, the amount of protein adsorbed on hard contact lenses and orthokeratology lenses. The polysaccharide composition and method reduce the amount of protein adsorbed on hard contact lenses and thereby prevent corneal abrasions and inflammations of the conjunctiva and cornea.Type: ApplicationFiled: August 8, 2022Publication date: November 9, 2023Applicant: National Taipei University of TechnologyInventors: Hsu-Wei Fang, Chen-Ying Su, You-Cheng Chang, Pin-Hsuan Huang, Ling-Hsiang Hsu
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Patent number: 11791158Abstract: Methods for depositing a silicon germanium tin boron (SiGeSn:B) film on a substrate are described. The method comprises exposing a substrate to a precursor mixture comprising a boron precursor, a silicon precursor, a germanium precursor, and a tin precursor to form a boron silicon germanium tin (SiGeSn:B) film on the substrate.Type: GrantFiled: January 17, 2022Date of Patent: October 17, 2023Assignee: Applied Materials, Inc.Inventors: Chen-Ying Wu, Yi-Chiau Huang
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Publication number: 20230214204Abstract: The present disclosure provides a software upgrade system, which is applicable to at least one autonomous mobile robot installed with software in a data distribution service domain. The at least one autonomous mobile robot publishes a version information about the software to the version synchronization topic and receives other version information from the version synchronization topic. Also, the at least one autonomous mobile robot subscribes to a version synchronization topic, and takes the software of the at least one autonomous mobile robot itself as the latest version by a software update procedure to upload to a software update topic, or downloads the latest version of the software from the software update topic and installs it. The present disclosure provides a software upgrade method and a non-transitory recording medium.Type: ApplicationFiled: March 16, 2022Publication date: July 6, 2023Inventors: CHEN-YING KUO, CHENG-TING CHANG, YI-CHEN LIU