Abstract: Aspects of the present disclosure relate to apparatus, systems, and methods of using atomic hydrogen radicals with epitaxial deposition. In one aspect, nodular defects (e.g., nodules) are removed from epitaxial layers of substrate. In one implementation, a method of processing substrates includes selectively growing an epitaxial layer on one or more crystalline surfaces of a substrate. The epitaxial layer includes silicon. The method also includes etching the substrate to remove a plurality of nodules from one or more non-crystalline surfaces of the substrate. The etching includes exposing the substrate to atomic hydrogen radicals. The method also includes thermally annealing the epitaxial layer to an anneal temperature that is 600 degrees Celsius or higher.

Abstract: The present disclosure relates to semiconductor processing methods for anisotropic film growth. The method includes heating a substrate positioned in a processing chamber. The method includes flowing one or more process gases over the substrate. The one or more process gases include trichlorosilane (TCS) and hydrochloric acid. The method includes depositing one or more layers on one or more fins on the substrate. The deposition of the one or more layers includes forming the one or more layers at a first growth rate along a first dimension and a second growth rate along a second dimension, and the second growth rate is faster than the first growth rate.

Abstract: Embodiments of the present disclosure relate to chamber kits, processing chambers, and related methods and components for gas activation applicable for semiconductor manufacturing. In one or more embodiments, a processing chamber includes a chamber body and one or more heat sources configured to heat a processing volume of the chamber body. The chamber body includes one or more gas inject passages formed in the chamber body, and one or more gas exhaust passages formed in the chamber body. The processing chamber includes a first pre-heat ring that includes a first opaque surface, and a second pre-heat ring that includes a second opaque surface. The first pre-heat ring and the second pre-heat ring define a first gas flow path between the first opaque surface and the second opaque surface, and the first gas flow path in fluid communication with at least one of the one or more gas inject passages.

Abstract: Disclosed herein is an isolated strain of Lactobacillus amylovorus LAM1345, which is deposited at Deutsche Sammlung von Mikroorganismen and Zellkulturen GmbH under an accession number DSM 33510. Also disclosed herein are a composition including the isolated strain of Lactobacillus amylovorus LAM1345 for reducing trimethylamine (TMA) and/or trimethylamine-n-oxide (TMAO) levels, and use of the isolated strain of Lactobacillus amylovorus LAM1345 for treating a disease associated with at least an elevated one of TMA and TMAO levels in a subject.

Abstract: Disclosed herein is an internally fixed lipid vesicle generated from a cell that substantially preserves the membrane characteristics of the cell and methods of using the internally fixed lipid vesicle.

Abstract: Aspects of the present disclosure relate to apparatus, systems, and methods of using atomic hydrogen radicals with epitaxial deposition. In one aspect, nodular defects (e.g., nodules) are removed from epitaxial layers of substrate. In one implementation, a method of processing substrates includes selectively growing an epitaxial layer on one or more crystalline surfaces of a substrate. The epitaxial layer includes silicon. The method also includes etching the substrate to remove a plurality of nodules from one or more non-crystalline surfaces of the substrate. The etching includes exposing the substrate to atomic hydrogen radicals. The method also includes thermally annealing the epitaxial layer to an anneal temperature that is 600 degrees Celsius or higher.

Abstract: A computer-implemented method for compliance checking related to goods in import supply chain logistics is provided, including: adding received legality data elements into a blockchain ledger corresponding to an importation of the goods; establishing a smart contract of the blockchain ledger; adding received sensing data elements corresponding to the smart contract into the blockchain ledger; adding electronic lock (e-Lock) status data corresponding to the smart contract into the blockchain ledger; and adding one or more inspection results corresponding to the smart contract into the blockchain ledger. Furthermore, determining, by the smart contract, whether the goods are within the compliance according to the received legality data elements, the received sensing data elements, the e-Lock status data and the one or more inspection results, wherein in response to determining that the goods are within the compliance, unsealing the e-Locks by sending a control signal to the e-Locks.

Abstract: A buffer layer may be included between a first conductive electrode layer and an insulator layer, and/or between a second conductive electrode layer and the insulator layer of a capacitor structure to reduce lattice mismatching in the capacitor structure. The buffer layer(s) include a combination of materials that promote lattice matching between the insulator layer and one or more of the conductive electrode layers. This reduces the likelihood of formation of structural defects in the capacitor structure relative to another capacitor structure that does not include the buffer layers.

Abstract: A method of generating an internally fixed lipid vesicle, comprising: providing a precursor lipid vesicle that contains an aqueous interior enclosed by a lipid membrane, wherein the lipid membrane of the precursor lipid vesicle is non-permeable to a crosslinker; permeabilizing the lipid membrane transiently to generate a permeable vesicle; contacting the permeable vesicle with an inactive activatable crosslinker, whereby the inactive activatable crosslinker enters the permeable vesicle; allowing the permeable vesicle to return to a non-permeable vesicle; removing any extravesicular crosslinker; and activating the inactive activatable crosslinker to allow crosslinking to occur inside the non-permeable vesicle, whereby an internally fixed lipid vesicle is generated.

Abstract: Embodiments described herein relate to a method of epitaxial deposition of p-channel metal oxide semiconductor (MMOS) source/drain regions within horizontal gate all around (hGAA) device structures. Combinations of precursors are described herein, which grow of the source/drain regions on predominantly <100> surfaces with reduced or negligible growth on <110> surfaces. Therefore, growth of the source/drain regions is predominantly located on the top surface of a substrate instead of the alternating layers of the hGAA structure. The precursor combinations include a silicon containing precursor, a germanium containing precursor, and a boron containing precursor. At least one of the precursors further includes chlorine.

Abstract: The present disclosure relates to overlapping substrate supports and pre-heat rings, and related process kits, processing chambers, methods, and components to facilitate process adjustability. In one or more embodiments, a substrate support applicable for use in semiconductor manufacturing includes a first side face and a second side face opposing the first side face. The first side face includes a support surface. The second side face includes a backside surface, and a first shoulder protruding relative to the backside surface. The first shoulder is disposed outwardly of the backside surface. The substrate support includes an arcuate outer face extending between the first side face and the second side face.

Abstract: A method of fabricating a semiconductor device includes forming an interconnect structure over a front side of a sensor substrate, thinning the sensor substrate from a back side of the sensor substrate, etching trenches into the sensor substrate, pre-cleaning an exposed surface of the sensor substrate, epitaxially growing a charge layer directly on the pre-cleaned exposed surface of the sensor substrate, and forming isolation structures within the etched trenches.

Abstract: A method for the selective formation of epitaxial layers is described herein. In the method, epitaxial layers are deposited to form source and drain regions around a horizontal gate all around (hGAA structure). The method includes co-flowing a combination of chlorinated silicon containing precursors, antimony containing precursors, and n-type dopant precursors. The resulting source and drain regions are selectively grown from crystalline nanosheets or nanowires of the hGAA structure over the non-crystalline gate structure and dielectric layers. The source and drain regions are predominantly grown in a <110> direction.

Abstract: Methods for selectively depositing an epitaxial layer are provided. In some implementations, the selective epitaxial deposition process includes providing the co-flow of chlorosilane precursors with at least one of an antimony-containing precursor and a phosphorous-containing precursor. The method utilizes co-flowing of multiple chlorosilane precursors to enable combination of silicon and at least one of phosphorous and antimony in the same matrix using a low-temperature selective process. The deposited epitaxial layer using the epitaxial deposition techniques described not only contains phosphorous and/or antimony but also has a high activated phosphorous and/or antimony concentration.

Abstract: A semiconductor device includes: a substrate, including an upper surface and a first to a fourth side surfaces; wherein the upper surface includes a first edge connecting the first side surface and a second edge opposite to the first edge and connecting the second side surface; a first modified trace formed on the first side surface; and a semiconductor stack formed on the upper surface, including a lower surface connecting the upper surface of the substrate, and the lower surface comprises a fifth edge adjacent to the first edge and a sixth edge opposite to the fifth edge and adjacent to the second edge; wherein a shortest distance between the first edge and the fifth edge is S1 ?m, and a shortest distance between the second edge and the sixth edge is S2 ?m; wherein in a lateral view viewing from the third side surface, the first side surface forms a first acute angle with a degree of ?1 with the vertical direction, the second side surface forms a second acute angle with a degree of ?2 with the vertical dire

Abstract: One or more embodiments described herein relate to selective methods for fabricating devices and structures. In these embodiments, the devices are exposed inside the process volume of a process chamber. Precursor gases are flowed in the process volume at certain flow ratios and at certain process conditions. The process conditions described herein result in selective epitaxial layer growth on the {100} planes of the crystal planes of the devices, which corresponds to the top of each of the fins. Additionally, the process conditions result in selective etching of the {110} plane of the crystal planes, which corresponds to the sidewalls of each of the fins. As such, the methods described herein provide a way to grow or etch epitaxial films at different crystal planes. Furthermore, the methods described herein allow for simultaneous epitaxial film growth and etch to occur on the different crystal planes.

Abstract: The present disclosure provides a software upgrade system, which is applicable to at least one autonomous mobile robot installed with software in a data distribution service domain. The at least one autonomous mobile robot publishes a version information about the software to the version synchronization topic and receives other version information from the version synchronization topic. Also, the at least one autonomous mobile robot subscribes to a version synchronization topic, and takes the software of the at least one autonomous mobile robot itself as the latest version by a software update procedure to upload to a software update topic, or downloads the latest version of the software from the software update topic and installs it. The present disclosure provides a software upgrade method and a non-transitory recording medium.

Abstract: An integrated hinge for connecting an article of a furniture assembly to one or more articles or a main body of the furniture assembly comprising a multi-rod rigid structure and a flexible membrane. The multi-rod rigid structure comprises two or more rods arranged in a default shape, wherein each of the rods functions as a hinge arm, and wherein the rods are lateral-rotatable or pivot-able about an intersecting or meeting point of the rods. The flexible membrane has a three-dimensional contour configured to wrap around the multi-rod rigid structure tightly, fixing the multi-rod rigid structure in its default shape. The flexible membrane can be configured to wrap around the integrated hinge and articles of furniture assembly forming a single integrated furniture piece. The elasticity in the flexible membrane turns the integrated hinge into a spring hinge.

Abstract: Disclosed herein is a cleaning device for orthokeratology lens, comprising a housing, a cap, a gear module, two cleaning shaft, two cleaning head, and a rotating shaft. The housing comprises two orthokeratology lens bases and an opening. The cap is disposed on the opening. The cleaning shaft comprises a first end connecting to the gear module and a second end. The cleaning head is disposed on the second end of the cleaning shaft. The rotating shaft connects to the gear module.

Abstract: A method for the selective formation of epitaxial layers is described herein. In the method, epitaxial layers are deposited to form source and drain regions around a horizontal gate all around (hGAA structure). The method includes co-flowing a combination of chlorinated silicon containing precursors, antimony containing precursors, and n-type dopant precursors. The resulting source and drain regions are selectively grown from crystalline nanosheets or nanowires of the hGAA structure over the non-crystalline gate structure and dielectric layers. The source and drain regions are predominantly grown in a <110> direction.