Patents by Inventor Chen-Yu Liu

Chen-Yu Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210364924
    Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate and selectively exposing the photoresist layer to actinic radiation to form a latent pattern. The latent pattern is developed by applying a developer composition to the selectively exposed photoresist layer to form a pattern in the photoresist layer. The developer composition includes: a first solvent having Hansen solubility parameters of 18>?d>3, 7>?p>1, and 7>?h>1; an organic acid having an acid dissociation constant, pKa, of ?11<pKa<4; and a Lewis acid, wherein the organic acid and the Lewis acid are different.
    Type: Application
    Filed: April 30, 2021
    Publication date: November 25, 2021
    Inventors: Chen-Yu LIU, Ming-Hui WENG, An-Ren ZI, Ching-Yu CHANG, Chin-Hsiang LIN
  • Publication number: 20210341844
    Abstract: A method includes illuminating radiation to a resist layer over a substrate to pattern the resist layer. The patterned resist layer is developed by using a positive tone developer. The patterned resist layer is rinsed using a basic aqueous rinse solution. A pH value of the basic aqueous rinse solution is lower than a pH value of the developer, and a rinse temperature of rinsing the patterned resist layer is in a range of about 20° C. to about 40° C.
    Type: Application
    Filed: July 16, 2021
    Publication date: November 4, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Hui WENG, Chen-Yu LIU, Cheng-Han WU, Ching-Yu CHANG, Chin-Hsiang LIN
  • Patent number: 11164844
    Abstract: In some embodiments, the present disclosure relates to a method of forming a package assembly. A wet etch stop layer is formed over a frontside of a semiconductor substrate. A sacrificial semiconductor layer is formed over the wet etch stop layer, and a dry etch stop layer is formed over the sacrificial semiconductor layer. A stack of semiconductor device layers may be formed over the dry etch stop layer. A bonding process is performed to bond the stack of semiconductor device layers to a frontside of an integrated circuit die, wherein the frontside of the semiconductor substrate faces the frontside of the integrated circuit die. A wet etching process is performed to remove the semiconductor substrate, and a dry etching process is performed to remove the wet etch stop layer and the sacrificial semiconductor layer.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: November 2, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen Yu Chen, Ming Chyi Liu, Eugene Chen
  • Patent number: 11155179
    Abstract: A system for battery binding includes a service end electronic device, at least one battery device and at least one carrier device. The service end electronic device is configured to send a carrier identifier corresponding to a carrier device to a battery device for storage therein in order to bind the battery device to the carrier device.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: October 26, 2021
    Assignee: KWANG YANG MOTOR CO., LTD.
    Inventors: Chen-Sheng Lin, Chung-Jui Hung, Yuh-Rey Chen, Po-Yu Chuang, Jen-Chiun Lin, Te-Chuan Liu
  • Patent number: 11143963
    Abstract: The present disclosure provides NTD developers and corresponding lithography techniques that can overcome resolution, line edge roughness (LER), and sensitivity (RLS) tradeoff barriers particular to extreme ultraviolet (EUV) technologies, thereby achieving high patterning fidelity for advanced technology nodes. An exemplary lithography method includes forming a negative tone resist layer over a workpiece; exposing the negative tone resist layer to EUV radiation; and removing an unexposed portion of the negative tone resist layer in a negative tone developer, thereby forming a patterned negative tone resist layer. The negative tone developer includes an organic solvent having a log P value greater than 1.82. The organic solvent is an ester acetate derivative represented by R1COOR2. R1 and R2 are hydrocarbon chains having four or less carbon atoms. In some implementations, R1, R2, or both R1 and R2 are propyl functional groups, such as n-propyl, isopropyl, or 2-methylpropyl.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: October 12, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Yu Liu, Wei-Han Lai, Tzu-Yang Lin, Ming-Hui Weng, Ching-Yu Chang, Chin-Hsiang Lin
  • Publication number: 20210302833
    Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate, including combining a first precursor and a second precursor in a vapor state to form a photoresist material, and depositing the photoresist material over the substrate. A protective layer is formed over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation through the protective layer to form a latent pattern in the photoresist layer. The protective layer is removed, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.
    Type: Application
    Filed: October 15, 2020
    Publication date: September 30, 2021
    Inventors: Ming-Hui WENG, Chen-Yu LIU, Chih-Cheng LIU, Yi-Chen KUO, Jia-Lin WEI, Yen-Yu CHEN, Jr-Hung LI, Yahru CHENG, Chi-Ming YANG, Tze-Liang LEE, Ching-Yu CHANG
  • Patent number: 11132941
    Abstract: A display panel and a pixel circuit of the display panel are provided. The pixel circuit includes a driving transistor and a light-emitting time length modulator. The driving transistor has a control terminal receiving a pulse width control signal and an amplitude control signal, and the driving transistor generates a driving signal. In a first time period, the light-emitting time length modulator modulates a time length of a plurality of second time periods for providing the driving signal to a light-emitting device according to a light-emitting time control signal.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: September 28, 2021
    Assignee: Au Optronics Corporation
    Inventors: Peng-Bo Xi, Chen-Chi Lin, Yan-Ru Chen, Cheng-Nan Yeh, Sheng-Yu Hsu, Chia-Che Hung, En-Chih Liu
  • Publication number: 20210286269
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a resist layer over a material layer, the resist layer includes an inorganic material. The inorganic material includes a plurality of metallic cores and a plurality of first linkers bonded to the metallic cores. The method includes forming a modified layer over the resist layer, and the modified layer includes an auxiliary. The method includes performing an exposure process on the modified layer and the resist layer, and removing a portion of the modified layer and a first portion of the resist layer by a first developer. The first developer includes a ketone-based solvent having a substituted or unsubstituted C6-C7 cyclic ketone, an ester-based solvent having a formula (b), or a combination thereof.
    Type: Application
    Filed: May 14, 2021
    Publication date: September 16, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Hui WENG, An-Ren ZI, Ching-Yu CHANG, Chin-Hsiang LIN, Chen-Yu LIU
  • Patent number: 11079681
    Abstract: A lithography method includes forming a resist layer over a substrate. The resist layer is exposed to radiation. The exposed resist layer is developed using a developer that removes an exposed portion of the exposed resist layer, thereby forming a patterned resist layer. The patterned resist layer is rinsed using a basic aqueous rinse solution.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: August 3, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Hui Weng, Chen-Yu Liu, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang Lin
  • Publication number: 20210202284
    Abstract: A lithography includes a storage tank that stores process chemical fluid, an anti-collision frame, and an integrated sensor assembly. The storage tank includes a dispensing port positioned at a lowest part of the storage tank in a gravity direction. The anti-collision frame is coupled to the storage tank. An integrated sensor assembly is disposed on at least one of the anti-collision frame and the storage tank to measure a variation in fluid quality in response to fluid quality measurement of fluid.
    Type: Application
    Filed: November 20, 2020
    Publication date: July 1, 2021
    Inventors: Tzu-Yang LIN, Cheng-Han WU, Chen-Yu LIU, Kuo-Shu TSENG, Shang-Sheng LI, Chen Yi HSU, Yu-Cheng CHANG
  • Patent number: 11009796
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a material layer over a substrate and forming a resist layer over the material layer. The resist layer includes an inorganic material and an auxiliary. The inorganic material includes a plurality of metallic cores and a plurality of first linkers bonded to the metallic cores. The method includes exposing a portion of the resist layer. The resist layer includes an exposed region and an unexposed region. In the exposed region, the auxiliary reacts with the first linkers. The method also includes removing the unexposed region of the resist layer by using a developer to form a patterned resist layer. The developer includes a ketone-based solvent having a formula (a) or the ester-based solvent having a formula (b).
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: May 18, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Hui Weng, An-Ren Zi, Ching-Yu Chang, Chin-Hsiang Lin, Chen-Yu Liu
  • Publication number: 20210134589
    Abstract: A method of forming a pattern in a photoresist includes forming a photoresist layer over a substrate, and selectively exposing the photoresist layer to actinic radiation to form a latent pattern. The latent pattern is developed by applying a developer composition to the selectively exposed photoresist layer to form a pattern. The developer composition includes a first solvent having Hansen solubility parameters of 15<?d<25, 10<?p<25, and 6<?h<30; an acid having an acid dissociation constant, pKa, of ?15<pKa<5, or a base having a pKa of 40>pKa>9.5; and a second solvent having a dielectric constant greater than 18. The first solvent and the second solvent are different solvents.
    Type: Application
    Filed: September 11, 2020
    Publication date: May 6, 2021
    Inventors: Ming-Hui WENG, An-Ren ZI, Ching-Yu CHANG, Chen-Yu LIU
  • Publication number: 20210107008
    Abstract: A portable isothermal amplification device with a portable heat source and a thermal sensor linking to a cloud environment via mobile devices with a mobile application of the present invention for determining the DNA information of samples with a given primer in a manner of point-of-collection (in the field). The cloud environment with mobile devices can provide isothermal amplification information that may include isothermal amplification related data (e.g., genetic information of organism, cancer cells or viruses of interest), analysis methods, solutions provided by experts for access, storage, analysis and consulting. The information may also include gene expression levels of interest, DNA identity of samples, as well as treatment suggestion and professional lists for consulting. In addition, the cloud environment can provide further solution, which is based on the sequence presence information generated from the devices for the end users.
    Type: Application
    Filed: October 9, 2020
    Publication date: April 15, 2021
    Applicant: Genalyze LLC
    Inventor: Chen-Yu Liu
  • Publication number: 20210103218
    Abstract: A method is provided including forming a first layer over a substrate and forming an adhesion layer over the first layer. The adhesion layer has a composition including an epoxy group. A photoresist layer is formed directly on the adhesion layer. A portion of the photoresist layer is exposed to a radiation source. The composition of the adhesion layer and the exposed portion of the photoresist layer cross-link using the epoxy group. Thee photoresist layer is then developed (e.g., by a negative tone developer) to form a photoresist pattern feature, which may overlie the formed cross-linked region.
    Type: Application
    Filed: December 7, 2020
    Publication date: April 8, 2021
    Inventors: Chen-Yu LIU, Tzu-Yang LIN, Ya-Ching CHANG, Ching-Yu CHANG, Chin-Hsiang LIN
  • Publication number: 20210063876
    Abstract: A photoresist includes a core group that contains metal, and one or more first ligands or one or more second ligands attached to the core group. The first ligands each have a following structure: The second ligands each have a following structure: represents the core group. L? represents a chemical that includes 0˜2 carbon atoms saturated by Hydrogen (H) or Fluorine (F). L represents a chemical that includes 1˜6 carbon atoms saturated by H or F. L? represents a chemical that includes 1˜6 carbon atoms saturated by H. L?? represents a chemical that includes 1˜6 carbon atoms saturated by H or F. Linker represents a chemical that links L? and L?? together.
    Type: Application
    Filed: November 12, 2019
    Publication date: March 4, 2021
    Inventors: An-Ren Zi, Chen-Yu Liu, Ching-Yu Chang
  • Patent number: 10859915
    Abstract: A method is provided including forming a first layer over a substrate and forming an adhesion layer over the first layer. The adhesion layer has a composition including an epoxy group. A photoresist layer is formed directly on the adhesion layer. A portion of the photoresist layer is exposed to a radiation source. The composition of the adhesion layer and the exposed portion of the photoresist layer cross-link using the epoxy group. Thee photoresist layer is then developed (e.g., by a negative tone developer) to form a photoresist pattern feature, which may overlie the formed cross-linked region.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: December 8, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Yu Liu, Tzu-Yang Lin, Ya-Ching Chang, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 10854850
    Abstract: An OLED display device includes a substrate, an active element array, at least one OLED, a light absorption layer or an optical scattering layer, and an encapsulation plate. The active element array and the OLED are disposed over an upper surface of the substrate. The OLED includes a first electrode, a second electrode, and an organic light-emitting layer. The first electrode is disposed on a side adjacent to the active element array, and the second electrode is opposite to the first electrode. Both the first and second electrodes have a high transmittance and a low reflection in a wavelength range of visible light. The organic light-emitting layer is interposed between the first and second electrodes. The light absorption layer or optical scattering layer is disposed between the OLED and the substrate. The encapsulation plate is disposed over the second electrode.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: December 1, 2020
    Assignee: TPK Touch Solutions Inc.
    Inventors: Chen-Yu Liu, Li-Wei Kung, Hsi-Chien Lin
  • Patent number: 10852890
    Abstract: A touch panel includes a substrate, a touch sensing electrode, a peripheral conductive trace, a protective layer, and a conductive layer. The substrate has a display area and a peripheral area. The touch sensing electrode is disposed in the display area. The peripheral conductive trace is disposed in the peripheral area. The touch sensing electrode is electrically connected to the peripheral conductive trace. The touch sensing electrode and the peripheral conductive trace at least include metal nanowires. The protective layer is disposed on the touch sensing electrode, and the conductive layer is disposed on the peripheral conductive trace.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: December 1, 2020
    Assignee: TPK Touch Solutions Inc.
    Inventors: Chen-Yu Liu, Bo-Ren Jian, Cheng-Ping Liu
  • Patent number: 10747114
    Abstract: The present disclosure provides a method for lithography patterning in accordance with some embodiments. The method includes forming a material layer on a substrate; forming a blocking layer on the material layer, wherein a bottom portion of the blocking layer reacts with the material layer, resulting in a capping layer that seals the material layer from an upper portion of the blocking layer. The method further includes forming a photoresist layer on the blocking layer; exposing the photoresist layer; and developing the photoresist layer, resulting in a patterned photoresist layer.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: August 18, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Siao-Shan Wang, Chen-Yu Liu, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 10691266
    Abstract: A touch panel stackup comprises a substrate having a substantially transparent first region and a substantially opaque second region, a sensing electrode detecting a tactile signal, a conductive circuit electrically coupled with the sensing electrode, and a masking element configured on the second region of the substrate, wherein the sensing electrode, the conductive circuit, and the masking element are integrally formed on the substrate.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: June 23, 2020
    Assignee: TPK TOUCH SOLUTIONS, INC.
    Inventors: Chen-Yu Liu, Cheng-Ping Liu