Patents by Inventor Cheng-Chou Hung

Cheng-Chou Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070236320
    Abstract: A substrate is provided and a top interconnection metal layer and a primary winding layer are formed thereon. Then a passivation layer having a plurality of via exposed parts of the top interconnection metal layer is formed on the substrate. A secondary winding layer and at least a bonding pad are formed on the passivation layer. The bonding pad electrically connects to the top interconnection metal layer through the via.
    Type: Application
    Filed: April 17, 2007
    Publication date: October 11, 2007
    Inventors: Cheng-Chou Hung, Hua-Chou Tseng, Victor-Chiang Liang, Yu-Chia Chen, Tsun-Lai Hsu
  • Publication number: 20070234554
    Abstract: A substrate is provided and a top interconnection metal layer and a primary winding layer are formed thereon. Then a passivation layer having a plurality of via exposed parts of the top interconnection metal layer is formed on the substrate. A secondary winding layer and at least a bonding pad are formed on the passivation layer. The bonding pad electrically connects to the top interconnection metal layer through the via.
    Type: Application
    Filed: April 6, 2006
    Publication date: October 11, 2007
    Inventors: Cheng-Chou Hung, Hua-Chou Tseng, Victor-Chiang Liang, Yu-Chia Chen, Tsun-Lai Hsu
  • Publication number: 20070210402
    Abstract: A varactor including a substrate, a P well disposed in the substrate, a gate structure disposed over the substrate, a p+ source disposed in the substrate at one side of the gate structure, a p+ drain disposed in the substrate at the other side of the gate structure, and a deep N well disposed in the substrate under the P well is provided. The gate oxide of the varactor is thicker so as to reduce the probability of the current leakage occurrence.
    Type: Application
    Filed: March 7, 2006
    Publication date: September 13, 2007
    Inventors: Yu-Chia Chen, Hua-Chou Tseng, Cheng-Chou Hung
  • Publication number: 20070181973
    Abstract: A capacitor structure including a plurality of conductive layers, a dielectric layer and a plurality of contacts is disclosed. The conductive layers are stacked, and each conductive layer has a first conductive pattern and a second conductive pattern. The dielectric layer is disposed between the first conductive pattern and the second conductive pattern and between two adjacent conductive layers. The contacts are disposed in the dielectric layer, and electrically connected to the first conductive patterns in two adjacent conductive layers and electrically connected to the second conductive patterns in two adjacent conductive layers. Wherein, the contact electrically connecting to the first conductive patterns in two adjacent conducive layers is a first strip contact, which extends between the first conductive patterns in two adjacent conductive layers, and the boundary of the first strip contact is located within the boundary of the first conductive pattern.
    Type: Application
    Filed: February 6, 2006
    Publication date: August 9, 2007
    Inventors: Cheng-Chou Hung, Victor Liang, Hua-Chou Tseng, Chih-Yu Tseng