Patents by Inventor Cheng-Chung Song
Cheng-Chung Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130275694Abstract: A method for migrating volumes in a storage system includes identifying an extent of data (belonging to a volume) requiring migration from a source extent to a target extent. The method allocates a selected number of copiers to the extent of data to migrate the extent of data from the source extent to the target extent. Each copier is configured to copy a unit of data, which is a smaller division of the extent of data. The method monitors destages (i.e., writes) that occur to the source extent as the copiers migrate the extent of data from the source extent to the target extent. In the event the destages occur faster than the copiers can copy units to the target extent, the method allocates additional copiers to the extent of data to assist in migrating the extent of data. A corresponding apparatus and computer program product are also disclosed.Type: ApplicationFiled: April 13, 2012Publication date: October 17, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Xue Dong Gao, Kurt A. Lovrien, Richard A. Ripberger, Cheng-Chung Song
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Patent number: 8549225Abstract: A method for efficiently using a large secondary cache is disclosed herein. In certain embodiments, such a method may include accumulating, in a secondary cache, a plurality of data tracks. These data tracks may include modified data and/or unmodified data. The method may determine if a subset of the plurality of data tracks makes up a full stride. In the event the subset makes up a full stride, the method may destage the subset from the secondary cache. By destaging full strides, the method reduces the number of disk operations that are required to destage data from the secondary cache. A corresponding computer program product and apparatus are also disclosed herein.Type: GrantFiled: March 26, 2012Date of Patent: October 1, 2013Assignee: Internatioal Business Machines CorporationInventors: Stephen LaRoux Blinick, Cheng-Chung Song, Lokesh Mohan Gupta, Yu-Cheng Hsu
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Publication number: 20130185493Abstract: Provided are a computer program product, system, and method for managing caching of extents of tracks in a first cache, second cache and storage device. A determination is made of an eligible track in a first cache eligible for demotion to a second cache, wherein the tracks are stored in extents configured in a storage device, wherein each extent is comprised of a plurality of tracks. A determination is made of an extent including the eligible track and whether second cache caching for the determined extent is enabled or disabled. The eligible track is demoted from the first cache to the second cache in response to determining that the second cache caching for the determined extent is enabled. Selection is made not to demote the eligible track in response to determining that the second cache caching for the determined extent is disabled.Type: ApplicationFiled: January 17, 2012Publication date: July 18, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael T. Benhase, Lokesh M. Gupta, Paul H. Muench, Cheng-Chung Song
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Patent number: 8453157Abstract: Provided are a method, system and article of manufacture, wherein a first application executes at least two threads corresponding to a simultaneous multi-threaded processor whose resources have been acquired by the first application. The at least two threads are synchronized before releasing the simultaneous multi-threaded processor to a second application.Type: GrantFiled: November 16, 2004Date of Patent: May 28, 2013Assignee: International Business Machines CorporationInventors: Michael Thomas Benhase, Yu-Cheng Hsu, John Norbert McCauley, Louis Alonso Rasor, William Griswold Sherman, Cheng-Chung Song
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Publication number: 20130073900Abstract: A method for improving the performance of a RAID under rebuild is disclosed. In one embodiment, such a method includes identifying a RAID requiring rebuild, such as by identifying a RAID having one or more failed storage-drive components. The method then automatically performs the following in response to identifying the RAID: the method identifies hot extents (i.e., extents most heavily accessed) in the RAID; the method migrates the hot extents from the identified failed RAID to a normal RAID not requiring rebuild, such as to an underused RAID; and the method rebuilds the failed RAID. The migration of the hot extents will ideally occur while the RAID is being rebuilt but may also be performed prior to the rebuild process. A corresponding apparatus and computer program product are also disclosed.Type: ApplicationFiled: September 20, 2011Publication date: March 21, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Chao Guang Li, Yao Peng, Cheng-Chung Song, Zhi Qiang Wang, Hui Zhang
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Patent number: 8380947Abstract: Input/output (I/O) activity in the multiple tier storage system is monitored to collect statistical information. The statistical information is recurrently transformed into an exponential moving average (EMA) of the I/O activity having a predefined smoothing factor. Data portions in the multiple tier storage system are sorted into buckets of varying temperatures corresponding to the EMA. At least one data migration plan is recurrently generated for matching the sorted data portions to at least one of an available plurality of storage device classes. One data portion sorted into a higher temperature bucket is matched with a higher performance storage device class of the available plurality of storage device classes than another data portion sorted into a lower temperature bucket.Type: GrantFiled: April 27, 2012Date of Patent: February 19, 2013Assignee: International Business Machines CorporationInventors: Lawrence Y. Chiu, Clement L. Dickey, Yu-Cheng Hsu, Joseph S. Hyde, II, Paul H. Muench, Cheng-Chung Song
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Patent number: 8375180Abstract: Input/output (I/O) activity in the multiple tier storage system is monitored to collect statistical information. The statistical information is recurrently transformed into an exponential moving average (EMA) of the I/O activity having a predefined smoothing factor. Data portions in the multiple tier storage system are sorted into buckets of varying temperatures corresponding to the EMA. At least one data migration plan is recurrently generated for matching the sorted data portions to at least one of an available plurality of storage device classes. One data portion sorted into a higher temperature bucket is matched with a higher performance storage device class of the available plurality of storage device classes than another data portion sorted into a lower temperature bucket.Type: GrantFiled: February 5, 2010Date of Patent: February 12, 2013Assignee: International Business Machines CorporationInventors: Lawrence Y. Chiu, Clement L. Dickey, Yu-Cheng Hsu, Joseph S. Hyde, II, Paul H. Muench, Cheng-Chung Song
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Publication number: 20120222012Abstract: Provided are techniques for receiving an error inject script that describes one or more error inject scenarios that define under which conditions at least one error inject is to be executed and compiling the error inject script to output an error inject data structure. While executing code that includes the error inject, an indication that an event has been triggered is received, conditions defined in the one or more error inject scenarios are evaluated using the error inject data structure, and, for each of the conditions that evaluates to true, one or more actions defined in the error inject script for the condition are performed.Type: ApplicationFiled: May 7, 2012Publication date: August 30, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Cheng-Chung Song
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Patent number: 8255627Abstract: A method for efficiently using a large secondary cache is disclosed herein. In certain embodiments, such a method may include accumulating, in a secondary cache, a plurality of data tracks. These data tracks may include modified data and/or unmodified data. The method may determine if a subset of the plurality of data tracks makes up a full stride. In the event the subset makes up a full stride, the method may destage the subset from the secondary cache. By destaging full strides, the method reduces the number of disk operations that are required to destage data from the secondary cache. A corresponding computer program product and apparatus are also disclosed and claimed herein.Type: GrantFiled: October 10, 2009Date of Patent: August 28, 2012Assignee: International Business Machines CorporationInventors: Stephen LaRoux Blinick, Cheng-Chung Song, Lokesh Mohan Gupta, Yu-Cheng Hsu
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Publication number: 20120215949Abstract: Input/output (I/O) activity in the multiple tier storage system is monitored to collect statistical information. The statistical information is recurrently transformed into an exponential moving average (EMA) of the I/O activity having a predefined smoothing factor. Data portions in the multiple tier storage system are sorted into buckets of varying temperatures corresponding to the EMA. At least one data migration plan is recurrently generated for matching the sorted data portions to at least one of an available plurality of storage device classes. One data portion sorted into a higher temperature bucket is matched with a higher performance storage device class of the available plurality of storage device classes than another data portion sorted into a lower temperature bucket.Type: ApplicationFiled: April 27, 2012Publication date: August 23, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Lawrence Y. CHIU, Clement L. DICKEY, Yu-Cheng HSU, Joseph S. HYDE, II, Paul H. MUENCH, Cheng-Chung SONG
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Publication number: 20120191904Abstract: A method for efficiently using a large secondary cache is disclosed herein. In certain embodiments, such a method may include accumulating, in a secondary cache, a plurality of data tracks. These data tracks may include modified data and/or unmodified data. The method may determine if a subset of the plurality of data tracks makes up a full stride. In the event the subset makes up a full stride, the method may destage the subset from the secondary cache. By destaging full strides, the method reduces the number of disk operations that are required to destage data from the secondary cache. A corresponding computer program product and apparatus are also disclosed herein.Type: ApplicationFiled: March 26, 2012Publication date: July 26, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Stephen L. Blinick, Lokesh M. Gupta, Yu-Cheng Hsu, Cheng-Chung Song
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Patent number: 8185895Abstract: A method, apparatus and program storage device for providing an anchor pointer in an operating system context structure for improving the efficiency of accessing thread specific data is provided. A kernel thread context structure is maintained in memory. A thread accesses a pointer memory in the kernel thread context structure and sets a value within the pointer memory that addresses data specific to the thread.Type: GrantFiled: November 30, 2005Date of Patent: May 22, 2012Assignee: International Business Machines CorporationInventors: Wenjeng Ko, William G. Sherman, Cheng-Chung Song
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Publication number: 20110289487Abstract: Provided are techniques for receiving an error inject script that describes one or more error inject scenarios that define under which conditions at least one error inject is to be executed and compiling the error inject script to output an error inject data structure. While executing code that includes the error inject, an indication that an event has been triggered is received, conditions defined in the one or more error inject scenarios are evaluated using the error inject data structure, and, for each of the conditions that evaluates to true, one or more actions defined in the error inject script for the condition are performed.Type: ApplicationFiled: May 18, 2010Publication date: November 24, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Cheng-Chung Song
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Patent number: 8041851Abstract: In a data processing system having multiple input/output adapters, a DMA memory block is assigned to each adapter. The DMA memory block has a data area and a generic common control area. All adapters have the same translation control entry for the control area. The control area includes a mapped page assigned to each adapter request and an unmapped buffer space interposed between the mapped pages. By mapping the generic DMA memory, memory space which is not required by an adapter is not mapped unnecessarily. Because the generic DMA memory space is part of each adapter's DMA memory space, adapters are unable to write to partitions to which they do not belong and the possibility of cross-partition memory writes is reduced. Moreover, runaway writes to dedicated DMA memory space may be caught as soon as they occur.Type: GrantFiled: November 30, 2005Date of Patent: October 18, 2011Assignee: International Business Machines CorporationInventors: Wen-jeng Ko, Cheng-Chung Song
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Patent number: 8028189Abstract: A technique for handling hardware errors in a computing system, such as a data storage facility, while avoiding a system crash. An interface is registered with an operating system of the computing system to process hardware errors. When a hardware error is detected, the interface checks an error register to identify the adapter that likely causes the error, and quarantines, e.g., blocks off, the offending adapter from the computing system. The interface then notifies the operating system that the error has been handled, thereby causing the operating system to bypass a system crash that would otherwise occur. The interface can be provided as a kernel extension of a device driver associated with the operating system.Type: GrantFiled: November 17, 2004Date of Patent: September 27, 2011Assignee: International Business Machines CorporationInventors: Yu-Cheng Hsu, John N. McCauley, Juan J. Ruiz, William G. Sherman, Cheng-Chung Song
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Patent number: 8010963Abstract: A method, apparatus and program storage device for providing light weight system calls to improve user mode performance is disclosed. A range of system call code for the light weight system calls is provided in a system call table. The light weight system calls skip the code for saving and restore processor context.Type: GrantFiled: December 1, 2005Date of Patent: August 30, 2011Assignee: International Business Machines CorporationInventors: Daniel Heffley, Wenjeng Ko, Cheng-Chung Song
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Publication number: 20110197046Abstract: A method for matching storage application performance in a multiple tier storage system is disclosed. Input/output (I/O) activity in the multiple tier storage system is monitored to collect statistical information. The statistical information is recurrently transformed into an exponential moving average (EMA) of the I/O activity having a predefined smoothing factor. Data portions in the multiple tier storage system are sorted into buckets of varying temperatures corresponding to the EMA. At least one data migration plan is recurrently generated for matching the sorted data portions to at least one of an available plurality of storage device classes. One data portion sorted into a higher temperature bucket is matched with a higher performance storage device class of the available plurality of storage device classes than another data portion sorted into a lower temperature bucket.Type: ApplicationFiled: February 5, 2010Publication date: August 11, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Lawrence Y. CHIU, Clement L. DICKEY, Yu-Cheng HSU, Joseph S. HYDE, II, Paul H. MUENCH, Cheng-Chung SONG
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Patent number: 7971205Abstract: A method, apparatus and program storage device for providing a no context switch attribute that allows a user mode thread to become a near interrupt disabled priority is disclosed. A thread includes a no context switch attribute. Control of a thread based on the no context switch attribute is much more efficient than the real-time priority because the no context switch attribute bypasses the overhead of scheduling. Moreover, the no context switch attribute may be used to detect whether a thread performs any undesirable operations that can cause the thread to become suspended while in a critical section. The no context switch attribute is configurable to indicate whether execution of the thread can be suspended.Type: GrantFiled: December 1, 2005Date of Patent: June 28, 2011Assignee: International Business Machines CorporationInventors: Daniel Heffley, Wenjeng Ko, Cheng-Chung Song
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Publication number: 20110087837Abstract: A method for efficiently using a large secondary cache is disclosed herein. In certain embodiments, such a method may include accumulating, in a secondary cache, a plurality of data tracks. These data tracks may include modified data and/or unmodified data. The method may determine if a subset of the plurality of data tracks makes up a full stride. In the event the subset makes up a full stride, the method may destage the subset from the secondary cache. By destaging full strides, the method reduces the number of disk operations that are required to destage data from the secondary cache. A corresponding computer program product and apparatus are also disclosed and claimed herein.Type: ApplicationFiled: October 10, 2009Publication date: April 14, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Stephen L. Blinick, Lokesh M. Gupta, Yu-Cheng Hsu, Cheng-Chung Song
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Patent number: 7870417Abstract: An apparatus, system, and method are disclosed for adapter card failover. A switch module connects a first processor complex to an adapter card through a first port as an owner processor complex. The owner processor complex manages the adapter card except for a second port and receives error messages from the adapter card. The switch module further connects a second processor complex to the adapter card through the second port as a non-owner processor complex. The non-owner processor complex manages the second port. A detection module detects a failure of the first processor complex. A setup module modifies the switch module to logically connect the second processor complex to the adapter card as the owner processor complex and to logically disconnect the first processor complex from the adapter card in response to detecting the failure.Type: GrantFiled: April 20, 2007Date of Patent: January 11, 2011Assignee: International Business Machines CorporationInventors: Stephen L. Blinick, Cheng-Chung Song, Carol Spanel, Andrew Dale Walls