Patents by Inventor Cheng Fu

Cheng Fu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10885830
    Abstract: An electronic device includes a substrate and a plurality of light-emitting driving circuits. The plurality of light-emitting driving circuits are disposed on the substrate. Each of the plurality of light-emitting driving circuits includes a switch component and a pulse modulation unit. The switch component has a first terminal and a second terminal. The first terminal of the switch component is coupled to a comparison signal line. The pulse modulation unit has a first terminal and a second terminal. The first terminal of the pulse modulation unit is coupled to a data line, and the second terminal of the pulse modulation unit is coupled to the second terminal of the switch component.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: January 5, 2021
    Assignee: InnoLux Corporation
    Inventors: Ming-Chun Tseng, Chin-Lung Ting, Kung-Chen Kuo, Ker-Yih Kao, Chung-Kuang Wei, Chih-Yung Hsieh, Li-Wei Mao, Ho-Tien Chen, Cheng-Fu Wen
  • Patent number: 10770167
    Abstract: A memory storage apparatus and a forming method of a resistive memory device thereof are provided. A test forming voltage is applied to a redundant resistive memory device and a corresponding test current is read. A forming voltage applied to a main memory cell block is determined according to the test forming voltage, the test current, a forming current-voltage characteristic data and a target forming current.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: September 8, 2020
    Assignee: Winbond Electronics Corp.
    Inventors: Ping-Kun Wang, Ming-Che Lin, Chien-Min Wu, He-Hsuan Chao, Chih-Cheng Fu, Shao-Ching Liao
  • Publication number: 20200265914
    Abstract: A memory storage apparatus and a forming method of a resistive memory device thereof are provided. A test forming voltage is applied to a redundant resistive memory device and a corresponding test current is read. A forming voltage applied to a main memory cell block is determined according to the test forming voltage, the test current, a forming current-voltage characteristic data and a target forming current.
    Type: Application
    Filed: February 20, 2019
    Publication date: August 20, 2020
    Applicant: Winbond Electronics Corp.
    Inventors: Ping-Kun Wang, Ming-Che Lin, Chien-Min Wu, He-Hsuan Chao, Chih-Cheng Fu, Shao-Ching Liao
  • Publication number: 20200236183
    Abstract: Techniques for broadcasting notifications with low latency are provided. A set of recipients for a notification of a content item is determined. The notification is stored in a second notifications storage that is separate from a first notifications storage. A request for one or more notifications is received over a computer network from a client device that is associated with a particular recipient in the set of recipients. In response to receiving the request, first notification data is retrieved from the first notifications storage, second notification data that includes the notification is retrieved from the second notifications storage. The first notification data is combined with the second notification data to generate combined notification data. The combined notification data is transmitted over the computer network to the client device and is stored in the first notifications storage. The notification may be removed from the first notifications storage.
    Type: Application
    Filed: January 18, 2019
    Publication date: July 23, 2020
    Inventors: Swapnil Ghike, Changji Shi, David Benjamin Liu, Guanchao Wang, Sandor Nyako, Netra Malagi, Amit Ruparel, Cheng-Fu Lin, Akhilesh Gupta
  • Patent number: 10705362
    Abstract: A curved display device and a fabrication method are provided. The curved display device comprises: a cover lens; a display panel, wherein the display panel and the cover lens are bonded together as an integral having a curved surface; and a module, wherein a supporter is provided at each of at least two ends of the module. The supporter provided at the each of at least two ends of the module is directly bonded to the cover lens.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: July 7, 2020
    Assignee: SHANGHAI TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventors: Cheng Fu, Yincheng Ding, Xiaosong Song, Chuanzhi Xu, Mengning Hu, Xiaoye Li
  • Publication number: 20200210759
    Abstract: A computerized method identifies an input and kernel similarity in binarized neural network (BNN) across different applications as they are being processed by processors such as a GPU. The input and kernel similarity in BNN across different applications are analyzed to reduce computation redundancy to accelerate BNN inference. A computer-executable instructions stored thereon an on-chip arrangement receives a first data value for a data source for processing by the BNN at an inference phase. The computer-executable instructions further receives a second data value for the data source for processing by the BNN at the inference phase. The first data value is processed bitwise operations. A difference between the first data value and the second data value is calculated. The difference is stored in the on-chip arrangement. The computer-executable instructions applies the bitwise operations to the stored difference.
    Type: Application
    Filed: December 31, 2018
    Publication date: July 2, 2020
    Applicant: Nanjing Iluvatar CoreX Technology Co., Ltd. (DBA "Iluvatar CoreX Inc. Nanjing")
    Inventors: Tien-Pei Chou, Po-Wei Chou, Ching-En Lee, Cheng Fu
  • Patent number: 10636484
    Abstract: A memory device including a plurality of memory units; at least one geometric mean operator coupled to at least two of the plurality of memory units; and a memory state reader coupled to the at least one geometric mean operator to read a memory state of the plurality of memory units.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: April 28, 2020
    Assignee: Winbond Electronics Corporation
    Inventors: Frederick Chen, Ping-Kun Wang, Chih-Cheng Fu, Chien-Min Wu
  • Publication number: 20200082879
    Abstract: A memory device including a plurality of memory units; at least one geometric mean operator coupled to at least two of the plurality of memory units; and a memory state reader coupled to the at least one geometric mean operator to read a memory state of the plurality of memory units.
    Type: Application
    Filed: September 12, 2018
    Publication date: March 12, 2020
    Inventors: Frederick CHEN, Ping-Kun WANG, Chih-Cheng FU, Chien-Min WU
  • Publication number: 20200083446
    Abstract: Provided is a method of fabricating a resistive memory including forming a first electrode and a second electrode opposite to each other; forming a variable resistance layer between the first electrode and the second electrode; forming an oxygen exchange layer between the variable resistance layer and the second electrode; and forming a protection layer at least covering sidewalls of the oxygen exchange layer.
    Type: Application
    Filed: November 14, 2019
    Publication date: March 12, 2020
    Applicant: Winbond Electronics Corp.
    Inventors: Po-Yen Hsu, Ting-Ying Shen, Chia-Hua Ho, Chih-Cheng Fu, Frederick Chen
  • Publication number: 20200035145
    Abstract: An electronic device includes a substrate and a plurality of light-emitting driving circuits. The plurality of light-emitting driving circuits are disposed on the substrate. Each of the plurality of light-emitting driving circuits includes a switch component and a pulse modulation unit. The switch component has a first terminal and a second terminal. The first terminal of the switch component is coupled to a comparison signal line. The pulse modulation unit has a first terminal and a second terminal. The first terminal of the pulse modulation unit is coupled to a data line, and the second terminal of the pulse modulation unit is coupled to the second terminal of the switch component.
    Type: Application
    Filed: June 24, 2019
    Publication date: January 30, 2020
    Inventors: Ming-Chun Tseng, Chin-Lung Ting, Kung-Chen Kuo, Ker-Yih Kao, Chung-Kuang Wei, Chih-Yung Hsieh, Li-Wei Mao, Ho-Tien Chen, Cheng-Fu Wen
  • Patent number: 10522755
    Abstract: Provided are a resistive memory and a method of fabricating the resistive memory. The resistive memory includes a first electrode, a second electrode, a variable resistance layer, an oxygen exchange layer, and a protection layer. The first electrode and the second electrode are arranged opposite to each other. The variable resistance layer is arranged between the first electrode and the second electrode. The oxygen exchange layer is arranged between the variable resistance layer and the second electrode. The protection layer is arranged at least on sidewalls of the oxygen exchange layer.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: December 31, 2019
    Assignee: Winbond Electronics Corp.
    Inventors: Po-Yen Hsu, Ting-Ying Shen, Chia-Hua Ho, Chih-Cheng Fu, Frederick Chen
  • Publication number: 20190385801
    Abstract: An anti-ghost membrane switch device includes a first membrane layer, a second membrane layer, and a spacing layer. A first surface of the first membrane layer is provided with first trigger points and a first signal line. The first signal line is connected to the first trigger points and extends to a first output terminal. A second surface of the second membrane layer faces towards the first surface and is provided with second trigger points and second signal lines. Ends of the second signal lines are connected to the second trigger points. Another ends of the second signal lines extend to the second output terminal. The second signal lines are not electrically connected with one another. The first signal line of the first membrane layer and the second signal lines are not electrically connected with one another. The spacing layer is between the first and second membrane layers.
    Type: Application
    Filed: December 4, 2018
    Publication date: December 19, 2019
    Inventors: Chien-Shuo Chen, Cheng-Fu Tseng
  • Publication number: 20190361285
    Abstract: An electronic device is disclosed, which includes a first substrate structure, a flexible substrate and a first recess. The flexible substrate is disposed on the first substrate structure. The first recess is disposed on a first surface of the flexible substrate, and the first surface is close to the first substrate structure, wherein the first recess at least overlaps the first substrate structure.
    Type: Application
    Filed: April 25, 2019
    Publication date: November 28, 2019
    Inventors: Kuan-Jen WANG, Chien-Chih CHEN, Chih-Chieh FAN, Chin-Der CHEN, Cheng-Fu WEN, Chin-Lung TING
  • Patent number: 10490739
    Abstract: A method of forming a one-time-programmable resistive random access memory bit includes forming a resistive switching layer on a bottom electrode layer. The method also includes forming a top electrode layer on the resistive switching layer. The method also includes applying a forming voltage to the resistive switching layer, such that the electric potential of the top electrode layer is lower than that of the bottom electrode layer. The method also includes performing a bake process on the resistive switching layer. The vacancies in the resistive switching layer are randomly distributed.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: November 26, 2019
    Assignee: Winbond Electronics Corp.
    Inventors: Frederick Chen, Ping-Kun Wang, Chih-Cheng Fu, Chien-Min Wu, Shao-Ching Liao
  • Publication number: 20190305073
    Abstract: A tiled electronic device includes a first electronic device and a second electronic device adjacent to each other. The first electronic device includes a first substrate having a first upper surface, a first lower surface, and a first side surface; and a first flexible substrate including a first upper portion, a first lower portion, and a first connection portion. The first upper portion is disposed corresponding to the first upper surface. The first lower portion is disposed corresponding to the first lower surface. The first connection portion is disposed corresponding to the first side surface. The second electronic device includes a second substrate having a second upper surface, a second lower surface, and a second side surface. The second side surface is opposite and adjacent to the first side surface. The first connection portion is located between the first side surface and the second side surface.
    Type: Application
    Filed: February 28, 2019
    Publication date: October 3, 2019
    Inventors: Chien-Chih CHEN, Shan-Hung TSAI, Chin-Der CHEN, Cheng-Fu WEN, Chin-Lung TING
  • Publication number: 20190271874
    Abstract: A curved display device and a fabrication method are provided. The curved display device comprises: a cover lens; a display panel, wherein the display panel and the cover lens are bonded together as an integral having a curved surface; and a module, wherein a supporter is provided at each of at least two ends of the module. The supporter provided at the each of at least two ends of the module is directly bonded to the cover lens.
    Type: Application
    Filed: June 29, 2018
    Publication date: September 5, 2019
    Inventors: Cheng FU, Yincheng DING, Xiaosong SONG, Chuanzhi XU, Mengning HU, Xiaoye LI
  • Patent number: 10402523
    Abstract: A system for monitoring electronic circuit configured to monitor circuit parameters of an electronic circuit is provided. The system for monitoring electronic circuit includes an observing point monitoring circuit, a system control circuit, and a signal measuring circuit. The observing point monitoring circuit includes a plurality of sensor circuits arranged in an array. The sensor circuits respectively sense the circuit parameters of a plurality of observing points in the electronic circuit. The system control circuit selects at least one of the sensor circuits to sense the circuit parameters. One of the selected sensor circuits outputs a sensing signal. The signal measuring circuit receives the sensing signal and analyzes an electrical characteristic of the sensing signal to obtain a monitoring result of the circuit parameters. A method for monitoring electronic circuit is also provided.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: September 3, 2019
    Assignee: Industrial Technology Research Institute
    Inventors: Shi-Yu Huang, Hua-Cheng Fu, Hua-Xuan Li
  • Patent number: 10356083
    Abstract: A mobile communication device causes a communication session to be established with a host server of a communication network. The mobile device performs communication operations in the communication session for activating a communication service, such as a data synchronization service, with the host server. In the communication session, the mobile device also receives configuration information which includes information for use in constructing a request message for obtaining a digital certificate from a certificate authority (CA). After receipt of the configuration information, the mobile device constructs the request message for the digital certificate and causes it to be sent to the host server. In response, the host server requests and obtains the digital certificate from the CA on behalf of the mobile device, and thereafter “pushes” the received digital certificate to the mobile device. The mobile device receives the digital certificate and stores it for use in subsequent communications.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: July 16, 2019
    Assignee: BlackBerry Limited
    Inventors: Christopher Lyle Bender, Sam Cheng-Fu Shih, Neil Patrick Adams
  • Publication number: 20190213468
    Abstract: A synapse system is provided which includes three transistors and a resistance-switching element arranged between two neurons. The resistance-switching element has a resistance value and it is arranged between two neurons. A first transistor is connected between the resistance-switching element and one of the neurons. A second transistor and a third transistor are arranged between the two neurons, and are connected in series which interconnects with the gate of the first transistor. A first input signal is transmitted from one of the neurons to the other neuron through the first transistor. A second input signal is transmitted from one of the neurons to the other neuron through the second transistor and the third transistor. The resistance value of the resistance-switching element is changed based on the time difference between the first input signal and the second input signal.
    Type: Application
    Filed: January 11, 2018
    Publication date: July 11, 2019
    Inventors: Frederick CHEN, Ping-Kun WANG, Shao-Ching LIAO, Chih-Cheng FU, Ming-Che LIN, Yu-Ting CHEN, Seow-Fong (Dennis) LIM
  • Publication number: 20190214556
    Abstract: A method of forming a one-time-programmable resistive random access memory bit includes forming a resistive switching layer on a bottom electrode layer. The method also includes forming a top electrode layer on the resistive switching layer. The method also includes applying a forming voltage to the resistive switching layer, such that the electric potential of the top electrode layer is lower than that of the bottom electrode layer. The method also includes performing a bake process on the resistive switching layer. The vacancies in the resistive switching layer are randomly distributed.
    Type: Application
    Filed: January 10, 2018
    Publication date: July 11, 2019
    Inventors: Frederick CHEN, Ping-Kun WANG, Chih-Cheng FU, Chien-Min WU, Shao-Ching LIAO