Patents by Inventor Cheng-Han Huang
Cheng-Han Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10504422Abstract: A display panel and a compensation circuit are provided. The display panel has a periphery region and a display region. The display panel includes pixel columns and a threshold voltage compensation circuit. The pixel columns are disposed in the display region. The threshold voltage compensation circuit is disposed in the periphery region. The threshold voltage compensation circuit receives a compensation voltage, outputs threshold voltage information of a compensation transistor based on the compensation voltage, and generates compensated display data based on the threshold voltage information and display data.Type: GrantFiled: December 18, 2018Date of Patent: December 10, 2019Assignee: Au Optronics CorporationInventors: Mao-Hsun Cheng, Cheng-Han Huang, Wei-Ting Wu, Yung-Chih Chen
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Publication number: 20190237006Abstract: A display panel and a compensation circuit are provided. The display panel has a periphery region and a display region. The display panel includes pixel columns and a threshold voltage compensation circuit. The pixel columns are disposed in the display region. The threshold voltage compensation circuit is disposed in the periphery region. The threshold voltage compensation circuit receives a compensation voltage, outputs threshold voltage information of a compensation transistor based on the compensation voltage, and generates compensated display data based on the threshold voltage information and display data.Type: ApplicationFiled: December 18, 2018Publication date: August 1, 2019Applicant: Au Optronics CorporationInventors: Mao-Hsun Cheng, Cheng-Han Huang, Wei-Ting Wu, Yung-Chih Chen
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Publication number: 20190172407Abstract: A display device has a substrate for disposing a display area having an array of pixels, and control circuits having shift registers and latches to provide image data and timing control signals to the pixels. The control circuits have signal lines electrically connected to a connection cable to receive therefrom data signals indicative of the image data and timing pulses indicative of the timing control signals. The connection cable is also configured to provide reference signals to the shift registers and latches in the control circuits. The data signals are digital signals having an amplitude range greater than the amplitude range of the reference signals. No driver IC is disposed on the substrate to process analog signals. Each of the pixels has three sub-pixels and each of the color sub-pixels has three color sub-areas configured to receive timing control signals from a different scan line.Type: ApplicationFiled: December 6, 2017Publication date: June 6, 2019Inventors: Yung-Chih CHEN, Cheng-Han Huang, Wei-Hsuan Chang, Chun-Da Tu
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Publication number: 20180325223Abstract: A smart zipper includes a zipper, a voltage generator, a voltage detector, and a processor. The zipper includes a first left tooth and a first right tooth. The first left tooth is electrically connected to a first left wire and is supplied with a supply voltage. The first right tooth is electrically connected to a first right wire. The voltage generator generates the supply voltage. The voltage detector detects the voltage of the first right wire to generate a first detection signal. The processor determines first coupling information about whether the first left tooth is electrically connected to the first right tooth, according to the first detection signal.Type: ApplicationFiled: August 1, 2017Publication date: November 15, 2018Inventors: Cheng-Han HUANG, Mao-Chen HSIAO, Jen-Chih SHIH, Tse-An LIN
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Patent number: 10019956Abstract: A shift register including a voltage set unit, a driver unit, a control unit, a first transistor, a second transistor, a third transistor and a fourth transistor is provided. The voltage set unit provides a terminal voltage. The driver unit provides a main gate signal according to the terminal voltage and a clock signal. The control unit provides a control signal. The first transistor receives the terminal voltage, a level reference voltage and the control signal. The second transistor is coupled to the first transistor and receives a low voltage and the control signal. The third transistor receives the terminal voltage, a level reference voltage and a gate reference signal. The fourth transistor is coupled to the third transistor and receives the low voltage and the gate reference signal.Type: GrantFiled: April 27, 2016Date of Patent: July 10, 2018Assignee: AU OPTRONICS CORPORATIONInventors: Chun-Da Tu, Yung-Chih Chen, Cheng-Han Huang, Kai-Wei Hong, Hsiang-Sheng Chang, Chuang-Cheng Yang
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Publication number: 20170258021Abstract: A hydroponic device includes a water tank, a drain pan, a hydroponic module and a light emitting diode module. The water tank delivers water to the drain pan via a drain pump. The water is then dispensed to each pot body of the hydroponic module. Each pot body includes an inner pot and an outer pot. Water inside the inner pot will flow to the outer pot through the draining hole. Water will flow out of an overflow outlet and re-enter the water tank if the water level is higher than the overflow outlet. The light emitting diode module is disposed above the hydroponic module.Type: ApplicationFiled: June 14, 2016Publication date: September 14, 2017Inventors: Chia-Hsiang Chiu, Chien-Ming Sung, Wei-Cheng Huang, Chun-Wei Liu, Pei-Te Liu, Hung-Hsuan Su, Chi-Fang Ho, Hsien-Yao Shui, Kun-Lin Wu, Po-Hsien Huang, Chen-Ying Wang, Cheng-Han Huang, Kun-Lung Wu, Tsung-Yu Wu, Tse-An Lin, Chien-Fa Huang, Mao-Sung Lin
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Publication number: 20170124971Abstract: A shift register including a voltage set unit, a driver unit, a control unit, a first transistor, a second transistor, a third transistor and a fourth transistor is provided. The voltage set unit provides a terminal voltage. The driver unit provides a main gate signal according to the terminal voltage and a clock signal. The control unit provides a control signal. The first transistor receives the terminal voltage, a level reference voltage and the control signal. The second transistor is coupled to the first transistor and receives a low voltage and the control signal. The third transistor receives the terminal voltage, a level reference voltage and a gate reference signal. The fourth transistor is coupled to the third transistor and receives the low voltage and the gate reference signal.Type: ApplicationFiled: April 27, 2016Publication date: May 4, 2017Inventors: Chun-Da Tu, Yung-Chih Chen, Cheng-Han Huang, Kai-Wei Hong, Hsiang-Sheng Chang, Chuang-Cheng Yang
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Publication number: 20170115859Abstract: A monitoring system may include a display module, an input module, and a processing module. The display module may be operable to display a plurality of sub-windows. The input module may be operable to receive an input signal inputted by a user and generate a control signal according to the input signal. The processing module may be operable to receive the control signal to control any one of the sub-windows of the display module according to the control signal. When the coverage of any one of the sub-windows is modified by the user, the processing module will execute a first recursive function to detect whether the modified sub-window overlaps any one of the other sub-windows; if the modified sub-window overlaps any one of the other sub-windows, the processing module pushes the sub-window overlapping the modified sub-window to a residual space of the display module.Type: ApplicationFiled: October 21, 2015Publication date: April 27, 2017Inventors: Cheng-Han Huang, Tsung-Tse Lee
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Patent number: 9620078Abstract: A touch display apparatus includes a touch driver and a display driver. The touch driver outputs touch signals to drive a touch panel. The display driver outputs scan signals to drive a display panel. A display driver has a plurality of shift registers, and each of the plurality of shift registers includes a pull-up unit, a driving unit, a pull-down unit and a holding unit. The pull-up unit is electrically connected to a driving node for outputting a driving voltage. The driving unit is electrically connected to the driving node for outputting a first scan signal according to a clock. A pull-down unit is electrically connected to the driving node and the output terminal, for pulling down the voltage level of the driving voltage and the first scan signal, respectively. The holding unit is electrically connected to the driving node.Type: GrantFiled: September 22, 2015Date of Patent: April 11, 2017Assignee: AU OPTRONICS CORP.Inventors: Kai-Wei Hong, Hsiang-Sheng Chang, Yung-Chih Chen, Chun-Da Tu, Cheng-Han Huang, Chuang-Cheng Yang
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Publication number: 20160365061Abstract: A touch display apparatus includes a touch driver and a display driver. The touch driver outputs touch signals to drive a touch panel. The display driver outputs scan signals to drive a display panel. A display driver has a plurality of shift registers, and each of the plurality of shift registers includes a pull-up unit, a driving unit, a pull-down unit and a holding unit. The pull-up unit is electrically connected to a driving node for outputting a driving voltage. The driving unit is electrically connected to the driving node for outputting a first scan signal according to a clock. A pull-down unit is electrically connected to the driving node and the output terminal, for pulling down the voltage level of the driving voltage and the first scan signal, respectively. The holding unit is electrically connected to the driving node.Type: ApplicationFiled: September 22, 2015Publication date: December 15, 2016Inventors: Kai-Wei HONG, Hsiang-Sheng CHANG, Yung-Chih CHEN, Chun-Da TU, Cheng-Han HUANG, Chuang-Cheng YANG
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Publication number: 20130328067Abstract: An LED module includes a silicone substrate, an LED grain mounted on a face of the silicone substrate, a temperature sensor formed under the LED grain, a luminous sensor formed close to the LED grain and an encapsulation gel enclosing the LED grain, wherein the LED grain, the luminous sensor and the temperature sensor are electrically connected to electrodes for connection to foreign devices.Type: ApplicationFiled: September 20, 2012Publication date: December 12, 2013Applicant: Feng Chia UniversityInventors: Ching-fu TSOU, Cheng-Han Huang, Kuo-Chun Tseng, Sheng-Wei Chang
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Patent number: 8604846Abstract: An exemplary resetting circuit adapted for regulating a voltage on an output terminal of a shift register is disclosed. The resetting circuit includes a reset driving module and a reset module. The reset driving module is received with an enable signal to output a control voltage signal to an output terminal of the reset driving module. The reset module is electrically coupled to the output terminal of the shift register and the output terminal of the reset circuit driving module, and is controlled by the control voltage signal on the output terminal of the reset driving module to determine whether switching on an electrical path between the output terminal of the shift register and a gate-off voltage level.Type: GrantFiled: November 14, 2011Date of Patent: December 10, 2013Assignee: AU Optronics Corp.Inventors: Hsiao-Chung Cheng, Cheng-Han Huang, Meng-Sheng Chang
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Publication number: 20120169386Abstract: An exemplary resetting circuit adapted for regulating a voltage on an output terminal of a shift register is disclosed. The resetting circuit includes a reset driving module and a reset module. The reset driving module is received with an enable signal to output a control voltage signal to an output terminal of the reset driving module. The reset module is electrically coupled to the output terminal of the shift register and the output terminal of the reset circuit driving module, and is controlled by the control voltage signal on the output terminal of the reset driving module to determine whether switching on an electrical path between the output terminal of the shift register and a gate-off voltage level.Type: ApplicationFiled: November 14, 2011Publication date: July 5, 2012Applicant: AU OPTRONICS CORP.Inventors: Hsiao-Chung CHENG, Cheng-Han Huang, Meng-Sheng Chang
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Publication number: 20110212081Abstract: Disclosed herein are methods and cell lines used in fat regulation. The methods and cell lines incorporate Krüppel-like factors including, without limitation, klf-1 and klf-3.Type: ApplicationFiled: May 13, 2011Publication date: September 1, 2011Applicant: NEW YORK BLOOD CENTERInventors: Sarwar Hashmi, Chuan Yang, Jun Zhang, Cheng-Han Huang
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Publication number: 20100299804Abstract: An expandable clothing includes two cloth members, and an expandable element secured between the cloth members and having a resilience greater than that of the cloth members for allowing the clothing to be expanded to fit various users having different sizes or dimensions. The clothing may be selected from pants, trousers, skirts or shorts, sweaters, shirts, jackets or coats or the like having two tubular pant-legs or two sleeves for accommodating or receiving the legs or the feet, or the hands of the users. The expandable elements may be attached to the inner portions or the side portions of the pant-legs or the sleeves, or attached to the rear portion of the coat.Type: ApplicationFiled: May 30, 2009Publication date: December 2, 2010Inventor: Cheng Han Huang
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Publication number: 20100215660Abstract: Disclosed herein are methods and cell lines used in fat regulation. The methods and cell lines incorporate Krüppel-like factors including, without limitation, klf-1 and klf-3.Type: ApplicationFiled: February 23, 2010Publication date: August 26, 2010Inventors: Sarwar Hashmi, Chuan Yang, Jun Zhang, Cheng-Han Huang
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Patent number: 6403487Abstract: A method is provided for forming separated spacer structures in a mixed-mode integrated circuit, which can be used to form spacer structures with different widths for the various kinds of devices in the mixed-mode integrated circuit. The method is for use on a semiconductor substrate which is formed with at least a first gate for a first kind of device of the mixed-mode integrated circuit and a second gate for a second kind of device of the integrated circuit, with the second gate being larger in width than the first gate such that the first gate is formed with a first spacer structure on the sidewalls thereof to a first desired width while the second gate is formed with a second spacer structure on the sidewalls thereof to a second desired width larger than the first desired width.Type: GrantFiled: December 16, 1997Date of Patent: June 11, 2002Assignee: United Microelectronics Corp.Inventors: Cheng-Han Huang, Meng-Jin Tsai, Cheng-Jung Hsu, Po-Hung Chen
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Patent number: 6037201Abstract: A method for manufacturing mixed-mode devices that can eliminate watermarks resulting from the formation of residues at the dead corner space of an inverted trapezium-shaped structure at the upper end of a shallow trench during dual gate-oxide processing operation. This method uses the same chemical processing conditions for etching the oxide layer and the removal of photoresist layer, so that no watermarks remain after the etching and cleaning processes. MOS transistors are formed over the thin gate oxide layer region and the thick gate oxide region are of, two types, each having a different gate oxide layer thickness so that each has a different operating voltage.Type: GrantFiled: March 17, 1998Date of Patent: March 14, 2000Assignee: United Microelectronics Corp.Inventors: Meng-Jin Tsai, Cheng-Han Huang
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Patent number: 6033958Abstract: A method of forming dual voltage MOS transistors includes first forming a mask layer, covering one of the at least two device regions and exposing another one of the two device regions. A gate oxide layer is then formed by thermal oxidation on the exposed device region. After removing the mask layer and exposing another gate oxide formed therebeneath, polysilicon gates for both of the two device regions can be formed.Type: GrantFiled: June 30, 1998Date of Patent: March 7, 2000Assignee: United Microelectronics Corp.Inventors: Jih-Wen Chou, Cheng-Han Huang
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Patent number: 5965464Abstract: A method for forming a double spacer structure comprising the steps of first providing a semiconductor substrate that has a first gate and a second gate already formed thereon, wherein the gate length of the second gate is greater than the gate length of the first gate. Then, a first insulating layer is formed over the substrate and the gates. Next, a photoresist layer is formed over the first insulating layer above the second gate while exposing the first insulating layer above the first gate. Subsequently, a first etching operation is performed to establish a first spacer structure along the sidewalls of the first gate, and then the photoresist layer is removed leaving the first insulating layer over the second gate. Thereafter, a second insulating layer is formed over the substrate, the first gate and the first insulating layer, and then a second etching operation is performed to establish a second spacer structure along the sidewalls of the second gate.Type: GrantFiled: December 12, 1997Date of Patent: October 12, 1999Assignee: United Microelectronics Corp.Inventors: Meng-Jin Tsai, Cheng-Han Huang, Te-Chuan Liao, Chen-Wei Lee