Patents by Inventor Cheng Hsu
Cheng Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250148988Abstract: An electronic device includes a substrate, a first transistor and a second transistor. The first transistor is disposed on the substrate and has a first terminal electrically connected to a first voltage level, a second terminal and a control terminal. The second transistor is disposed on the substrate and has a first terminal electrically connected to the second terminal of the first transistor, a second terminal electrically connected to a second voltage level, and a control terminal electrically connected to the control terminal of the first transistor. Wherein a voltage value of the first voltage level is greater than a voltage value of the second voltage level.Type: ApplicationFiled: January 9, 2025Publication date: May 8, 2025Inventors: Lien-Hsiang CHEN, Kung-Chen KUO, Ming-Chun TSENG, Cheng-Hsu CHOU, Kuan-Feng LEE
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Patent number: 12293792Abstract: A voltage prediction method, a memory storage device and a memory control circuit unit are disclosed. The method includes: reading a plurality of memory cells in a rewritable non-volatile memory module by using a first read voltage level to obtain count information, and the first read voltage level is configured to distinguish a first state and a second state adjacent to each other in a threshold voltage distribution of the memory cells, and the count information reflects a total number of first memory cells meeting a target condition among the memory cells; and predicting a second read voltage level according to the count information, and the second read voltage level is configured to distinguish a third state and a fourth state adjacent to each other in the threshold voltage distribution.Type: GrantFiled: April 10, 2023Date of Patent: May 6, 2025Assignee: PHISON ELECTRONICS CORP.Inventors: Po-Cheng Su, Po-Hao Chen, Yu-Cheng Hsu, Wei Lin
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Patent number: 12293784Abstract: A voltage calibration method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: reading first data from a first physical unit using a first read voltage level and reading second data from at least one second physical unit using a second read voltage level; obtaining count information reflecting a total number of memory cells meeting a default condition in the first physical unit and the at least one second physical unit according to the first data and the second data; and calibrating the first read voltage level according to the count information.Type: GrantFiled: April 17, 2023Date of Patent: May 6, 2025Assignee: PHISON ELECTRONICS CORP.Inventors: Po-Hao Chen, Po-Cheng Su, Shih-Jia Zeng, Yu-Cheng Hsu, Wei Lin
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Publication number: 20250138378Abstract: A color electrophoretic display and a display method thereof are provided. The color electrophoretic display comprises an achromatic color particle and a plurality of chromatic color particles. The display method of the color electrophoretic display comprises turning on a stylus mode, providing an assigned stylus color, sensing a movement of the stylus to output a black trace, and transferring the black trace into a color trace of the assigned stylus color when the stylus movement stops. The black trace is shown when the achromatic color particle and the chromatic color particles move toward a top electrode, and a refresh time of the color of the black trace is smaller than 50 ms. The color of the assigned stylus color and the color of the black trace have brightness difference and at least one of the hue differences and the saturation differences.Type: ApplicationFiled: August 16, 2024Publication date: May 1, 2025Inventors: Feng-Cheng HSU, Chien-Lin CHENG, Chien-Min LAI, An-Lun HAN
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Publication number: 20250137139Abstract: A metal compound thin film, a method of forming the same and a thin film catalyst for water electrolysis are provided. The method includes providing a substrate; and performing plural ink-jet printing operations to the substrate to form the metal compound thin film on the substrate. The substrate is a non-hydrophobic substrate. Each of the ink-jet printing operations includes depositing a first precursor on the substrate by using a first nozzle of an ink-jet system; and depositing a second precursor on the substrate by using a second nozzle of the ink-jet system. A chemical reaction occurs between the first precursor and the second precursor to form a metal compound, and the metal compound thin film includes plural layers of the metal compound. Therefore, patterning the thin film can be easily accomplished, and chemical solution can be effectively saved.Type: ApplicationFiled: October 30, 2024Publication date: May 1, 2025Inventors: Chun-Hu CHEN, Chun-Cheng HSU
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Publication number: 20250133748Abstract: A memory device and method of making the same, the memory device including bit lines disposed on a substrate; memory cells disposed on the bit lines; a first dielectric layer disposed on the substrate, surrounding the bit lines and the memory cells; a second dielectric layer disposed on the first dielectric layer; thin film transistors (TFTs) embedded in the second dielectric layer and configured to selectively provide electric power to corresponding memory cells, the TFTs comprising drain lines disposed on the memory cells, source lines disposed on the first dielectric layer, and selector layers electrically connected to the source lines and the drain lines; and word lines disposed on the second dielectric layer and electrically connected to the TFTs.Type: ApplicationFiled: December 23, 2024Publication date: April 24, 2025Inventors: Yen-Chung HO, Hui-Hsien Wei, Mauricio MANFRINI, Chia-Jung Yu, Yong-Jie Wu, Ken-Ichi Goto, Pin-Cheng Hsu
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Patent number: 12283568Abstract: Alignment of devices formed on substrates that are to be bonded may be achieved through the use of scribe lines between the devices, where the scribe lines progressively increase or decrease in size from a center to an edge of one or more of the substrates to compensate for differences in the thermal expansion rates of the substrates. The devices on the substrates are brought into alignment as the substrates are heated during a bonding operation due to the progressively increased or decreased sizes of the scribe lines. The scribe lines may be arranged in a single direction in a substrate to compensate for thermal expansion along a single axis of the substrate or may be arranged in a plurality of directions to compensate for actinomorphic thermal expansion.Type: GrantFiled: July 5, 2023Date of Patent: April 22, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsi-Cheng Hsu, Jui-Chun Weng, Ching-Hsiang Hu, Ji-Hong Chiang, Kuo-Hao Lee, Chia-Yu Lin, Chia-Chun Hung, Yen-Chieh Tu, Chien-Tai Su, Hsin-Yu Chen
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Publication number: 20250126847Abstract: A semiconductor structure and a method for forming the semiconductor structure are disclosed. The semiconductor structure includes a dielectric layer and a transistor. The transistor is at least partially disposed in the dielectric layer. The transistor includes a gate electrode, a gate dielectric layer, a source electrode, a drain electrode and a semiconductor layer. The gate dielectric layer is disposed over the gate electrode. The source electrode and the drain electrode are disposed over the gate dielectric layer and contact the gate dielectric layer. The semiconductor layer is disposed over the gate dielectric layer.Type: ApplicationFiled: December 26, 2024Publication date: April 17, 2025Inventors: CHIA-JUNG YU, PIN-CHENG HSU
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Publication number: 20250123552Abstract: An extreme ultraviolet (EUV) mask and method of forming an EUV mask are provided. The method includes forming a mask layer on a semiconductor wafer, generating extreme ultraviolet (EUV) light by a lithography exposure system, forming patterned EUV light by patterning the EUV light by a mask including an absorber having extinction coefficient at an EUV wavelength that exceeds extinction coefficients of TaBN and TaN at the EUV wavelength, and exposing the mask layer by the patterned EUV light.Type: ApplicationFiled: April 5, 2024Publication date: April 17, 2025Inventors: Pei-Cheng HSU, Hsuan-I WANG, Ping-Hsun LIN, Ching-Fang YU, Chia-Jen CHEN, Hsin-Chang LEE
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Patent number: 12277926Abstract: An intelligent medical speech automatic recognition method includes performing a first model training step, a second model training step, a voice receiving step, a signal pre-treatment step and a transforming step. The first model training step is performed to train a generic statement data and a medical statement data of a database to establish a first model. The second model training step is performed to train a medical textbook data of the database to establish a second model. The voice receiving step is performed to receive a speech signal. The signal pre-treatment step is performed to receive the speech signal from the voice receiver and transform the speech signal into a to-be-recognized speech signal. The transforming step is performed to transform and recognize the to-be-recognized speech signal into a complete sentence writing character according to the first model and the second model.Type: GrantFiled: September 29, 2021Date of Patent: April 15, 2025Assignee: China Medical UniversityInventors: Der-Yang Cho, Kai-Cheng Hsu, Ya-Lun Wu, Kai-Ching Chen
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Patent number: 12278156Abstract: A semiconductor package is provided, which includes a first chip disposed over a first package substrate, a molding compound surrounding the first chip, a first thermal interface material disposed over the first chip and the molding compound, a heat spreader disposed over the thermal interface material, and a second thermal interface material disposed over the heat spreader. The first thermal interface material and the second thermal interface material have an identical width.Type: GrantFiled: November 29, 2023Date of Patent: April 15, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chin-Hua Wang, Po-Yao Lin, Feng-Cheng Hsu, Shin-Puu Jeng, Wen-Yi Lin, Shu-Shen Yeh
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Patent number: 12271006Abstract: Disclosed is a cost-effective method to fabricate a multifunctional collimator structure for contact image sensors to filter ambient infrared light to reduce noises. In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; a plurality of via holes; and a conductive layer, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, and wherein the conductive layer is formed over at least one of the following: the first surface of the first dielectric layer and a portion of sidewalls of each of the plurality of via holes, and wherein the conductive layer is configured so as to allow the optical collimator to filter light in a range of wavelengths.Type: GrantFiled: August 8, 2023Date of Patent: April 8, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hsin-Yu Chen, Yen-Chiang Liu, Jiun-Jie Chiou, Jia-Syuan Li, You-Cheng Jhang, Shin-Hua Chen, Lavanya Sanagavarapu, Han-Zong Pan, Chun-Peng Li, Chia-Chun Hung, Ching-Hsiang Hu, Wei-Ding Wu, Jui-Chun Weng, Ji-Hong Chiang, Hsi-Cheng Hsu
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Publication number: 20250109120Abstract: The invention relates to indoline derivatives and uses thereof for treating and/or preventing an inflammatory condition or fibrosis diseases, and tumor or cell proliferative diseases.Type: ApplicationFiled: September 28, 2023Publication date: April 3, 2025Inventors: Chia-Ron YANG, Wei-Jan HUANG, Kai-Cheng HSU
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Patent number: 12265454Abstract: An embodiment identifies a fileset used by an executing application. An embodiment generates, at a first time, a first snapshot of the fileset, the first snapshot comprising a first state of the fileset at the first time and a first indicator corresponding to the first state of the fileset. An embodiment selects, at a recovery time later than the first time, from a sequence of snapshots of the fileset including the first snapshot, a recovery snapshot, the recovery snapshot comprising a recovery indicator, wherein the recovery indicator has a difference from the first indicator that is higher than a threshold value. An embodiment restores, using the recovery snapshot, the fileset to a state other than the first state, the restoring resulting in a restored application.Type: GrantFiled: July 26, 2023Date of Patent: April 1, 2025Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Erin M Farr, Yu-Cheng Hsu, Pratik Gupta
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Patent number: 12265201Abstract: A light-emitting device array includes a first light-emitting device, a second light-emitting device, and a third light-emitting device. A first beam shaping structure of the first light-emitting device is configured to convert light emitted by a first light-emitting structure of first light-emitting device into first structured light. A second beam shaping structure of the second light-emitting device is configured to convert light emitted by a second light-emitting structure of second light-emitting device into second structured light. Speckle patterns and spatial distributions of the first structured light and the second structured light on a projection plane are the same. A third beam shaping structure of the third light-emitting device is configured to convert light emitted by a third light-emitting structure of third light-emitting device into third structured light.Type: GrantFiled: September 7, 2023Date of Patent: April 1, 2025Assignee: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Jun-Da Chen, Yu-Heng Hong, Wen-Cheng Hsu, Tzu-Hsiang Lan, Hao-Chung Kuo
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Patent number: 12265322Abstract: An extreme ultraviolet mask including a substrate, a reflective multilayer stack on the substrate and a capping layer on the reflective multilayer stack is provided. The reflective multilayer stack is treated prior to formation of the capping layer on the reflective multilayer stack. The capping layer is formed by an ion-assisted ion beam deposition or an ion-assisted sputtering process.Type: GrantFiled: August 4, 2023Date of Patent: April 1, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ping-Hsun Lin, Pei-Cheng Hsu, Ching-Fang Yu, Ta-Cheng Lien, Chia-Jen Chen, Hsin-Chang Lee
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Publication number: 20250102540Abstract: A probe assembly includes a multilayer structure including probe contact pads, an upper guide plate including an array of upper holes therethrough, a lower guide plate including an array of lower holes therethrough, a vertical stack of a plurality of dielectric spacer plates located between the upper guide plate and the lower guide plate and including a respective opening therethrough, and an array of probes attached to the probe contact pads, vertically extending through the array of upper holes and the array of lower holes, and vertically extending through the openings through the vertical stack of the plurality of dielectric spacer plates.Type: ApplicationFiled: December 8, 2024Publication date: March 27, 2025Inventors: Ming-Cheng HSU, Wen-Chun TU
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Publication number: 20250105795Abstract: A power amplifier comprising a first transistor pair and a first odd mode resistor string. The first transistor pair has a first transistor and a second transistor. A first end of the first transistor is symmetrically disposed to a first end of the second transistor. A plurality of first odd mode resistors are serially coupled between the first end of the first transistor and the first end of the second transistor. A total length of the first odd mode resistor string is substantially equal to a distance between the first end of the first transistor and the first end of the second transistor.Type: ApplicationFiled: December 11, 2023Publication date: March 27, 2025Applicant: Industrial Technology Research InstituteInventors: Jian-Yu Li, Tsung Hwa Hsieh, Yu-Cheng Hsu
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Patent number: 12259649Abstract: In a method of cleaning a photo mask, the photo mask is placed on a support such that a pattered surface faces down, and an adhesive sheet is applied to edges of a backside surface of the photo mask.Type: GrantFiled: November 22, 2023Date of Patent: March 25, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsin-Chang Lee, Pei-Cheng Hsu, Hao-Ping Cheng, Ta-Cheng Lien
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Publication number: 20250098353Abstract: Various embodiments of the present disclosure are directed towards an image sensor. The image sensor includes a deep trench isolation (DTI) structure disposed in a substrate. A pixel region of the substrate is disposed within an inner perimeter of the DTI structure. A photodetector is disposed in the pixel region of the substrate. A gate electrode structure overlies, at least partially, the pixel region of the substrate. A first gate dielectric structure partially overlies the pixel region of the substrate. A second gate dielectric structure partially overlies the pixel region of the substrate. The gate electrode structure overlies both a portion of the first gate dielectric structure and a portion of the second gate dielectric structure. The first gate dielectric structure has a first thickness. The second gate dielectric structure has a second thickness that is greater than the first thickness.Type: ApplicationFiled: December 5, 2024Publication date: March 20, 2025Inventors: Tzu-Jui Wang, Dun-Nian Yaung, Chen-Jong Wang, Ming-Chieh Hsu, Wei-Cheng Hsu, Yuichiro Yamashita