Patents by Inventor Cheng Hsu

Cheng Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11985324
    Abstract: Exemplary video processing methods and apparatuses for encoding or decoding a current block by inter prediction are disclosed. Input data of a current block is received and partitioned into sub-partitions and motion refinement is independently performed on each sub-partition. A reference block for each sub-partition is obtained from one or more reference pictures according to an initial motion vector (MV). A refined MV for each sub-partition is derived by searching around the initial MV with N-pixel refinement. One or more boundary pixels of the reference block for a sub-partition is padded for motion compensation of the sub-partition. A final predictor for the current block is generated by performing motion compensation for each sub-partition according to its refined MV. The current block is then encoded or decoded according to the final predictor.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: May 14, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Yu-Cheng Lin, Chun-Chia Chen, Chih-Wei Hsu, Ching-Yeh Chen, Tzu-Der Chuang, Yu-Wen Huang
  • Publication number: 20240153979
    Abstract: A method of manufacturing an image sensor structure includes forming an isolation structure in a substrate to divide the substrate into a first region and a second region, forming a first light sensing region in the first region and a second light sensing region in the second region, forming a first gate structure over the first light sensing region and a second gate structure over the second light sensing region, forming gate spacers on sidewalls of the first and second gate structures, and depositing a blocking layer on sidewalls of the gate spacers. The blocking layer has an opening positioned between the first and second gate structures. A source/drain structure is formed directly under the opening in the blocking layer. The method also includes forming an interlayer dielectric layer over the first and second gate structures and the blocking layer.
    Type: Application
    Filed: April 13, 2023
    Publication date: May 9, 2024
    Inventors: Wei Long CHEN, Wen-I HSU, Feng-Chi HUNG, Jen-Cheng LIU, Dun-Nian YAUNG
  • Publication number: 20240153840
    Abstract: A method for forming a package structure is provided. The method includes disposing a semiconductor die over a carrier substrate, wherein a removable film is formed over the semiconductor die, disposing a first stacked die package structure over the carrier substrate, wherein a top surface of the removable film is higher than a top surface of the first stacked die package structure, and removing the removable film to expose a top surface of the semiconductor die, wherein a top surface of the semiconductor die is lower than the top surface of the first stacked die package structure.
    Type: Application
    Filed: January 18, 2024
    Publication date: May 9, 2024
    Inventors: Shin-Puu JENG, Po-Yao LIN, Feng-Cheng HSU, Shuo-Mao CHEN, Chin-Hua WANG
  • Publication number: 20240154632
    Abstract: A switching circuit and a method of providing the switching circuit are provided. The switching circuit includes a first transmission amplifier, a second transmission amplifier, a third transmission amplifier, and a fourth transmission amplifier. The first transmission amplifier amplifies a first signal at a first connection port and transmits the first signal to a second connection port in a first mode. The second transmission amplifier amplifies a second signal at a third connection port and transmits the second signal to a fourth connection port in the first mode. The third transmission amplifier amplifies the first signal at the first connection port and transmits the first signal to the fourth connection port in the second mode. The fourth transmission amplifier amplifies the second signal at the third connection port and transmits the second signal to the second connection port in the second mode.
    Type: Application
    Filed: December 16, 2022
    Publication date: May 9, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Yu-Teng Chang, Yu-Cheng Hsu
  • Patent number: 11976170
    Abstract: The present invention provides a polybenzoxazole precursor, which comprises a structure of formula (I): wherein the definitions of Y, Z, R1, i, j, and V are provided herein. By means of the polybenzoxazole precursor, the resin composition of the present invention is able to form a film with high frequency characteristics and high contrast.
    Type: Grant
    Filed: July 5, 2022
    Date of Patent: May 7, 2024
    Assignee: MICROCOSM TECHNOLOGY CO., LTD.
    Inventors: Steve Lien-chung Hsu, Yu-Ching Lin, Yu-Chiao Shih, Hou-Chieh Cheng
  • Publication number: 20240145898
    Abstract: An electronic device including a metal casing and at least one antenna module is provided. The metal casing includes at least one window. The at least one antenna module is disposed in the at least one window. The at least one antenna module includes a first radiator and a second radiator. The first radiator includes a feeding end, a first ground end joined to the metal casing, a second ground end, a first portion extending from the feeding end to the first ground end, and a second portion extending from the feeding end to the second ground end. A first coupling gap is between the second radiator and the first portion. A second coupling gap is between at least part of the second radiator and the metal casing, and the second radiator includes a third ground end joined to the metal casing.
    Type: Application
    Filed: September 8, 2023
    Publication date: May 2, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Sheng-Chin Hsu, Chih-Wei Liao, Hau Yuen Tan, Cheng-Hsiung Wu, Shih-Keng Huang
  • Publication number: 20240145470
    Abstract: A method for processing an integrated circuit includes forming first and second gate all around transistors. The method forms a dipole oxide in the first gate all around transistor without forming the dipole oxide in the second gate all around transistor. This is accomplished by entirely removing an interfacial dielectric layer and a dipole-inducing layer from semiconductor nanosheets of the second gate all around transistor before redepositing the interfacial dielectric layer on the semiconductor nanosheets of the second gate all around transistor.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: Lung-Kun CHU, Mao-Lin HUANG, Chung-Wei HSU, Jia-Ni YU, Kuo-Cheng CHIANG, Kuan-Lun CHENG, Chih-Hao WANG
  • Publication number: 20240146883
    Abstract: A method for adjusting a projection parameter and a projection system are disclosed. In the projection system, a processor is configured to drive multiple projectors to project multiple projection images respectively and obtain a full projection range through calculation, select a target area from at least one overlapping area included in the full projection range and obtain a target projection parameter value of the target area, obtain multiple intersection points of the overlapping area on a boundary of the full projection range, define connecting lines between a center point of the target area and the intersection points as dividing lines to divide the full projection range into multiple sub-areas, respectively adjust a projection parameter value of each of the sub-areas according to the target projection parameter value of the target area, and perform projection through the corresponding projector based on the adjusted projection parameter value of each of the sub-areas.
    Type: Application
    Filed: October 26, 2023
    Publication date: May 2, 2024
    Applicant: Coretronic Corporation
    Inventors: Chien-Chun Peng, Chia-Yen Ou, Kang-Shun Hsu, Hsun-Cheng Tu
  • Publication number: 20240147405
    Abstract: A controlling method for a wireless communication device is provided. The controlling method for the wireless communication device includes: attaching a first Universal Subscriber Identity Module (USIM) to a Long-Term Evolution (LTE) network; determining whether a second USIM is camped on the LTE network; detecting whether a paging collision is happened, if the second USIM is camped on the LTE network; generating a requested International Mobile Subscriber Identity (IMSI) offset for the second USIM, if the paging collision is happened, wherein the requested IMSI offset is 1 or min(T, nB)?1, T is a default paging period and nB is a number of paging occurrences within the default paging period; transmitting an attach request with the requested IMSI offset to the LTE network for the second USIM; receiving a negotiated IMSI offset from the LTE network; and attaching the second USIM to the LTE network with the negotiated IMSI offset.
    Type: Application
    Filed: November 1, 2023
    Publication date: May 2, 2024
    Inventors: Kuan-Yu LIN, Ya-ling Hsu, Wan-Ting Huang, Yi-Han CHUNG, Yi-Cheng CHEN
  • Publication number: 20240145389
    Abstract: A semiconductor chip includes a first intellectual property block. There are a second intellectual property block and a third intellectual property block around the first intellectual property block. There is a multiple metal layer stack over the first intellectual property block, the second intellectual property block, and the third intellectual property block. An interconnect structure is situated in the upper portion of the multiple metal layer stack. The interconnect structure is configured for connecting the first intellectual property block and the second intellectual property block. In addition, at least a part of the interconnect structure extends across and over the third intellectual property block.
    Type: Application
    Filed: July 28, 2023
    Publication date: May 2, 2024
    Inventors: Li-Chiu WENG, Yew Teck TIEO, Ming-Hsuan WANG, Chia-Cheng CHEN, Wei-Yi CHANG, Jen-Hang YANG, Chien-Hsiung HSU
  • Publication number: 20240138709
    Abstract: A care system monitoring method for sensing the movement state of a bedridden person is provided. The care system monitoring method includes the following stages. Initial-state information is sensed. A first warning signal is issued to remind the caregiver to perform a movement action on the bedridden person when the time that the bedridden person has been in the initial state exceeds the threshold period. First-state information (which is information that is collected when the bedridden person is in the first state) is sensed after completing the movement action. It is determined whether the bedridden person was moved correctly according to the initial-state information and the first-state information. The first-state information is reset as the initial-state information if it is determined that the bedridden person has been moved correctly. A second warning signal is issued if it is determined that the bedridden person has been moved incorrectly.
    Type: Application
    Filed: September 7, 2023
    Publication date: May 2, 2024
    Inventors: Cheng-Hsu CHOU, Wei-Chih LIU, Fang-Iy WU
  • Publication number: 20240146085
    Abstract: The present disclosure provides a battery charging system and method. The battery charging method includes: determining a degree of healthy of a battery module according to an evaluation mechanism; setting a charging standard according to the degree of healthy; by handshaking with a charger, setting a charging voltage for the charger according to the charging standard to charge the battery module; and by the charger, perform a charging operation on the battery module until a fully charged condition is satisfied.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 2, 2024
    Inventors: Tsung-Nan WU, Chih-Hsiang HSU, Wei-Cheng CHEN
  • Publication number: 20240138097
    Abstract: Methods, systems, and devices for managing the operation of data processing systems are disclosed. A data processing system may include a computing device that may provide computer-implemented services. To provide the computer-implemented services, hardware components of the data processing system may need to operate within certain thermal dissipation requirements. To regulate the temperature of the hardware components, a fan may circulate air through the data processing system when the temperatures fall outside the thermal dissipation requirements. To regulate the temperature of the hardware components more efficiently, higher air flow rates may be desired. To increase air flow rates, a three-dimensional ventilation port may be implemented to de-constrict air flow when air enters or exits the data processing system.
    Type: Application
    Filed: October 19, 2022
    Publication date: April 25, 2024
    Inventors: ERIC MICHAEL TUNKS, JULIAN YU-HAO CHEN, SHUN-CHENG HSU, AUSTIN MICHAEL SHELNUTT
  • Publication number: 20240137483
    Abstract: An exemplary embodiment of the invention provides an image processing method for a virtual reality display system. The method includes: enabling a first shared buffer and a second shared buffer; performing an image capturing operation to obtain a first image from a virtual reality scene; storing the first image to the first shared buffer; in response to that the storing of the first image is finished, reading the first image from the first shared buffer; performing a depth estimation operation on the first image to obtain depth information corresponding to the first image; storing the depth information to the second shared buffer; in response to that the storing of the depth information is finished, reading the depth information from the second shared buffer; performing an image generation operation according to the depth information to generate a pair of second images corresponding to the virtual reality scene; and outputting the pair of second images by a display of the virtual reality display system.
    Type: Application
    Filed: October 18, 2022
    Publication date: April 25, 2024
    Applicant: Acer Incorporated
    Inventors: Sergio Cantero Clares, Wen-Cheng Hsu, Shih-Hao Lin, Chih-Haw Tan
  • Publication number: 20240138171
    Abstract: An organic light emitting element includes a substrate, a first electrode, an organic light emitting layer, and a fluorine-containing ion residue region. The first electrode is over the substrate. The organic light emitting layer is over the first electrode. The fluorine-containing ion residue region is on at least one surface of the organic light emitting layer.
    Type: Application
    Filed: October 24, 2023
    Publication date: April 25, 2024
    Inventors: HUEI-SIOU CHEN, LI-CHEN WEI, KUO-CHENG HSU, KER TAI CHU
  • Publication number: 20240138082
    Abstract: Methods, systems, and devices for providing computer implemented services are disclosed. To provide the computer implemented services, the quantity of hardware resources available for providing the computer implemented services may be modified. The quantity of hardware resources may be modified by adding removable cards to a host system. The host system may, while the added removable cards are cold, selectively warm the removable cards through conduction heating to retain their temperatures within operating temperature ranges.
    Type: Application
    Filed: October 19, 2022
    Publication date: April 25, 2024
    Inventors: JULIAN YU-HAO CHEN, SHUN-CHENG HSU, HUNG-JEN CHEN
  • Publication number: 20240138101
    Abstract: Methods and systems for managing the operation of data processing systems are disclosed. A data processing system may include a computing device that may provide computer implemented services. To provide the computer implemented services, hardware components of the data processing system may need to operate in predetermined manners. To manage the operation of the hardware components, the data processing system may cool them when their temperatures fall outside of thermal operating ranges. To facilitate cooling, fans may be densely packed and arranged in a manner the occupies a majority of the space in a stack up. At least one side of the fans may be exposed and may not be covered.
    Type: Application
    Filed: October 19, 2022
    Publication date: April 25, 2024
    Inventors: JULIAN YU-HAO CHEN, SHUN-CHENG HSU, HUNG-JEN CHEN
  • Patent number: 11968843
    Abstract: An embodiment of an integrated circuit chip includes a combination processing core and magnetoresistive random access memory (MRAM) circuitry integrated into the chip. The MRAM circuitry includes a plurality of MRAM cells. The MRAM cells are organized into a number of memories, including a cache memory, a main or working memory and an optional secondary storage memory. The cache memory includes multiple cache levels.
    Type: Grant
    Filed: February 7, 2019
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Te Lin, Yen-Chung Ho, Pin-Cheng Hsu, Han-Ting Tsai, Katherine Chiang
  • Patent number: 11968840
    Abstract: A thin film transistor includes an active layer located over a substrate, a first gate stack including a stack of a first gate dielectric and a first gate electrode and located on a first surface of the active layer, a pair of first contact electrodes contacting peripheral portions of the first surface of the active layer and laterally spaced from each other along a first horizontal direction by the first gate electrode, a second contact electrode contacting a second surface of the active layer that is vertically spaced from the first surface of the active layer, and a pair of second gate stacks including a respective stack of a second gate dielectric and a second gate electrode and located on a respective peripheral portion of a second surface of the active layer.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Yong-Jie Wu, Yen-Chung Ho, Hui-Hsien Wei, Chia-Jung Yu, Pin-Cheng Hsu, Feng-Cheng Yang, Chung-Te Lin
  • Publication number: 20240127429
    Abstract: A meniscus tear assisted determination system includes an image capturing device and a processor. The image capturing device is for capturing a target protocol of a subject, and the target protocol includes a plurality of target knee joint image sequences. The processor is signally connected to the image capturing device and includes a data preprocessing module and a meniscus tear assisted determination program. The data preprocessing module is for grouping the plurality of target knee joint image sequences and extracting a plurality of target coronal plane image sequences and a plurality of target sagittal plane image sequences. The meniscus tear assisted determination program includes a meniscus location detector and a meniscus tear predictor.
    Type: Application
    Filed: February 23, 2023
    Publication date: April 18, 2024
    Applicant: China Medical University
    Inventors: Kuang-Sheng Lee, Kai-Cheng Hsu, Ya-Lun Wu, Ching-Ting Lin