Patents by Inventor Cheng-Hung Shih
Cheng-Hung Shih has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9508676Abstract: A semiconductor package structure having hollow chamber includes a bottom substrate having a bottom baseboard and a bottom metal layer formed on a disposing area of the bottom baseboard, a connection layer formed on the bottom metal layer, and a top substrate. The bottom metal layer has at least one corner having a first and a second outer lateral surface, and an outer connection surface. A first extension line is formed from a first extreme point of the first outer lateral surface, and a second extension line is formed from a second extreme point of the second outer lateral surface. A first exposing area of the bottom baseboard is formed by connecting the first and second extreme points and a cross point of the first and second extreme points. The top substrate connects to the connection layer to form a hollow chamber between the top and bottom substrates.Type: GrantFiled: September 9, 2015Date of Patent: November 29, 2016Assignee: CHIPBOND TECHNOLOGY CORPORATIONInventors: Cheng-Hung Shih, Yung-Wei Hsieh, Shu-Chen Lin, Fu-Yen Ho, Yen-Ting Chen
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Publication number: 20160318756Abstract: A process for manufacturing a semiconductor package having a hollow chamber includes providing a bottom substrate having a bottom plate, a ring wall and a slot, wherein the ring wall and the bottom plate form the slot; forming an under ball metallurgy layer on a surface of the ring wall; bumping a plurality of solder balls on a surface of the under ball metallurgy layer, each of the solder balls comprises a diameter, wherein a spacing is spaced apart between two adjacent solder balls; performing reflow soldering to the solder balls for making the solder balls melting and interconnecting to form a connection layer; connecting a top substrate to the bottom substrate, wherein the lot of the bottom substrate is sealed by the top substrate to form a hollow chamber used for accommodating an electronic device.Type: ApplicationFiled: June 11, 2015Publication date: November 3, 2016Inventors: Cheng-Hung Shih, Yung-Wei Hsieh, Shu-Chen Lin, Fu-Yen Ho, Yen-Ting Chen
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Publication number: 20160293793Abstract: A method for manufacturing a light emitting element is disclosed. A larger end face of a gallium nitride pyramid contacts with a mounting face of a gallium nitride layer disposed on a substrate, with c-axes of the gallium nitride layer and the gallium nitride pyramid coaxial to each other, and with M-planes of the gallium nitride layer and the gallium nitride pyramid parallel to each other. Broken bonds at contact faces of the gallium nitride pyramid and of the gallium nitride layer weld with each other after heating and cooling. A portion of an insulating layer coated on the gallium nitride pyramid and is removed to form an electrically conductive portion on which a first electrode is disposed. A portion of the insulating layer coated on the gallium nitride layer is removed to form another electrically conductive portion on which a second electrode is disposed.Type: ApplicationFiled: June 17, 2016Publication date: October 6, 2016Inventors: I-Kai Lo, Ying-Chieh Wang, Yu-Chi Hsu, Cheng-Hung Shih
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Publication number: 20160141453Abstract: A light emitting element and its manufacturing method are disclosed. A larger end face of a gallium nitride pyramid contacts with a mounting face of a gallium nitride layer disposed on a substrate, with c-axes of the gallium nitride layer and the gallium nitride pyramid coaxial to each other, and with M-planes of the gallium nitride layer and the gallium nitride pyramid parallel to each other. Broken bonds at contact faces of the gallium nitride pyramid and of the gallium nitride layer weld with each other after heating and cooling. A portion of an insulating layer coated on the gallium nitride pyramid and is removed to form an electrically conductive portion on which a first electrode is disposed. A portion of the insulating layer coated on the gallium nitride layer is removed to form another electrically conductive portion on which a second electrode is disposed.Type: ApplicationFiled: December 29, 2014Publication date: May 19, 2016Inventors: I-Kai Lo, Ying-Chieh Wang, Yu-Chi Hsu, Cheng-Hung Shih
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Patent number: 9312440Abstract: An epitaxy structure of a light emitting element includes a gallium nitride substrate, an N-type gallium nitride layer, a quantum well unit, and a P-type gallium nitride layer. The gallium nitride substrate includes a gallium nitride buffer layer, a gallium nitride hexagonal prism, and a gallium nitride hexagonal pyramid. The gallium nitride hexagonal prism extends from the gallium nitride buffer layer along an axis. The gallium nitride hexagonal pyramid extends from the gallium nitride hexagonal prism along the axis and gradually expands to form a hexagonal frustum. The N-type gallium nitride layer is located on the gallium nitride hexagonal pyramid. The quantum well unit includes an indium gallium nitride layer located on the N-type gallium nitride layer and a gallium nitride layer located on the indium gallium nitride layer. The P-type gallium nitride layer is located on the gallium nitride layer.Type: GrantFiled: July 18, 2014Date of Patent: April 12, 2016Assignee: NATIONAL SUN YAT-SEN UNIVERSITYInventors: I-Kai Lo, Yu-Chi Hsu, Cheng-Hung Shih, Wen-Yuan Pang
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Publication number: 20160020166Abstract: A trace structure of fine-pitch pattern includes a connection portion, a first conductive wire portion and a second conductive wire portion, the first conductive wire portion comprises a first section and a second section connected to the first section, the first section connects to the connection portion, the second conductive wire portion comprises a third section and a fourth section connected to the third section, the third section connects to the connection portion, wherein an etching space closed on three sides is formed by the connection portion, the third section and the first section, a first spacing is defined between the third section and the first section, a second spacing is defined between the fourth section and the second section, wherein the first spacing is larger than the second spacing so as to make an metal layer within the etching space completely removed to avoid metal layer residues.Type: ApplicationFiled: October 16, 2014Publication date: January 21, 2016Inventors: Yung-Wei Hsieh, Cheng-Hung Shih, Kai-Yi Wang, Heh-Chang Huang, Po-Hao Chen
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Patent number: 9230823Abstract: A method of photoresist strip includes providing a semiconductor substrate and performing an immerse step and a strip step, wherein the semiconductor substrate comprises a base, a bonding pad, a protective layer, an under bump metallurgy layer, a patterned photoresist layer and a bump. The patterned photoresist layer covers the under bump metallurgy layer and a lateral surface of the bump, wherein a first connection interface is formed between the patterned photoresist layer and the lateral surface of the bump, and a second connection interface is formed between the patterned photoresist layer and the under bump metallurgy layer. In the immerse step, the patterned photoresist layer contacts with a chemical solution which degrades the bond strength of the first connection interface. Therefore, in the strip step, the semiconductor substrate is scoured by a flow with appropriate force of impact, which strips the patterned photoresist layer from the base.Type: GrantFiled: November 3, 2014Date of Patent: January 5, 2016Assignee: CHIPBOND TECHNOLOGY CORPORATIONInventors: Cheng-Hung Shih, Kuo-Hua Yang, Hsiang-Pin Hou
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Patent number: 9216906Abstract: A method for manufacturing aluminum nitride powder includes steps of: preparing a polymer powder, a wood powder having grain size similar with that of the polymer powder, and an alumina powder; and mixing the polymer powder, the wood powder and the alumina powder uniformly and forming granules to be carried out a single-replacement reaction by exposing the granules in a nitrogen-containing atmosphere at a temperature of 1680-1850° C.Type: GrantFiled: December 25, 2013Date of Patent: December 22, 2015Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Yang-Kuao Kuo, Yung-Han Huang, Cheng-Hung Shih, Lea-Hwung Leu
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Publication number: 20150333209Abstract: A stacking structure of a photoelectric device includes a base, a first conducting layer, a first semiconductor layer, a second semiconductor layer, a second conducting layer and two electrodes. The base is essentially made of a light-permeable material. The first conducting layer is arranged on the base and essentially made of a light-permeable, non-metal material. The first semiconductor layer is arranged on the first conducting layer and essentially made of a ternary compound with chalcopyrite phase. The second semiconductor layer is arranged on the first semiconductor layer. The second conducting layer is arranged on the second semiconductor layer and essentially made of a light-permeable semiconductor material different from the light-permeable, non-metal material of the first conducting layer. The two electrodes are respectively arranged on the first and second conducting layers.Type: ApplicationFiled: February 20, 2015Publication date: November 19, 2015Inventors: I-Kai Lo, Cheng-Hung Shih, Bae-Heng Tseng
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Publication number: 20150333226Abstract: A stacking structure of a light-emitting device is disclosed. The stacking structure of the light-emitting device includes a substrate, a first semiconductor layer, a second semiconductor layer, a conducting layer, and two electrodes. The substrate is essentially made of a light-permeable, non-metallic material. The first semiconductor layer is arranged on the substrate and essentially made of a ternary compound with chalcopyrite phase. The second semiconductor layer is arranged on the first semiconductor layer. The conducting layer is arranged on the second semiconductor layer and essentially made of a light-permeable semiconducting material different from the material of the substrate. The two electrodes are respectively arranged on the substrate and the conducting layer. Thus, the problem of having difficulty in emitting the light outwards from the side of the light-emitting diode adjacent to the substrate, as commonly seen in the conventional light-emitting device, is overcome.Type: ApplicationFiled: March 18, 2015Publication date: November 19, 2015Inventors: I-Kai LO, Cheng-Hung SHIH, Bae-Heng TSENG
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Publication number: 20150333222Abstract: An epitaxy structure of a light emitting element includes a gallium nitride substrate, an N-type gallium nitride layer, a quantum well unit, and a P-type gallium nitride layer. The gallium nitride substrate includes a gallium nitride buffer layer, a gallium nitride hexagonal prism, and a gallium nitride hexagonal pyramid. The gallium nitride hexagonal prism extends from the gallium nitride buffer layer along an axis. The gallium nitride hexagonal pyramid extends from the gallium nitride hexagonal prism along the axis and gradually expands to form a hexagonal frustum. The N-type gallium nitride layer is located on the gallium nitride hexagonal pyramid. The quantum well unit includes an indium gallium nitride layer located on the N-type gallium nitride layer and a gallium nitride layer located on the indium gallium nitride layer. The P-type gallium nitride layer is located on the gallium nitride layer.Type: ApplicationFiled: July 18, 2014Publication date: November 19, 2015Inventors: I-KAI LO, YU-CHI HSU, CHENG-HUNG SHIH, WEN-YUAN PANG
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Patent number: 9147808Abstract: An III-nitride quantum well structure includes a GaN base, an InGaN layer and an InGaN covering layer. The GaN base includes a GaN buffering layer, a GaN post extending from the GaN buffering layer, and a GaN pyramid gradually expanding from the GaN post to form a mounting surface. The InGaN layer includes first and second coupling faces. The first coupling face is coupled with the mounting surface. The GaN covering layer includes first and second coupling faces. The first coupling face of the GaN covering layer is coupled with the second coupling face of the InGaN layer.Type: GrantFiled: October 24, 2014Date of Patent: September 29, 2015Assignee: NATIONAL SUN YAT-SEN UNIVERSITYInventors: I-Kai Lo, Yu-Chi Hsu, Cheng-Hung Shih, Wen-Yuan Pang, Ming-Chi Chou
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Publication number: 20150175421Abstract: A method for manufacturing aluminum nitride powder includes steps of: preparing a polymer powder, a wood powder having grain size similar with that of the polymer powder, and an alumina powder; and mixing the polymer powder, the wood powder and the alumina powder uniformly and forming granules to be carried out a single-replacement reaction by exposing the granules in a nitrogen-containing atmosphere at a temperature of 1680-1850° C.Type: ApplicationFiled: December 25, 2013Publication date: June 25, 2015Applicant: Chung-Shan Institute of Science and Technology, Armaments Bureau, M.N.D.Inventors: Yang-Kuao Kuo, Yung-Han Huang, Cheng-Hung Shih, Lea-Hwung Leu
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Publication number: 20150171052Abstract: A substrate of semiconductor is formed by a method including preparing two aluminum nitride (AlN) substrates; forming a first buffer layer on a surface of each AlN substrate; forming a second buffer layer on a free surface of each first buffer layer; and providing an oxygen free copper (OFC) layer to be securely sandwiched between the second buffer layers through a sintering process. Said substrate is a sandwiched structure and is able to be directly carried out coating process to grow semiconductor device thereon.Type: ApplicationFiled: December 18, 2013Publication date: June 18, 2015Applicant: Chung-Shan Institute of Science and Technology, Armaments Bureau, M.N.DInventors: Yang-Kuao Kuo, Cheng-Hung Shih, Jian-Long Ruan, Lea-Hwung Leu
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Publication number: 20150155194Abstract: A method of preparing a heterogeneous stacked co-fired ceramic for use in an aluminum nitride-based electrostatic chuck includes providing a first aluminum nitride blank layer; applying a metal ink to the first aluminum nitride blank layer to form thereon an electrostatic electrode layer by screen printing, wherein the metal ink mainly contains a metal of high melting point; stacking a second aluminum nitride blank layer on the electrostatic electrode layer; laminating the first aluminum nitride blank layer, the electrostatic electrode layer, and the second aluminum nitride blank layer (collectively known as a heterogeneous ceramic) together; and co-firing the laminated heterogeneous ceramic in accordance with a sintering temperature rising curve to prepare the heterogeneous stacked co-fired ceramic characterized by reduced differences in sintering shrinkage ratio between the electrostatic electrode and aluminum nitride blank and enhanced strength and adhesion of the interface between the electrostatic electrType: ApplicationFiled: May 19, 2014Publication date: June 4, 2015Applicant: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: YANG-KUO KUO, JIAN-LONG RUAN, CHENG-HUNG SHIH, LEA-HWUNG LEU
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Publication number: 20150102286Abstract: An III-nitride quantum well structure includes a GaN base, an InGaN layer and an InGaN covering layer. The GaN base includes a GaN buffering layer, a GaN post extending from the GaN buffering layer, and a GaN pyramid gradually expanding from the GaN post to form a mounting surface. The InGaN layer includes first and second coupling faces. The first coupling face is coupled with the mounting surface. The GaN covering layer includes first and second coupling faces. The first coupling face of the GaN covering layer is coupled with the second coupling face of the InGaN layer.Type: ApplicationFiled: October 24, 2014Publication date: April 16, 2015Inventors: I-Kai LO, Yu-Chi HSU, Cheng-Hung SHIH, Wen-Yuan PANG, Ming-Chi CHOU
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Patent number: 8916458Abstract: An III-nitride quantum well structure includes a GaN base, an InGaN layer and an InGaN covering layer. The GaN base includes a GaN buffering layer, a GaN post extending from the GaN buffering layer, and a GaN pyramid gradually expanding from the GaN post to form a mounting surface. The InGaN layer includes first and second coupling faces. The first coupling face is coupled with the mounting surface. The GaN covering layer includes first and second coupling faces. The first coupling face of the GaN covering layer is coupled with the second coupling face of the InGaN layer. A method for manufacturing the III-nitride quantum well structure and a light-emitting unit having a plurality of III-nitride quantum well structures are also proposed.Type: GrantFiled: October 18, 2013Date of Patent: December 23, 2014Assignee: National Sun Yat-Sen UniversityInventors: I-Kai Lo, Yu-Chi Hsu, Cheng-Hung Shih, Wen-Yuan Pang, Ming-Chi Chou
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Publication number: 20140367856Abstract: A semiconductor manufacturing process includes the following steps of providing a silicon substrate having at least one connection pad and a protection layer, forming a first seed layer having at least one first section and at least one second section, forming a first photoresist layer, forming a first buffer layer having a coupling portion and a cladding portion, removing the first photoresist layer, removing the second section of the first seed layer to form a first under bump metallurgy layer, forming a support layer on the protection layer and the first buffer layer, the first under bump metallurgy layer has a first ring wall, the first buffer layer has a second ring wall, wherein the first ring wall, the second ring wall and the cladding portion are cladded by the support layer, and forming a connection portion and covering the coupling portion with the connection portion.Type: ApplicationFiled: September 2, 2014Publication date: December 18, 2014Inventors: Cheng-Hung Shih, Yung-Wei Hsieh, Kai-Yi Wang
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Patent number: 8877629Abstract: A semiconductor manufacturing process includes the following steps of providing a silicon substrate having at least one connection pad and a protection layer, forming a first seed layer having at least one first section and at least one second section, forming a first photoresist layer, forming a first buffer layer having a coupling portion and a cladding portion, removing the first photoresist layer, removing the second section of the first seed layer to form a first under bump metallurgy layer, forming a support layer on the protection layer and the first buffer layer, the first under bump metallurgy layer has a first ring wall, the first buffer layer has a second ring wall, wherein the first ring wall, the second ring wall and the cladding portion are cladded by the support layer, and forming a connection portion and covering the coupling portion with the connection portion.Type: GrantFiled: January 17, 2013Date of Patent: November 4, 2014Assignee: Chipbond Technology CorporationInventors: Cheng-Hung Shih, Yung-Wei Hsieh, Kai-Yi Wang
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Patent number: 8783897Abstract: A lamp module includes an external elongated housing made of at least one of a transparent and a translucent material; a lamp terminal with lamp pins at each end of the elongated housing, at least one cold cathode fluorescent lamp (CCFL) disposed in the external elongated housing a reflective layer disposed in the external lamp elongated housing, and an electronic connector adapter having a plurality of contact pins at one end and a plurality of connecting jacks at an opposite end for receiving the lamp pins of one of the lamp terminals.Type: GrantFiled: March 22, 2011Date of Patent: July 22, 2014Assignee: T1 Lighting Technology Co., Ltd.Inventor: Cheng-Hung Shih