Patents by Inventor Cheng-Hung Shih
Cheng-Hung Shih has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240076422Abstract: A supported metallocene catalyst includes a carrier and a metallocene component. The carrier includes an inorganic oxide particle and an alkyl aluminoxane material. The inorganic oxide particle includes at least one inorganic oxide compound selected from the group consisting of an oxide of Group 3A and an oxide of Group 4A. The alkyl aluminoxane material includes an alkyl aluminoxane compound and an alkyl aluminum compound that is present in amount ranging from greater than 0.01 wt % to less than 14 wt % base on 100 wt % of the alkyl aluminoxane material. The metallocene component is supported on the carrier, and includes one of a metallocene compound containing a metal from Group 3B, a metallocene compound containing a metal from Group 4B, and a combination thereof. A method for preparing the supported metallocene catalyst and a method for preparing polyolefin using the supported metallocene catalyst are also disclosed.Type: ApplicationFiled: September 1, 2023Publication date: March 7, 2024Inventors: Jing-Cherng TSAI, Jen-Long WU, Wen-Hao KANG, Kuei-Pin LIN, Jing-Yu LEE, Jun-Ye HONG, Zih-Yu SHIH, Cheng-Hung CHIANG, Gang-Wei SHEN, Yu-Chuan SUNG, Chung-Hua WENG, Hsing-Ya CHEN
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Patent number: 11522517Abstract: A surface acoustic wave device includes a piezoelectric substrate, a supportive layer, a cover layer and a pillar bump. The supportive layer is disposed on the piezoelectric substrate and around a transducer, the cover layer covers the supportive layer, and the pillar bump is located in a lower via hole of the supportive layer and an upper via hole of the cover layer. The upper via hole has a lateral opening located on a lateral surface of the cover layer, and the pillar bump in the cover layer protrudes from the lateral surface of the cover layer via the lateral opening.Type: GrantFiled: September 25, 2019Date of Patent: December 6, 2022Assignee: CHIPBOND TECHNOLOGY CORPORATIONInventors: Cheng-Hung Shih, Cheng-Fan Lin
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Publication number: 20220337216Abstract: A surface acoustic wave device includes a piezoelectric substrate, a supportive layer, a cover layer and a pillar bump. The supportive layer is disposed on the piezoelectric substrate and around a transducer, the cover layer covers the supportive layer, and the pillar bump is located in a lower via hole of the supportive layer and an upper via hole of the cover layer. The upper via hole has a lateral opening located on a lateral surface of the cover layer, and the pillar bump in the cover layer protrudes from the lateral surface of the cover layer via the lateral opening.Type: ApplicationFiled: July 1, 2022Publication date: October 20, 2022Inventors: Cheng-Hung Shih, Cheng-Fan Lin
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Patent number: 11148864Abstract: The present invention discloses a storage container for electronic devices, especially for wafer frames. The storage container includes a body and a stop rod that is provided to open or close a pick-and-place path in the body. The pick-and-place path is open to allow the wafer frames placed in the body to be taken out when a recess of the stop rod is located in the pick-and-place path. On the contrary, the pick-and-place path is closed when a blocking part of the stop rod is located in the pick-and-place path so as to protect the wafer frames placed in the body from falling out from the storage container.Type: GrantFiled: February 8, 2021Date of Patent: October 19, 2021Assignee: CHIPBOND TECHNOLOGY CORPORATIONInventors: Cheng-Hung Shih, Tsuo-Yun Chu
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Patent number: 11056555Abstract: A semiconductor device having 3D inductor includes a first transverse inductor, a longitudinal inductor and a second transverse inductor. The first transverse inductor is formed on a first substrate, the second transverse inductor and the longitudinal inductor are formed on a second substrate. The second substrate is bonded to the first substrate to connect the first transverse inductor and the longitudinal inductor such that the first transverse inductor, the longitudinal inductor and the second transverse inductor compose a 3D inductor.Type: GrantFiled: May 28, 2020Date of Patent: July 6, 2021Assignee: CHIPBOND TECHNOLOGY CORPORATIONInventors: Cheng-Hung Shih, Nian-Cih Yang, Yi-Cheng Chen, Shang-Jan Yang
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Patent number: 10923621Abstract: The present invention uses a photolithography process and an electroplating process to perform. TAV copper filling and patterning of the fabrication of the double side copper-plated layers to plate the double side copper-plated layers in advance at the TAV through holes to serve as a stress buffer layer of the aluminum nitride substrates. Then the subsequent pattern designs of the copper-plated layers are customized. According to the simulation theory calculations, it is proved that the stress which accumulates on the short-side of the copper-plated layer of the aluminum nitride substrate with the asymmetric structure may be effectively reduced to facilitate the improvement of the reliability of the aluminum nitride substrate.Type: GrantFiled: October 25, 2019Date of Patent: February 16, 2021Assignee: National Chung-Shan Institute of Science and TechnologyInventors: Chun-Te Wu, Yang-Kuo Kuo, Cheng-Hung Shih, Hong-Ting Huang
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Publication number: 20210013865Abstract: A surface acoustic wave device includes a piezoelectric substrate, a supportive layer, a cover layer and a pillar bump. The supportive layer is disposed on the piezoelectric substrate and around a transducer, the cover layer covers the supportive layer, and the pillar bump is located in a lower via hole of the supportive layer and an upper via hole of the cover layer. The upper via hole has a lateral opening located on a lateral surface of the cover layer, and the pillar bump in the cover layer protrudes from the lateral surface of the cover layer via the lateral opening.Type: ApplicationFiled: September 25, 2019Publication date: January 14, 2021Inventors: Cheng-Hung Shih, Cheng-Fan Lin
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Patent number: 10808331Abstract: An electroplating system for depositing a plating material on an object includes a pressure device and an anode element. The pressure device includes a lid having first and second through holes and a base having a chamber, conduction holes and third through holes located in the chamber. Each of the conduction tubes includes a conduction hole connecting to one of the third through holes. The lid covers the chamber, the first through holes communicate with the chamber for spraying an electroplating solution toward the object and the second through holes reveal the conduction holes. A passage of electric force line is formed in the connected holes and the third through holes filled with the electroplating solution, and the anode element is located outside the passage of electric force line. The electroplating system can prevent defective plating and enhance plating efficiency.Type: GrantFiled: January 11, 2018Date of Patent: October 20, 2020Assignee: CHIPBOND TECHNOLOGY CORPORATIONInventors: Cheng-Hung Shih, Tsuo-Yun Chu, Xin-Wei Lo, Nian-Cih Yang
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Patent number: 10797213Abstract: A microchip is electrically connected to a substrate to become a chip package, preferably for LED. A chip of the package includes a body and at least one electrode which is disposed and exposed on a surface of the body. The electrode includes a confining groove and a confining wall. The confining wall is peripherally located around the confining groove and provided to confine at least one conductive particle of an adhesive in the confining groove. The electrode of the chip is electrically connected to a bonding pad of a substrate via the conductive particle confined in the confining groove.Type: GrantFiled: January 29, 2019Date of Patent: October 6, 2020Assignee: CHIPBOND TECHNOLOGY CORPORATIONInventors: Chin-Tang Hsieh, Cheng-Hung Shih
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Publication number: 20200295123Abstract: A semiconductor device having 3D inductor includes a first transverse inductor, a longitudinal inductor and a second transverse inductor. The first transverse inductor is formed on a first substrate, the second transverse inductor and the longitudinal inductor are formed on a second substrate. The second substrate is bonded to the first substrate to connect the first transverse inductor and the longitudinal inductor such that the first transverse inductor, the longitudinal inductor and the second transverse inductor compose a 3D inductor.Type: ApplicationFiled: May 28, 2020Publication date: September 17, 2020Inventors: Cheng-Hung Shih, Nian-Cih Yang, Yi-Cheng Chen, Shang-Jan Yang
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Publication number: 20200266262Abstract: A semiconductor device having 3D inductor includes a first transverse inductor, a longitudinal inductor and a second transverse inductor. The first transverse inductor is formed on a first substrate, the second transverse inductor and the longitudinal inductor are formed on a second substrate. The second substrate is bonded to the first substrate to connect the first transverse inductor and the longitudinal inductor such that the first transverse inductor, the longitudinal inductor and the second transverse inductor compose a 3D inductor.Type: ApplicationFiled: May 2, 2019Publication date: August 20, 2020Inventors: Cheng-Hung Shih, Nian-Cih Yang, Yi-Cheng Chen, Shang-Jan Yang
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Publication number: 20200152825Abstract: The present invention uses a photolithography process and an electroplating process to perform. TAV copper filling and patterning of the fabrication of the double side copper-plated layers to plate the double side copper-plated layers in advance at the TAV through holes to serve as a stress buffer layer of the aluminum nitride substrates. Then the subsequent pattern designs of the copper-plated layers are customized. According to the simulation theory calculations, it is proved that the stress which accumulates on the short-side of the copper-plated layer of the aluminum nitride substrate with the asymmetric structure may be effectively reduced to facilitate the improvement of the reliability of the aluminum nitride substrate.Type: ApplicationFiled: October 25, 2019Publication date: May 14, 2020Inventors: Chun-Te Wu, Yang-Kuo Kuo, Cheng-Hung Shih, Hong-Ting Huang
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Publication number: 20200091385Abstract: A microchip is electrically connected to a substrate to become a chip package, preferably for LED. A chip of the package includes a body and at least one electrode which is disposed and exposed on a surface of the body. The electrode includes a confining groove and a confining wall. The confining wall is peripherally located around the confining groove and provided to confine at least one conductive particle of an adhesive in the confining groove. The electrode of the chip is electrically connected to a bonding pad of a substrate via the conductive particle confined in the confining groove.Type: ApplicationFiled: January 29, 2019Publication date: March 19, 2020Inventors: Chin-Tang Hsieh, Cheng-Hung Shih
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Patent number: 10384941Abstract: A method utilizes easily obtained carbon as carbon source for sintering, followed by high energy ball milling process with planetary ball mill for high energy homogenous mixing of the carbon source, solvent and nano-level silicon dioxide powder, along with a high energy ball milling process repeatedly performed using different sized ball mill beads, so as to formulate a spray granulation slurry with the optimal viscosity, to complete the process of micronization of carbon source evenly encapsulated by silicon dioxide powders. The optimal ratio of C/SiO2 is 1-2.5 to produce a spherical silicon dioxide powder (40-50 ?m) evenly encapsulated by the carbon source. The powder is then subjected to a high temperature (1450?) sintering process under nitrogen gas. Lastly, the sintered silicon nitride powder is subjected to homogenizing carbon removal process in a rotational high temperature furnace to complete the fabricating process.Type: GrantFiled: December 13, 2017Date of Patent: August 20, 2019Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Chun-Te Wu, Kuan-Ting Lai, Cheng-Hung Shih, Yang-Kuo Kuo
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Patent number: 10381508Abstract: This invention discloses a light emitting element to solve the problem of lattice mismatch and inequality of electron holes and electrons of the conventional light emitting elements. The light emitting element comprises a gallium nitride layer, a gallium nitride pyramid, an insulating layer, a first electrode and a second electrode. The gallium nitride pyramid contacts with the gallium nitride layer, with a c-axis of the gallium nitride layer opposite in direction to a c-axis of the gallium nitride pyramid, and with an M-plane of the gallium nitride layer parallel to an M-plane of the gallium nitride pyramid, with broken bonds at the mounting face of the gallium nitride layer and the larger end face of the gallium nitride pyramid welded with each other, with the gallium nitride layer and the gallium nitride pyramid being used as a p-type semiconductor and an n-type semiconductor respectively.Type: GrantFiled: October 12, 2018Date of Patent: August 13, 2019Assignee: NATIONAL SUN YAT-SEN UNIVERSITYInventors: I-Kai Lo, Ying-Chieh Wang, Yu-Chi Hsu, Cheng-Hung Shih
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Publication number: 20190186037Abstract: An electroplating system for depositing a plating material on an object includes a pressure device and an anode element. The pressure device includes a lid having first and second through holes and a base having a chamber, conduction holes and third through holes located in the chamber. Each of the conduction tubes includes a conduction hole connecting to one of the third through holes. The lid covers the chamber, the first through holes communicate with the chamber for spraying an electroplating solution toward the object and the second through holes reveal the conduction holes. A passage of electric force line is formed in the connected holes and the third through holes filled with the electroplating solution, and the anode element is located outside the passage of electric force line. The electroplating system can prevent defective plating and enhance plating efficiency.Type: ApplicationFiled: January 11, 2018Publication date: June 20, 2019Inventors: Cheng-Hung Shih, Tsuo-Yun Chu, Xin-Wei Lo, Nian-Cih Yang
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Publication number: 20190177162Abstract: A method utilizes easily obtained carbon as carbon source for sintering, followed by high energy ball milling process with planetary ball mill for high energy homogenous mixing of the carbon source, solvent and nano-level silicon dioxide powder, along with a high energy ball milling process repeatedly performed using different sized ball mill beads, so as to formulate a spray granulation slurry with the optimal viscosity, to complete the process of micronization of carbon source evenly encapsulated by silicon dioxide powders. The optimal ratio of C/SiO2 is 1-2.5 to produce a spherical silicon dioxide powder (40-50 ?m) evenly encapsulated by the carbon source. The powder is then subjected to a high temperature (1450?) sintering process under nitrogen gas. Lastly, the sintered silicon nitride powder is subjected to homogenizing carbon removal process in a rotational high temperature furnace to complete the fabricating process.Type: ApplicationFiled: December 13, 2017Publication date: June 13, 2019Inventors: CHUN-TE WU, KUAN-TING LAI, CHENG-HUNG SHIH, YANG-KUO KUO
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Publication number: 20190044022Abstract: This invention discloses a light emitting element to solve the problem of lattice mismatch and inequality of electron holes and electrons of the conventional light emitting elements. The light emitting element comprises a gallium nitride layer, a gallium nitride pyramid, an insulating layer, a first electrode and a second electrode. The gallium nitride pyramid contacts with the gallium nitride layer, with a c-axis of the gallium nitride layer opposite in direction to a c-axis of the gallium nitride pyramid, and with an M-plane of the gallium nitride layer parallel to an M-plane of the gallium nitride pyramid, with broken bonds at the mounting face of the gallium nitride layer and the larger end face of the gallium nitride pyramid welded with each other, with the gallium nitride layer and the gallium nitride pyramid being used as a p-type semiconductor and an n-type semiconductor respectively.Type: ApplicationFiled: October 12, 2018Publication date: February 7, 2019Inventors: I-Kai Lo, Ying-Chieh Wang, Yu-Chi Hsu, Cheng-Hung Shih
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Patent number: 10144645Abstract: A method for preparing spherical aluminum oxynitride powder, comprising the steps of (A) providing an alumina powder and a resin, both of which are then dispersed and dissolved in a solvent to form a mixed slurry; (B) subjecting the mixed slurry to spray drying to form a spherical powder; (C) subjecting the spherical powder to a carbonization treatment under an inert atmosphere to form a carbonized spherical powder; (D) subjecting the carbonized spherical powder to carbothermic reduction in a nitrogen-containing atmosphere at a temperature of 1450° C. to 1550° C.; (E) keeping the spherical powder that has been subjected to carbothermic reduction in the nitrogen-containing atmosphere to carry out a nitridation reaction at a temperature of 1700° C. to 1730° C., forming a nitrided spherical aluminum oxynitride powder; (F) subjecting the nitrided spherical aluminum oxynitride powder to decarbonization in an oxygen-containing atmosphere to form the spherical aluminum oxynitride powder.Type: GrantFiled: July 27, 2017Date of Patent: December 4, 2018Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Kuan-Ting Lai, Chun-Te Wu, Cheng-Hung Shih, Yang-Kuo Kuo, Lea-Hwung Leu
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Publication number: 20170042312Abstract: A cosmetic product includes a main body and a barrier unit. The main body includes a base layer, a skincare preparation that is dispersed in or formed on the base layer, and a fluorescent layer that is disposed on the base layer and that includes a fluorescent material emitting light with a predetermined wavelength after being excited by a light source. The barrier unit is disposed on the fluorescent layer of the main body for blocking light emitted from the light source and having a wavelength less than 380 nm or between 780 nm and 1100 nm from entering into the fluorescent layer and the base layer.Type: ApplicationFiled: August 11, 2016Publication date: February 16, 2017Inventor: Cheng-Hung SHIH