Patents by Inventor Cheng-Hung Shih

Cheng-Hung Shih has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250147511
    Abstract: A patrol and inspection vehicle includes a vehicle body, distance measuring devices installed on front and rear sides of the vehicle body for detecting distances of ambient objects, a LiDAR sensor installed on the vehicle body for constructing a three-dimensional spatial model for positioning and navigation, a panoramic camera installed on the vehicle body for recognizing images of ambient individuals, and a gas detector installed on the vehicle body for detecting leaked gases having a temperature different from room temperature. The patrol and inspection vehicle can automatically inspect whether there are gas leaks in pipelines and detect if individuals have accidentally entered restricted areas, thereby reducing the manpower required for patrols and enhancing factory safety.
    Type: Application
    Filed: November 7, 2023
    Publication date: May 8, 2025
    Applicant: Droxo Technology Co., Ltd.
    Inventors: YI HUANG, CHENG-HAN HSIEH, CHUN-LIN LIU, CHENG-HUNG SHIH
  • Patent number: 12224734
    Abstract: A surface acoustic wave device includes a piezoelectric substrate, a supportive layer, a cover layer and a pillar bump. The supportive layer is disposed on the piezoelectric substrate and around a transducer, the cover layer covers the supportive layer, and the pillar bump is located in a lower via hole of the supportive layer and an upper via hole of the cover layer. The upper via hole has a lateral opening located on a lateral surface of the cover layer, and the pillar bump in the cover layer protrudes from the lateral surface of the cover layer via the lateral opening.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: February 11, 2025
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Cheng-Hung Shih, Cheng-Fan Lin
  • Publication number: 20250038052
    Abstract: In a method of manufacturing a chip structure, a first carrier is attached on a back surface of a wafer, the wafer is diced into individual dies and there is a groove formed between the adjacent dies, then a second carrier is attached on an active surface of the wafer and the first carrier is removed to expose the groove, a back surface and a lateral surface of each of the dies, a heat dissipation cover is formed on the back surface and the lateral surface of each of the dies to obtain chip structures. The heat dissipation cover is provided to increase heat dissipation efficiency of the dies and prevent formation of metal debris which may contaminate the dies. Furthermore, the heat dissipation cover is prevented from being separated from the die.
    Type: Application
    Filed: March 21, 2024
    Publication date: January 30, 2025
    Inventors: Cheng-Hung Shih, Yung-Wei Hsieh, Chia-Ling Shih
  • Publication number: 20240199421
    Abstract: A method for preparing aluminum nitride powder, comprising: (A) providing an aluminum metal powder and a carbon source, and mixing the aluminum metal powder and the carbon source to form a mixed powder; (B) performing a medium-low-temperature nitriding reaction on the mixed powder to form a partially nitrided aluminum nitride powder containing an intermediate aluminum carbide phase; (C) subjecting the partially nitrided aluminum nitride powder to a high-temperature nitriding reaction to remove the intermediate aluminum carbide phase and form a fully nitrided aluminum nitride powder; and (D) decarbonizing the fully nitrided aluminum nitride powder in the atmosphere to form a high-purity aluminum nitride powder.
    Type: Application
    Filed: December 15, 2022
    Publication date: June 20, 2024
    Inventors: JIAN-LONG RUAN, CHENG-HUNG SHIH
  • Patent number: 11522517
    Abstract: A surface acoustic wave device includes a piezoelectric substrate, a supportive layer, a cover layer and a pillar bump. The supportive layer is disposed on the piezoelectric substrate and around a transducer, the cover layer covers the supportive layer, and the pillar bump is located in a lower via hole of the supportive layer and an upper via hole of the cover layer. The upper via hole has a lateral opening located on a lateral surface of the cover layer, and the pillar bump in the cover layer protrudes from the lateral surface of the cover layer via the lateral opening.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: December 6, 2022
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Cheng-Hung Shih, Cheng-Fan Lin
  • Publication number: 20220337216
    Abstract: A surface acoustic wave device includes a piezoelectric substrate, a supportive layer, a cover layer and a pillar bump. The supportive layer is disposed on the piezoelectric substrate and around a transducer, the cover layer covers the supportive layer, and the pillar bump is located in a lower via hole of the supportive layer and an upper via hole of the cover layer. The upper via hole has a lateral opening located on a lateral surface of the cover layer, and the pillar bump in the cover layer protrudes from the lateral surface of the cover layer via the lateral opening.
    Type: Application
    Filed: July 1, 2022
    Publication date: October 20, 2022
    Inventors: Cheng-Hung Shih, Cheng-Fan Lin
  • Patent number: 11148864
    Abstract: The present invention discloses a storage container for electronic devices, especially for wafer frames. The storage container includes a body and a stop rod that is provided to open or close a pick-and-place path in the body. The pick-and-place path is open to allow the wafer frames placed in the body to be taken out when a recess of the stop rod is located in the pick-and-place path. On the contrary, the pick-and-place path is closed when a blocking part of the stop rod is located in the pick-and-place path so as to protect the wafer frames placed in the body from falling out from the storage container.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: October 19, 2021
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Cheng-Hung Shih, Tsuo-Yun Chu
  • Patent number: 11056555
    Abstract: A semiconductor device having 3D inductor includes a first transverse inductor, a longitudinal inductor and a second transverse inductor. The first transverse inductor is formed on a first substrate, the second transverse inductor and the longitudinal inductor are formed on a second substrate. The second substrate is bonded to the first substrate to connect the first transverse inductor and the longitudinal inductor such that the first transverse inductor, the longitudinal inductor and the second transverse inductor compose a 3D inductor.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: July 6, 2021
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Cheng-Hung Shih, Nian-Cih Yang, Yi-Cheng Chen, Shang-Jan Yang
  • Patent number: 10923621
    Abstract: The present invention uses a photolithography process and an electroplating process to perform. TAV copper filling and patterning of the fabrication of the double side copper-plated layers to plate the double side copper-plated layers in advance at the TAV through holes to serve as a stress buffer layer of the aluminum nitride substrates. Then the subsequent pattern designs of the copper-plated layers are customized. According to the simulation theory calculations, it is proved that the stress which accumulates on the short-side of the copper-plated layer of the aluminum nitride substrate with the asymmetric structure may be effectively reduced to facilitate the improvement of the reliability of the aluminum nitride substrate.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: February 16, 2021
    Assignee: National Chung-Shan Institute of Science and Technology
    Inventors: Chun-Te Wu, Yang-Kuo Kuo, Cheng-Hung Shih, Hong-Ting Huang
  • Publication number: 20210013865
    Abstract: A surface acoustic wave device includes a piezoelectric substrate, a supportive layer, a cover layer and a pillar bump. The supportive layer is disposed on the piezoelectric substrate and around a transducer, the cover layer covers the supportive layer, and the pillar bump is located in a lower via hole of the supportive layer and an upper via hole of the cover layer. The upper via hole has a lateral opening located on a lateral surface of the cover layer, and the pillar bump in the cover layer protrudes from the lateral surface of the cover layer via the lateral opening.
    Type: Application
    Filed: September 25, 2019
    Publication date: January 14, 2021
    Inventors: Cheng-Hung Shih, Cheng-Fan Lin
  • Patent number: 10808331
    Abstract: An electroplating system for depositing a plating material on an object includes a pressure device and an anode element. The pressure device includes a lid having first and second through holes and a base having a chamber, conduction holes and third through holes located in the chamber. Each of the conduction tubes includes a conduction hole connecting to one of the third through holes. The lid covers the chamber, the first through holes communicate with the chamber for spraying an electroplating solution toward the object and the second through holes reveal the conduction holes. A passage of electric force line is formed in the connected holes and the third through holes filled with the electroplating solution, and the anode element is located outside the passage of electric force line. The electroplating system can prevent defective plating and enhance plating efficiency.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: October 20, 2020
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Cheng-Hung Shih, Tsuo-Yun Chu, Xin-Wei Lo, Nian-Cih Yang
  • Patent number: 10797213
    Abstract: A microchip is electrically connected to a substrate to become a chip package, preferably for LED. A chip of the package includes a body and at least one electrode which is disposed and exposed on a surface of the body. The electrode includes a confining groove and a confining wall. The confining wall is peripherally located around the confining groove and provided to confine at least one conductive particle of an adhesive in the confining groove. The electrode of the chip is electrically connected to a bonding pad of a substrate via the conductive particle confined in the confining groove.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: October 6, 2020
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Chin-Tang Hsieh, Cheng-Hung Shih
  • Publication number: 20200295123
    Abstract: A semiconductor device having 3D inductor includes a first transverse inductor, a longitudinal inductor and a second transverse inductor. The first transverse inductor is formed on a first substrate, the second transverse inductor and the longitudinal inductor are formed on a second substrate. The second substrate is bonded to the first substrate to connect the first transverse inductor and the longitudinal inductor such that the first transverse inductor, the longitudinal inductor and the second transverse inductor compose a 3D inductor.
    Type: Application
    Filed: May 28, 2020
    Publication date: September 17, 2020
    Inventors: Cheng-Hung Shih, Nian-Cih Yang, Yi-Cheng Chen, Shang-Jan Yang
  • Publication number: 20200266262
    Abstract: A semiconductor device having 3D inductor includes a first transverse inductor, a longitudinal inductor and a second transverse inductor. The first transverse inductor is formed on a first substrate, the second transverse inductor and the longitudinal inductor are formed on a second substrate. The second substrate is bonded to the first substrate to connect the first transverse inductor and the longitudinal inductor such that the first transverse inductor, the longitudinal inductor and the second transverse inductor compose a 3D inductor.
    Type: Application
    Filed: May 2, 2019
    Publication date: August 20, 2020
    Inventors: Cheng-Hung Shih, Nian-Cih Yang, Yi-Cheng Chen, Shang-Jan Yang
  • Publication number: 20200152825
    Abstract: The present invention uses a photolithography process and an electroplating process to perform. TAV copper filling and patterning of the fabrication of the double side copper-plated layers to plate the double side copper-plated layers in advance at the TAV through holes to serve as a stress buffer layer of the aluminum nitride substrates. Then the subsequent pattern designs of the copper-plated layers are customized. According to the simulation theory calculations, it is proved that the stress which accumulates on the short-side of the copper-plated layer of the aluminum nitride substrate with the asymmetric structure may be effectively reduced to facilitate the improvement of the reliability of the aluminum nitride substrate.
    Type: Application
    Filed: October 25, 2019
    Publication date: May 14, 2020
    Inventors: Chun-Te Wu, Yang-Kuo Kuo, Cheng-Hung Shih, Hong-Ting Huang
  • Publication number: 20200091385
    Abstract: A microchip is electrically connected to a substrate to become a chip package, preferably for LED. A chip of the package includes a body and at least one electrode which is disposed and exposed on a surface of the body. The electrode includes a confining groove and a confining wall. The confining wall is peripherally located around the confining groove and provided to confine at least one conductive particle of an adhesive in the confining groove. The electrode of the chip is electrically connected to a bonding pad of a substrate via the conductive particle confined in the confining groove.
    Type: Application
    Filed: January 29, 2019
    Publication date: March 19, 2020
    Inventors: Chin-Tang Hsieh, Cheng-Hung Shih
  • Patent number: 10384941
    Abstract: A method utilizes easily obtained carbon as carbon source for sintering, followed by high energy ball milling process with planetary ball mill for high energy homogenous mixing of the carbon source, solvent and nano-level silicon dioxide powder, along with a high energy ball milling process repeatedly performed using different sized ball mill beads, so as to formulate a spray granulation slurry with the optimal viscosity, to complete the process of micronization of carbon source evenly encapsulated by silicon dioxide powders. The optimal ratio of C/SiO2 is 1-2.5 to produce a spherical silicon dioxide powder (40-50 ?m) evenly encapsulated by the carbon source. The powder is then subjected to a high temperature (1450?) sintering process under nitrogen gas. Lastly, the sintered silicon nitride powder is subjected to homogenizing carbon removal process in a rotational high temperature furnace to complete the fabricating process.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: August 20, 2019
    Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Chun-Te Wu, Kuan-Ting Lai, Cheng-Hung Shih, Yang-Kuo Kuo
  • Patent number: 10381508
    Abstract: This invention discloses a light emitting element to solve the problem of lattice mismatch and inequality of electron holes and electrons of the conventional light emitting elements. The light emitting element comprises a gallium nitride layer, a gallium nitride pyramid, an insulating layer, a first electrode and a second electrode. The gallium nitride pyramid contacts with the gallium nitride layer, with a c-axis of the gallium nitride layer opposite in direction to a c-axis of the gallium nitride pyramid, and with an M-plane of the gallium nitride layer parallel to an M-plane of the gallium nitride pyramid, with broken bonds at the mounting face of the gallium nitride layer and the larger end face of the gallium nitride pyramid welded with each other, with the gallium nitride layer and the gallium nitride pyramid being used as a p-type semiconductor and an n-type semiconductor respectively.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: August 13, 2019
    Assignee: NATIONAL SUN YAT-SEN UNIVERSITY
    Inventors: I-Kai Lo, Ying-Chieh Wang, Yu-Chi Hsu, Cheng-Hung Shih
  • Publication number: 20190186037
    Abstract: An electroplating system for depositing a plating material on an object includes a pressure device and an anode element. The pressure device includes a lid having first and second through holes and a base having a chamber, conduction holes and third through holes located in the chamber. Each of the conduction tubes includes a conduction hole connecting to one of the third through holes. The lid covers the chamber, the first through holes communicate with the chamber for spraying an electroplating solution toward the object and the second through holes reveal the conduction holes. A passage of electric force line is formed in the connected holes and the third through holes filled with the electroplating solution, and the anode element is located outside the passage of electric force line. The electroplating system can prevent defective plating and enhance plating efficiency.
    Type: Application
    Filed: January 11, 2018
    Publication date: June 20, 2019
    Inventors: Cheng-Hung Shih, Tsuo-Yun Chu, Xin-Wei Lo, Nian-Cih Yang
  • Publication number: 20190177162
    Abstract: A method utilizes easily obtained carbon as carbon source for sintering, followed by high energy ball milling process with planetary ball mill for high energy homogenous mixing of the carbon source, solvent and nano-level silicon dioxide powder, along with a high energy ball milling process repeatedly performed using different sized ball mill beads, so as to formulate a spray granulation slurry with the optimal viscosity, to complete the process of micronization of carbon source evenly encapsulated by silicon dioxide powders. The optimal ratio of C/SiO2 is 1-2.5 to produce a spherical silicon dioxide powder (40-50 ?m) evenly encapsulated by the carbon source. The powder is then subjected to a high temperature (1450?) sintering process under nitrogen gas. Lastly, the sintered silicon nitride powder is subjected to homogenizing carbon removal process in a rotational high temperature furnace to complete the fabricating process.
    Type: Application
    Filed: December 13, 2017
    Publication date: June 13, 2019
    Inventors: CHUN-TE WU, KUAN-TING LAI, CHENG-HUNG SHIH, YANG-KUO KUO