Patents by Inventor Cheng LING

Cheng LING has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12278138
    Abstract: The present application provides a method of manufacturing a memory device.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: April 15, 2025
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Cheng-Ling Yang
  • Publication number: 20250089364
    Abstract: A integrated circuit includes a first, a second, a third, and a fourth gate, a first input pin and a first conductor. The first and third gate are on a first level. The second and fourth gate are on a second level. The second gate is coupled to the first gate. The fourth gate is coupled to the third gate. The first input pin extends in a second direction, is on a first metal layer above a front-side of a substrate, is coupled to the first gate, and configured to receive a first input signal. The first input pin is electrically coupled to the third gate by the first, second or fourth gate. The first conductor extends in the first direction, is on a second metal layer below a back-side of the substrate, and is coupled to the second and fourth gate.
    Type: Application
    Filed: September 11, 2023
    Publication date: March 13, 2025
    Inventors: Cheng-Ling WU, Chih-Liang CHEN, Chi-Yu LU, Yi-Yi CHEN, Ting-Yun WU
  • Patent number: 12237209
    Abstract: The present application provides a method of manufacturing a memory device. The method includes steps of providing a semiconductor substrate having an active area disposed over or in the semiconductor substrate, and a first isolation member extending into the semiconductor substrate and disposed adjacent to the active area; disposing an energy-decomposable mask over the semiconductor substrate and the first isolation member; irradiating a portion of the energy-decomposable mask with an electromagnetic radiation; removing the portion of the energy-decomposable mask irradiated with the electromagnetic radiation to form a patterned energy-decomposable mask; removing a portion of the semiconductor substrate exposed through the patterned energy-decomposable mask to form a trench; removing the patterned energy-decomposable mask; and forming a second isolation member within the trench.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: February 25, 2025
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Cheng-Ling Yang
  • Publication number: 20240219641
    Abstract: An optical module is disclosed. The optical module includes a carrier and a lid disposed over the carrier. The carrier and the lid are collaboratively define a first cavity for accommodating a photonic component. The optical module also includes a first electrical contact disposed over a first side of the lid and configured to provide an electronic connection for the optical module. A first aperture penetrating the lid is formed at the first side of the lid and corresponds to a light transmission/reception area of the photonic component.
    Type: Application
    Filed: December 30, 2022
    Publication date: July 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Ling HUANG, Ying-Chung CHEN
  • Patent number: 11893071
    Abstract: This application provides a content recommendation method and apparatus, an electronic device, and a storage medium.
    Type: Grant
    Filed: April 21, 2022
    Date of Patent: February 6, 2024
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Cheng Ling, Yalong Wang, Rui Wang, Ruobing Xie, Feng Xia, Leyu Lin
  • Publication number: 20230360959
    Abstract: The present application provides a method of manufacturing a memory device.
    Type: Application
    Filed: May 5, 2022
    Publication date: November 9, 2023
    Inventor: CHENG-LING YANG
  • Publication number: 20230360958
    Abstract: The present application provides a method of manufacturing a memory device. The method includes steps of providing a semiconductor substrate having an active area disposed over or in the semiconductor substrate, and a first isolation member extending into the semiconductor substrate and disposed adjacent to the active area; disposing an energy-decomposable mask over the semiconductor substrate and the first isolation member; irradiating a portion of the energy-decomposable mask with an electromagnetic radiation; removing the portion of the energy-decomposable mask irradiated with the electromagnetic radiation to form a patterned energy-decomposable mask; removing a portion of the semiconductor substrate exposed through the patterned energy-decomposable mask to form a trench; removing the patterned energy-decomposable mask; and forming a second isolation member within the trench.
    Type: Application
    Filed: May 5, 2022
    Publication date: November 9, 2023
    Inventor: CHENG-LING YANG
  • Patent number: 11699734
    Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a fin, a gate structure positioned on the fin, impurity regions positioned on two sides of the fin, contacts positioned on the impurity regions, and conductive covering layers positioned on the contacts. The conductive covering layers are formed of copper germanide.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: July 11, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Cheng-Ling Yang
  • Patent number: 11682684
    Abstract: An optical package structure and a method for manufacturing an optical package structure are provided. The optical package structure includes a sensor, an optical component and a fixing element. The optical component directly contacts the sensor. An interfacial area is defined by a contacting region of the optical component and the sensor. The fixing element is disposed outside of the interfacial area for bonding the optical component and the sensor.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: June 20, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Ling Huang, Lu-Ming Lai, Ying-Chung Chen
  • Patent number: 11652151
    Abstract: The present disclosure provides a semiconductor device structure with a conductive contact and a method for preparing the semiconductor device structure. The semiconductor device structure includes a dielectric layer disposed over a semiconductor substrate; a conductive contact penetrating through the dielectric layer; and a metal oxide layer separating the conductive contact from the dielectric layer, wherein the conductive contact and the metal oxide layer comprise a same metal.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: May 16, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Cheng-Ling Yang
  • Publication number: 20230034084
    Abstract: The present disclosure provides a semiconductor device structure with a conductive contact and a method for preparing the semiconductor device structure. The semiconductor device structure includes a dielectric layer disposed over a semiconductor substrate; a conductive contact penetrating through the dielectric layer; and a metal oxide layer separating the conductive contact from the dielectric layer, wherein the conductive contact and the metal oxide layer comprise a same metal.
    Type: Application
    Filed: July 28, 2021
    Publication date: February 2, 2023
    Inventor: CHENG-LING YANG
  • Patent number: 11551963
    Abstract: A semiconductor device package includes a substrate, a partition structure and a polymer film. The partition structure is disposed on the substrate and defines a space for accommodating a semiconductor device. The polymer film is adjacent to a side of the partition structure distal to the substrate. A first side surface of the polymer film substantially aligns with a first side surface of the partition structure.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: January 10, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei Ling Ma, Ying-Chung Chen, Hsin-Ying Ho, Cheng-Ling Huang, Chang Chin Tsai
  • Patent number: 11521978
    Abstract: The present application discloses a semiconductor device with a programmable unit and a method for fabricating the semiconductor device. The semiconductor device includes a substrate comprising a first region and a second region; a first semiconductor element positioned in the first region of the substrate; a second semiconductor element positioned in the first region of the substrate and electrically coupled to the first semiconductor element; and a programmable unit positioned in the second region and electrically connected to the first semiconductor element.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: December 6, 2022
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Cheng-Ling Yang
  • Publication number: 20220254895
    Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a fin, a gate structure positioned on the fin, impurity regions positioned on two sides of the fin, contacts positioned on the impurity regions, and conductive covering layers positioned on the contacts. The conductive covering layers are formed of copper germanide.
    Type: Application
    Filed: February 10, 2021
    Publication date: August 11, 2022
    Inventor: CHENG-LING YANG
  • Publication number: 20220245213
    Abstract: This application provides a content recommendation method and apparatus, an electronic device, and a storage medium.
    Type: Application
    Filed: April 21, 2022
    Publication date: August 4, 2022
    Inventors: Cheng LING, Yalong WANG, Rui WANG, Ruobing XIE, Feng XIA, Leyu LIN
  • Publication number: 20220115425
    Abstract: An optical package structure and a method for manufacturing an optical package structure are provided. The optical package structure includes a sensor, an optical component and a fixing element. The optical component directly contacts the sensor. An interfacial area is defined by a contacting region of the optical component and the sensor. The fixing element is disposed outside of the interfacial area for bonding the optical component and the sensor.
    Type: Application
    Filed: October 8, 2020
    Publication date: April 14, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Ling HUANG, Lu-Ming LAI, Ying-Chung CHEN
  • Patent number: 11296651
    Abstract: A semiconductor package structure includes an organic substrate having a first surface, a first recess depressed from the first surface, a first chip over the first surface and covering the first recess, thereby defining a first cavity enclosed by a back surface of the first chip and the first recess, and a second chip over the first chip. The first cavity is an air cavity or a vacuum cavity.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: April 5, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chi Sheng Tseng, Lu-Ming Lai, Ching-Han Huang, Hui-Chung Liu, Kuo-Hua Lai, Cheng-Ling Huang
  • Patent number: 11189622
    Abstract: The present disclosure provides a semiconductor device with a graphene layer and a method for forming the same. The semiconductor device includes a first source/drain region and a second source/drain region disposed in a semiconductor substrate. The semiconductor device also includes a word line structure disposed in the semiconductor substrate and between the first source/drain region and the second source/drain region. The word line structure includes a gate dielectric layer, and a lower electrode layer disposed over the gate dielectric layer. The word line structure also includes an upper electrode layer disposed over the lower electrode layer, and a first graphene layer disposed between the lower electrode layer and the upper electrode layer.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: November 30, 2021
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Cheng-Ling Yang
  • Publication number: 20210327887
    Abstract: The present application discloses a semiconductor device with a programmable unit and a method for fabricating the semiconductor device. The semiconductor device includes a substrate comprising a first region and a second region; a first semiconductor element positioned in the first region of the substrate; a second semiconductor element positioned in the first region of the substrate and electrically coupled to the first semiconductor element; and a programmable unit positioned in the second region and electrically connected to the first semiconductor element.
    Type: Application
    Filed: June 28, 2021
    Publication date: October 21, 2021
    Inventor: CHENG-LING YANG
  • Patent number: 11114448
    Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate having a first region and a second region, a first semiconductor element positioned in the first region of the substrate, a second semiconductor element positioned in the first region of the substrate, a bridge conductive unit electrically connected the first semiconductor element and the second semiconductor element, and a programmable unit positioned in the second region and electrically connected to the bridge conductive unit.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: September 7, 2021
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Cheng-Ling Yang