Abstract: A device includes a semiconductor fin, an isolation layer, a dielectric fin structure, and a gate structure. The semiconductor fin is over a substrate. The isolation layer is over the substrate and adjacent the semiconductor fin. The dielectric fin structure is over the isolation layer and includes a bottom dielectric fin and a top dielectric fin. The isolation layer surrounds a bottom of the bottom dielectric fin. The top dielectric fin is over the bottom dielectric fin and is spaced apart from the isolation layer. The gate structure is across the semiconductor fin and the dielectric fin structure, wherein a portion of the gate structure in contact with the isolation layer has a first width, and another portion of the gate structure in contact with the top dielectric fin has a second width greater than the first width.

Abstract: Methods for manufacturing glass articles having a target effective coefficient of thermal expansion CTETeff averaged over a temperature range comprise selecting a glass core composition having an average core glass coefficient of thermal expansion CTEcore that is greater than the target effective CTETeff and a glass clad composition having an average clad glass coefficient of thermal expansion CTEclad that is less than the target effective CTETeff; and manufacturing a glass laminate comprising a glass core layer formed from the glass core composition and two or more glass cladding layers fused to the glass core layer, each of the two or more glass cladding layers formed from the glass clad composition such that a ratio of a thickness of the glass core layer to a total thickness of the two or more glass cladding layers is selected to produce the glass laminate having an effective coefficient of thermal expansion CTEeff that is within ±0.5 ppm/° C. of the target effective CTETeff.

Abstract: Disclosed are compounds of formulae I and II, and pharmaceutically acceptable salts and prodrugs thereof, which are inhibitors of the complement system. Also provided are pharmaceutical compositions comprising such a compound, and methods of using the compounds and compositions in the treatment or prevention of a disease or condition characterized by aberrant complement system activity.

Abstract: In one aspect, a playback device is configured to: (i) after receiving an indication that the presence of one or more first wireless networks is detected, transition from a second power state to a first power state; (ii) update, while in the first power state, a state variable from a first value indicating that a connection via at least one of one or more second wireless networks should be established to a second value indicating that a connection via at least one of the one or more first wireless networks should be established; and (iii) after updating the state variable, enter the second power state.

Abstract: A method of forming a semiconductor device includes: forming a dummy gate structure over a nanostructure, where the nanostructure overlies a fin that protrudes above a substrate, where the nanostructure comprises alternating layers of a first semiconductor material and a second semiconductor material; forming openings in the nanostructure on opposing sides of the dummy gate structure, the openings exposing end portions of the first semiconductor material and end portions of the second semiconductor material; recessing the exposed end portions of the first semiconductor material to form first sidewall recesses; filling the first sidewall recesses with a multi-layer spacer film; removing at least one sublayer of the multi-layer spacer film to form second sidewall recesses; and forming source/drain regions in the openings after removing at least one sublayer, where the source/drain regions seal the second sidewall recesses to form sealed air gaps.

Abstract: An embodiment includes a method including forming an opening in a cut metal gate region of a metal gate structure of a semiconductor device, conformally depositing a first dielectric layer in the opening, conformally depositing a silicon layer over the first dielectric layer, performing an oxidation process on the silicon layer to form a first silicon oxide layer, filling the opening with a second silicon oxide layer, performing a chemical mechanical polishing on the second silicon oxide layer and the first dielectric layer to form a cut metal gate plug, the chemical mechanical polishing exposing the metal gate structure of the semiconductor device, and forming a first contact to a first portion of the metal gate structure and a second contact to a second portion of the metal gate structure, the first portion and the second portion of the metal gate structure being separated by the cut metal gate plug.

Abstract: A method includes patterning a trench and depositing a first insulating material along sidewalls and a bottom surface of the trench using a conformal deposition process. Depositing the first insulating material includes forming a first seam between a first portion of the first insulating material on a first sidewall of the trench and a second portion of the first insulating material on a second sidewall of the trench. The method further includes etching the first insulating material below a top of the trench and depositing a second insulating material over the first insulating material and in the trench using a conformal deposition process. Depositing the second insulating material comprises forming a second seam between a first portion of the second insulating material on the first sidewall of the trench and a second portion of the second insulating material on a second sidewall of the trench.

Abstract: A method for performing frame rate adaptation in a simultaneous localization and mapping (SLAM) device is provided. The SLAM device includes a SLAM processor. The method includes: acquiring data from the SLAM device; determining, based on the acquired data, an operative condition of the SLAM device; deciding, based on the determined operative condition, a target frame rate for the SLAM device; and controlling, based on the decided target frame rate, a frame rate of an image sequence inputted into the SLAM processor.

Abstract: Disclosed are compounds of formula I, II, III, and IV, and pharmaceutically acceptable salts thereof. The compounds are inhibitors of ALK2 kinase. Also provided are pharmaceutical compositions comprising a compound of formula I, II, III, or IV, or pharmaceutically acceptable salt thereof, and methods involving use of the compounds or pharmaceutically acceptable salts thereof and compositions in the treatment and prevention of various diseases and conditions, such as fibrodysplasia ossificans progressiva.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a first substrate, a first circuit layer, a memory array structure, a bonding layer, a second circuit layer, and a second substrate. The first circuit layer is disposed on the first substrate. The memory array structure is disposed on the first circuit layer. The bonding layer is disposed on the memory array structure. The second circuit layer is disposed on the bonding layer. The second substrate is disposed on the second circuit layer.

Abstract: Disclosed are compounds of formula I, II, III, and IV, and pharmaceutically acceptable salts thereof. The compounds are inhibitors of ALK2 kinase. Also provided are pharmaceutical compositions comprising a compound of formula I, II, III, or IV, or pharmaceutically acceptable salt thereof, and methods involving use of the compounds or pharmaceutically acceptable salts thereof and compositions in the treatment and prevention of various diseases and conditions, such as fibrodysplasia ossificans progressiva.

Abstract: A semiconductor package includes a plurality of semiconductor chips. The semiconductor package includes a redistribution structure. The redistribution structure can be configured to electrically couple the plurality of semiconductor chips to each other, and further configured to transmit a single global clock signal. Data transferred across the plurality of semiconductor chips can be synchronized in a clock domain to which the single global clock signal belongs.

Abstract: Disclosed herein are playback devices, groups of playback devices, and methods of operating playback devices and groupings thereof to cause the playback devices in a mixed-mode configuration to play audio content in synchrony with each other.

Abstract: Fabrication of semiconductor devices is provided. A chamber is evacuated to a pressure of less than about 1 Torr. The chamber is heated to a temperature in excess of about 400° C. A precursor is introduced into the chamber. The precursor is decomposed with a first plasma. A first layer is deposited on a surface of the semiconductor device based on the decomposed precursor. The precursor is densified to form a first gate spacer. The precursor is introduced into the chamber subsequent to forming the first layer. The precursor is decomposed with a second plasma. A second layer is deposited on the surface of the semiconductor device based on the decomposed precursor. The deposited precursor is densified to form a second gate spacer.

Abstract: A method includes forming a first and a second dummy gate stack crossing over a semiconductor region, forming an ILD to embed the first and the second dummy gate stacks therein, replacing the first and the second dummy gate stacks with a first and a second replacement gate stack, respectively, performing a first etching process to form a first opening. A portion of the first replacement gate stack and a portion of the second replacement gate stack are removed. The method further includes filling the first opening to form a dielectric isolation region, performing a second etching process to form a second opening, with the ILD being etched, and the dielectric isolation region being exposed to the second opening, forming a contact spacer in the second opening, and filling a contact plug in the second opening. The contact plug is between opposite portions of the contact spacer.

Abstract: Disclosed are compounds of formulae I and II, and pharmaceutically acceptable salts and prodrugs thereof, which are inhibitors of the complement system. Also provided are pharmaceutical compositions comprising such a compound, and methods of using the compounds and compositions in the treatment or prevention of a disease or condition characterized by aberrant complement system activity.

Abstract: Disclosed are compounds of formulae (I)-(IV), and pharmaceutically acceptable salts thereof, which are inhibitors of kallikrein-related peptidase 5 (KLK5). Also provided are pharmaceutical compositions comprising such a compound, and methods of using the compounds and compositions in the treatment or prevention of a disease or condition characterized by aberrant KLK5 activity, such as Netherton Syndrome.

Abstract: The present disclosure relates to an optical digital-to-analog converter (DAC). The optical DAC includes a first waveguide path configured to receive a first optical signal and a second waveguide path configured to receive a second optical signal. A first phase shifter segment interfaces with the first and second waveguide paths. The first phase shifter segment is configured to selectively generate a first phase shift between the first optical signal and the second optical signal in response to a first digital input. A second phase shifter segment interfaces with the first and second waveguide paths. The second phase shifter segment is configured to selectively generate a second phase shift between the first optical signal and the second optical signal in response to a second digital input. The first digital input and the second digital input correspond to different bits of a digital signal.

Abstract: Methods and compositions relating to the engineering of an improved protein with homocyst(e)inase enzyme activity are described. For example, there are disclosed modified cystathionine-?-lyase (CGL) enzymes comprising one or more amino acid substitutions and capable of degrading homocyst(e)ine. Furthermore, provided are compositions and methods for the treatment of homocystinuria or hyperhomocysteinemia with homocyst(e)ine depletion using the disclosed enzymes or nucleic acids.

Abstract: A power conversion system includes N power converters. Each power converter includes an input terminal, a first output terminal and a second output terminal. Each of the N power converters receives a DC power through the input terminal. The first output terminal of a first power converter and the second output terminal of an N-th power converter are connected in parallel to form an N-th total output terminal. The first output terminal of an i-th power converter and the second output terminal of an (i?1)-th power converter are connected in parallel to form an (i?1)-th total output terminal. The two input terminals of the load are connected with two total output terminals of N total output terminals. A (2k?1)-th power converter is connected with a first power source. A 2k-th power converter is connected with a second power source. The redundancy of the power conversion system can be achieved.