Abstract: A method includes forming a dummy gate stack over a semiconductor region, forming gate spacers on opposing sides of the dummy gate stack, forming a source/drain region on a side of the dummy gate stack, forming an inter-layer dielectric over the source/drain region, replacing the dummy gate stack with a replacement gate stack, recessing the replacement gate stack to form a recess between the gate spacers, depositing a liner extending into the recess, depositing a masking layer over the liner and extending into the recess, forming an etching mask covering a portion of the masking layer, and etching the inter-layer dielectric to form a source/drain contact opening. The source/drain region is underlying and exposed to the source/drain contact opening. A source/drain contact plug is formed in the source/drain contact opening. A gate contact plug extends between the gate spacers and electrically connecting to the replacement gate stack.

Abstract: A method for manufacturing an extra low-k (ELK) inter-metal dielectric (IMD) layer includes forming a first IMD layer including a plurality of dielectric material layers over a substrate. An adhesion layer is formed over the first IMD layer. An ELK dielectric layer is formed over the adhesion layer. A protection layer is formed over the ELK dielectric layer. A hard mask is formed over the protection layer and is patterned to create a window. Layers underneath the window are removed to create an opening. The removed layers include the protection layer, the ELK dielectric layer, the adhesion layer, and the first IMD layer. A metal layer is formed in the opening.

Abstract: A representative method includes forming a photo-sensitive material over a substrate, and forming a cap layer over the photo-sensitive material, and patterning the cap layer. Using the patterned cap layer, a first portion of the photo-sensitive material is selectively exposed to a pre-selected light wavelength to change at least one material property of the first portion of the photo-sensitive material, while preventing a second portion of the photo-sensitive material from being exposed to the pre-selected light wavelength. One, but not both of the following steps is then conducted: removing the first portion of the photo-sensitive material and forming in its place a conductive element at least partially surrounded by the second portion of the photo-sensitive material, or removing the second portion of the photo-sensitive material and forming from the first portion of the photo-sensitive material a conductive element electrically connecting two or more portions of a circuit.

Abstract: A method for forming a semiconductor device includes receiving a substrate having a first opening and a second opening formed thereon, wherein the first opening has a first width, and the second opening has a second width less than the first width; forming a protecting layer to cover the first opening and expose the second opening; performing a wet etching to widen the second opening with an etchant, wherein the second opening has a third width after the performing of the wet etching, and the third width of the second opening is substantially equal to the first width of the first opening; and performing a photolithography to transfer the first opening and the second opening to a target layer.

Abstract: A light-emitting unit includes a substrate, a light-emitting element, and a micro lens. The light-emitting element is disposed on the substrate. The micro lens surrounds the light-emitting element. The micro lens includes compound eye structures adjacent to each other. In a top view, each compound eye structure has a length and a width, and the light-emitting element has a length and a width. The length and width of each compound eye structure in the top view and the length and width of the light-emitting element in the top view substantially satisfy 1?(L1/W1)/(L2/W2)?1.5, in which W1 is the width of the light-emitting element in the top view, L1 is the length of the light-emitting element in the top view, W2 is the width of each compound eye structure in the top view, and L2 is the length of each compound eye structure in the top view.

Abstract: A method for manufacturing an extra low-k (ELK) inter-metal dielectric (IMD) layer includes forming a first IMD layer including a plurality of dielectric material layers over a substrate. An adhesion layer is formed over the first IMD layer. An ELK dielectric layer is formed over the adhesion layer. A protection layer is formed over the ELK dielectric layer. A hard mask is formed over the protection layer and is patterned to create a window. Layers underneath the window are removed to create an opening. The removed layers include the protection layer, the ELK dielectric layer, the adhesion layer, and the first IMD layer. A metal layer is formed in the opening.

Abstract: A representative method includes forming a photo-sensitive material over a substrate, and forming a cap layer over the photo-sensitive material, and patterning the cap layer. Using the patterned cap layer, a first portion of the photo-sensitive material is selectively exposed to a pre-selected light wavelength to change at least one material property of the first portion of the photo-sensitive material, while preventing a second portion of the photo-sensitive material from being exposed to the pre-selected light wavelength. One, but not both of the following steps is then conducted: removing the first portion of the photo-sensitive material and forming in its place a conductive element at least partially surrounded by the second portion of the photo-sensitive material, or removing the second portion of the photo-sensitive material and forming from the first portion of the photo-sensitive material a conductive element electrically connecting two or more portions of a circuit.

Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes a first image sensing element and a second image sensing element arranged over a substrate. A first micro-lens is arranged over the first image sensing element, and a second micro-lens is arranged over the second image sensing element. A composite deep trench isolation structure is arranged between the first and second image sensing elements. The composite deep trench isolation structure includes a lower portion arranged over the substrate and an upper portion arranged over the lower portion. The lower portion includes a first material, and the upper portion includes a second material that has a higher reflectivity than the first material.

Abstract: A key structure including a base plate, a keycap, a lifting platform, an elastic body, and a reciprocating supporting member is provided. The keycap is disposed above the base plate. The lifting platform is disposed between the base plate and the keycap, and includes a first end part and a second end part opposite to the first end part. The first end part is slidably connected with the keycap, and the second end part is rotatably connected with the keycap. The elastic body is disposed between the base plate and the lifting platform, and two opposite ends of the elastic body contact the base plate and the lifting platform respectively. The reciprocating supporting member is disposed between the base plate and the lifting platform.

Abstract: A method includes etching a gate stack in a wafer to form a trench, depositing a silicon nitride liner extending into the trench, and depositing a silicon oxide layer. The process of depositing the silicon oxide layer includes performing a treatment process on the wafer using a process gas including nitrogen and hydrogen, and performing a soaking process on the wafer using a silicon precursor.

Abstract: A light-emitting device, including a first type semiconductor layer, a patterned insulating layer, a light-emitting layer, and a second type semiconductor layer, is provided. The patterned insulating layer covers the first type semiconductor layer and has a plurality of insulating openings. The insulating openings are separated from each other. The light-emitting layer is located in the plurality of insulating openings and covers a portion of the first type semiconductor layer. The second type semiconductor layer is located on the light-emitting layer.

Abstract: Trenches in which to form a back side isolation structure for an array of CMOS image sensors are formed by a cyclic process that allows the trenches to be kept narrow. Each cycle of the process includes etching to add a depth segment to the trenches and coating the depth segment with an etch-resistant coating. The following etch step will break through the etch-resistant coating at the bottom of the trench but the etch-resistant coating will remain in the upper part of the trench to limit lateral etching and substrate damage. The resulting trenches have a series of vertically spaced nodes. The process may result in a 10% increase in photodiode area and a 30-40% increase in full well capacity.

Abstract: Some implementations described herein include systems and techniques for fabricating a wafer-on-wafer product using a filled lateral gap between beveled regions of wafers included in a stacked-wafer assembly and along a perimeter region of the stacked-wafer assembly. The systems and techniques include a deposition tool having an electrode with a protrusion that enhances an electromagnetic field along the perimeter region of the stacked-wafer assembly during a deposition operation performed by the deposition tool. Relative to an electromagnetic field generated by a deposition tool not including the electrode with the protrusion, the enhanced electromagnetic field improves the deposition operation so that a supporting fill material may be sufficiently deposited.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first diffusion barrier layer made of a dielectric material including a metal element, nitrogen, and oxygen and a first protection layer made of a dielectric material including silicon and oxygen and in direct contact with the top surface of the first diffusion barrier layer. The semiconductor device structure also includes a first thickening layer made of a dielectric material including the metal element and oxygen and in direct contact with the top surface of the first protection layer. A maximum metal content in the first thickening layer is greater than that in the first diffusion barrier layer. The semiconductor device structure further includes a conductive feature surrounded by and in direct contact with the first diffusion barrier layer, the first protection layer, and the first thickening layer.

Abstract: A display may include pixels arranged in rows and columns in an active area and display driver circuitry in an inactive area. Data lines for the pixels may be positioned in the active area. Fanout lines may be routed through the active area. Each fanout line may electrically connect the display driver circuitry to a respective data line. One or more pixels may include a drive transistor and a light-emitting diode that are connected in series between a first power supply terminal and a second power supply terminal. A conductive layer may form a first terminal (such as the source terminal, the gate terminal, or the drain terminal) for the drive transistor. A conductive shielding layer may be interposed between the conductive layer and a fanout line to mitigate capacitive coupling between the terminal of the drive transistor and the fanout line.

Abstract: A near-eye display device, including a substrate, a light-emitting element, an active element, an optical layer, and a light guide structure, is provided. The light-emitting element is located on the substrate and includes a first type semiconductor pattern. The active element is located adjacent to the light-emitting element. A channel layer of the active element and the first type semiconductor pattern of the light-emitting element belong to the same layer. The optical layer covers the light-emitting element and the active element. The light guide structure is located on the optical layer and includes an in-coupling portion and an out-coupling portion, wherein an orthogonal projection of the in-coupling portion on the substrate is overlapped with an orthogonal projection of the light-emitting element on the substrate. A manufacturing method of the near-eye display device is also provided.

Abstract: A foldable electronic device includes a first casing, a second casing, a hinge structure and a foldable display. The hinge structure connects the first casing and the second casing, and includes a plurality of supporting blocks, a plurality of first hinge blocks and a plurality of second hinge blocks. The supporting blocks are arranged side by side between the first casing and the second casing. The first hinge blocks and the second hinge blocks are respectively arranged at two sides of the supporting blocks. One of the first hinge blocks connects two of the supporting blocks adjacent to each other. One of the second hinge blocks connects two of the supporting blocks adjacent to each other. The foldable display includes a first bonding portion secured to the first casing, a second bonding portion secured to the second casing and a foldable portion aligned to the hinge structure.

Abstract: A display device includes a first image generating unit and a first waveguide glass. The first image generating unit is configured to emit first light. The first waveguide glass faces toward the first image generating unit. The first waveguide glass includes a first microstructure, two second microstructures and a third microstructure. The first microstructure is located between two ends at the same side of the two second microstructures. The third microstructure is located between the two second microstructures. The third microstructure has a first grating and a second grating. An extending direction of the first grating is different from an extending direction of the second grating. The second microstructure is configured to receive the first light of the first image generating unit transmitted through the first microstructure and transmit the first light to the third microstructure.

Abstract: A head-up display includes an image generating unit and a waveguide glass. The waveguide glass faces toward the image generating unit. The waveguide glass includes a first microstructure, a second microstructure and a third microstructure. The first microstructure has a first width. The second microstructure is adjacent to the first microstructure. The third microstructure is adjacent to the second microstructure. The third microstructure has tiling areas adjacent to each other. A gap between the two adjacent tiling areas is less than half of the first width.

Abstract: A rotating mechanism includes a first mount having a shaft hole, a second mount having a mounting part and a shaft part, a first engagement component, and a positioning assembly having a first positioning structure and a second positioning structure. The shaft part passes through the shaft hole so that the second mount is rotatable relative to the first mount. The first engagement component is fixed to the second mount and located on one side of the first mount away from the mounting part of the second mount, so that the first engagement component rotates relative to the first mount along with the second mount. The first positioning structure disposed on the first mount and the second positioning structure disposed on the first engagement component are matching recess and protrusion that are engaged with each other so as to position the first mount and the second mount.