Patents by Inventor Cheng-Ta Ko

Cheng-Ta Ko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10802637
    Abstract: A touch-sensing display panel includes a substrate, a first circuit layer, a LED chip, a second circuit layer, a blocking wall, a second wire, and a third wire. The first circuit layer is on the substrate, including at least one first electrode, and a first wire. The LED chip is on and electrically connected to the first electrode. The second circuit layer is on the first circuit layer, including a second electrode, a touch sensing line, and a touch driving line. The blocking wall, the second wire, and the third wire are on the second circuit layer. The second wire extends to an inner sidewall and a top surface of the blocking wall, and electrically connects to the touch sensing line. The third wire extends to an outer sidewall of the blocking wall, and electrically connects to the touch driving line.
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: October 13, 2020
    Assignee: UNIMICRON TECHNOLOGY CORP.
    Inventors: Tse-Wei Wang, Cheng-Ta Ko
  • Patent number: 10756050
    Abstract: A package structure includes a first substrate, a second substrate, a plurality of conductive pillars and an adhesive layer. The first substrate includes a plurality of vias and a plurality of pads. The pads are disposed on the first substrate, and fill the vias. The second substrate is disposed opposite to the first substrate. Each conductive pillar electrically connects each pad and the second substrate, and the adhesive layer fills the gaps between the conductive pillars. A bonding method of the package structure is also provided.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: August 25, 2020
    Assignee: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Cheng-Ta Ko, Kai-Ming Yang, Yu-Hua Chen
  • Publication number: 20200266155
    Abstract: A package structure includes a redistribution structure, a chip, one or more structural reinforcing elements, and a protective layer. The redistribution structure includes a first circuit layer and a second circuit layer disposed over the first circuit layer. The first circuit layer is electrically connected to the second circuit layer. The chip is disposed over the redistribution structure and electrically connected to the second circuit layer. The one or more structural reinforcing elements are disposed over the redistribution structure. The structural reinforcing element has a Young's modulus in a range of 30 to 200 GPa. The protective layer overlays the chip and a sidewall of the structural reinforcing element.
    Type: Application
    Filed: May 4, 2020
    Publication date: August 20, 2020
    Inventors: Pu-Ju LIN, Cheng-Ta KO, Yu-Hua CHEN, Tzyy-Jang TSENG, Ra-Min TAIN
  • Publication number: 20200235272
    Abstract: A manufacturing method of a light emitting device package structure is provided. The method includes following operations: (i) providing a circuit redistribution structure; (ii) providing a first substrate; (iii) forming a circuit layer structure over the first substrate, wherein the circuit layer structure includes a first circuit layer; (iv) before or after operation (iii), placing a light emitting device between the first substrate and the circuit layer structure or over the circuit layer structure, wherein the light emitting device is electrically connected with the first circuit layer; and (v) placing the circuit redistribution structure over the light emitting device, wherein the circuit redistribution structure includes a first redistribution layer, a second redistribution layer, and a chip, and the first redistribution layer includes a second circuit layer and a conductive contact that contacts the second circuit layer.
    Type: Application
    Filed: April 7, 2020
    Publication date: July 23, 2020
    Inventors: Pei-Wei WANG, Cheng-Ta KO, Yu-Hua CHEN, De-Shiang LIU, Tzyy-Jang TSENG
  • Patent number: 10685922
    Abstract: A package structure includes a redistribution structure, a chip, one or more structural reinforcing elements, and a protective layer. The redistribution structure includes a first circuit layer and a second circuit layer disposed over the first circuit layer. The first circuit layer is electrically connected to the second circuit layer. The chip is disposed over the redistribution structure and electrically connected to the second circuit layer. The one or more structural reinforcing elements are disposed over the redistribution structure. The structural reinforcing element has a Young's modulus in a range of of 30 to 200 GPa. The protective layer overlays the chip and a sidewall of the structural reinforcing element.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: June 16, 2020
    Assignee: UNIMICRON TECHNOLOGY CORP.
    Inventors: Pu-Ju Lin, Cheng-Ta Ko, Yu-Hua Chen, Tzyy-Jang Tseng, Ra-Min Tain
  • Publication number: 20200176369
    Abstract: A package structure includes a redistribution structure, a chip, an inner conductive reinforcing element, and a protective layer. The redistribution structure includes a first circuit layer and a second circuit layer disposed over the first circuit layer. The first circuit layer is electrically connected to the second circuit layer. The chip is disposed over the redistribution structure and electrically connected to the second circuit layer. The inner conductive reinforcing element is disposed over the redistribution structure. The inner conductive reinforcing element has a Young's modulus in a range of from 30 to 200 GPa. The protective layer covers the chip and a sidewall of an opening of the inner conductive reinforcing element.
    Type: Application
    Filed: February 9, 2020
    Publication date: June 4, 2020
    Inventors: Chun-Min WANG, Pu-Ju LIN, Cheng-Ta KO
  • Patent number: 10658282
    Abstract: A package substrate structure includes a first substrate, a second substrate, a plurality of conductive pillars and an adhesive layer. The first substrate includes a plurality of vias and a plurality of pads. The vias and the pads are disposed on the first substrate, and fills the vias. The second substrate is disposed opposite to the first substrate. Each conductive pillar is disposed between the first substrate and the second substrate, where each conductive pillar electrically connects each pad and the second substrate, and the adhesive layer fills the gaps between the conductive pillars. A bonding method of the package substrate structure is also provided.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: May 19, 2020
    Assignee: Unimicron Technology Corp.
    Inventors: Cheng-Ta Ko, Kai-Ming Yang, Yu-Hua Chen, Tzyy-Jang Tseng
  • Patent number: 10651358
    Abstract: A light emitting device package structure includes a substrate, a circuit layer structure, a light emitting device, a first redistribution layer, a conductive connector, a second redistribution layer, and a chip. The circuit layer structure is disposed over the substrate, and the circuit layer structure includes a first circuit layer. The light emitting device is disposed over the circuit layer structure and is electrically connected with the first circuit layer. The first redistribution layer is disposed over the light emitting device and includes a second circuit layer and a conductive contact contacting the second circuit layer. The conductive connector connects the first circuit layer and the second circuit layer. The second redistribution layer is disposed over the first redistribution layer and includes a third circuit layer contacting the conductive contact. The chip is disposed over the second redistribution layer and is electrically connected with the third circuit layer.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: May 12, 2020
    Assignee: UNIMICRON TECHNOLOGY CORP.
    Inventors: Pei-Wei Wang, Cheng-Ta Ko, Yu-Hua Chen, De-Shiang Liu, Tzyy-Jang Tseng
  • Publication number: 20200118989
    Abstract: A light emitting device package structure includes: a substrate structure including a substrate and a first circuit layer, the substrate having a first surface, the first circuit layer over the first surface; a chip over the substrate structure and electrically connected to the first circuit layer; a conductive connector over the substrate structure and electrically connected to the first circuit layer; a redistribution structure over the conductive connector, the redistribution structure including a first redistribution layer and a second redistribution layer over the first redistribution layer, the first redistribution layer including a second circuit layer electrically connected to the first circuit layer and a conductive contact in contact with the second circuit layer, the second redistribution layer including a third circuit layer in contact with the conductive contact; and a light emitting device over the redistribution structure and electrically connected to the third circuit layer.
    Type: Application
    Filed: November 30, 2018
    Publication date: April 16, 2020
    Inventors: Pei-Wei WANG, Cheng-Ta KO, De-Shiang LIU, Yu-Hua CHEN
  • Patent number: 10588214
    Abstract: A stacked structure includes a circuit board, an electronic component, metallic cores, and insulating cladding layers. The circuit board includes first bonding pads. The electronic component includes second bonding pads that are opposite to the first bonding pads. Each metallic core is connected to a corresponding first bonding pad and a corresponding second bonding pad. The metallic cores have a curved surface interposed between the corresponding first bonding pad and the corresponding second bonding pad. The insulating cladding layers are separated from each other and cover the curved surfaces of the metallic cores.
    Type: Grant
    Filed: August 18, 2019
    Date of Patent: March 10, 2020
    Assignee: UNIMICRON TECHNOLOGY CORP.
    Inventors: Tzyy-Jang Tseng, Kai-Ming Yang, Pu-Ju Lin, Cheng-Ta Ko, Yu-Hua Chen
  • Publication number: 20200068721
    Abstract: A package structure, includes a metal layer, an insulating composite layer disposed thereon, a sealant bonded on the insulating composite layer, a chip embedded in the sealant, a circuit layer structure disposed on the sealant and the chip, and a protecting layer. The chip has a plurality of electrode pads exposed from the sealant. The circuit layer structure includes at least one dielectric layer and at least one circuit layer. The dielectric layer has a plurality of conductive blind vias. The dielectric layer and the sealant are made of the same material. The circuit layer is disposed on the dielectric layer and extends into the conductive blind vias, and the bottommost circuit layer is electrically connected to the electrode pads through the conductive blind vias. The protecting layer is formed on the circuit layer structure and has a plurality of openings exposing a portion of the circuit layer structure.
    Type: Application
    Filed: November 3, 2019
    Publication date: February 27, 2020
    Inventors: Kai-Ming YANG, Chen-Hao LIN, Wang-Hsiang TSAI, Cheng-Ta KO
  • Publication number: 20200043839
    Abstract: A package substrate structure includes a first substrate, a second substrate, a plurality of conductive pillars and an adhesive layer. The first substrate includes a plurality of vias and a plurality of pads. The vias and the pads are disposed on the first substrate, and fills in the vias. The second substrate is disposed opposite to the first substrate. Each conductive pillar is disposed between the first substrate and the second substrate, where each conductive pillar electrically connects each pad and the second substrate, and the adhesive layer fills in the gaps between the conductive pillars. A bonding method of the package substrate structure is also provided.
    Type: Application
    Filed: October 23, 2018
    Publication date: February 6, 2020
    Applicant: Unimicron Technology Corp.
    Inventors: Cheng-Ta Ko, Kai-Ming Yang, Yu-Hua Chen, Tzyy-Jang Tseng
  • Publication number: 20200043890
    Abstract: A package structure includes a first substrate, a second substrate, a plurality of conductive pillars and an adhesive layer. The first substrate includes a plurality of vias and a plurality of pads. The pads are disposed on the first substrate, and fill in the vias. The second substrate is disposed opposite to the first substrate. Each conductive pillar electrically connects each pad and the second substrate, and the adhesive layer fills in the gaps between the conductive pillars. A bonding method of the package structure is also provided.
    Type: Application
    Filed: October 5, 2018
    Publication date: February 6, 2020
    Applicant: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Cheng-Ta Ko, Kai-Ming Yang, Yu-Hua Chen
  • Publication number: 20200006610
    Abstract: A light emitting device package structure includes a substrate, a circuit layer structure, a light emitting device, a first redistribution layer, a conductive connector, a second redistribution layer, and a chip. The circuit layer structure is disposed over the substrate, and the circuit layer structure includes a first circuit layer. The light emitting device is disposed over the circuit layer structure and is electrically connected with the first circuit layer. The first redistribution layer is disposed over the light emitting device and includes a second circuit layer and a conductive contact contacting the second circuit layer. The conductive connector connects the first circuit layer and the second circuit layer. The second redistribution layer is disposed over the first redistribution layer and includes a third circuit layer contacting the conductive contact. The chip is disposed over the second redistribution layer and is electrically connected with the third circuit layer.
    Type: Application
    Filed: September 25, 2018
    Publication date: January 2, 2020
    Inventors: Pei-Wei WANG, Cheng-Ta KO, Yu-Hua CHEN, De-Shiang LIU, Tzyy-Jang TSENG
  • Publication number: 20190373713
    Abstract: A stacked structure includes a circuit board, an electronic component, metallic cores, and insulating cladding layers. The circuit board includes first bonding pads. The electronic component includes second bonding pads that are opposite to the first bonding pads. Each metallic core is connected to a corresponding first bonding pad and a corresponding second bonding pad. The metallic cores have a curved surface interposed between the corresponding first bonding pad and the corresponding second bonding pad. The insulating cladding layers are separated from each other and cover the curved surfaces of the metallic cores.
    Type: Application
    Filed: August 18, 2019
    Publication date: December 5, 2019
    Inventors: Tzyy-Jang TSENG, Kai-Ming YANG, Pu-Ju LIN, Cheng-Ta KO, Yu-Hua CHEN
  • Patent number: 10458893
    Abstract: A miniaturized particulate matter detector that includes a filter and a concentration detector is provided. The filter has a plurality of holes, and the concentration detector is correspondingly disposed under the filter. The concentration detector has a detected area used to detect a concentration of at least one miniaturized particulate matter. A manufacturing method of the filter is also provided.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: October 29, 2019
    Assignee: Industrial Technology Research Institute
    Inventors: Chia-Wen Chiang, Cheng-Ta Ko, I-Hsing Lin, Hsiang-Hung Chang, Wen-Chih Chen
  • Publication number: 20190306987
    Abstract: A circuit board including an interconnect substrate and a multilayer structure is provided. The interconnect substrate includes a core layer and a conductive structure disposed on the core layer. The multilayer structure is disposed on the conductive structure. The multilayer structure includes a plurality of dielectric layers and a plurality of circuit structures. The circuit structures are disposed in the dielectric layers. A topmost layer in the circuit structures is exposed to the dielectric layers to be in contact with the conductive structure. A pattern of the topmost layer in the circuit structures and a pattern of a top surface of the conductive structure are engaged with each other.
    Type: Application
    Filed: March 21, 2019
    Publication date: October 3, 2019
    Applicant: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Cheng-Ta Ko, Kai-Ming Yang, Chih-Lun Wang
  • Publication number: 20190250502
    Abstract: A mask structure and a manufacturing method of the mask structure are provided. The mask structure includes a transparent substrate, a patterned metal layer, and a plurality of microlens structures. The patterned metal layer is disposed on the transparent substrate and exposing a portion of the transparent substrate. The microlens structures are disposed on the transparent substrate exposed by a portion of the patterned metal layer and being in contact with the portion of the patterned metal layer.
    Type: Application
    Filed: April 26, 2019
    Publication date: August 15, 2019
    Applicant: Unimicron Technology Corp.
    Inventors: Pu-Ju Lin, Shih-Lian Cheng, Yu-Hua Chen, Cheng-Ta Ko, Jui-Jung Chien, Wei-Tse Ho
  • Publication number: 20190239362
    Abstract: A package structure is disclosed herein. The package structure includes an insulating composite layer, a sealant disposed on the insulating composite layer, a first chip embedded in the sealant and having a plurality of first conductive pads exposed through the sealant, a circuit layer module having a plurality of circuit layers and a plurality of dielectric layers having a plurality of conductive vias, a second chip embedded in the circuit layer module and has a plurality of second conductive pads electrically connected to the circuit layers through the conductive vias, and a protecting layer having a plurality of openings disposed on the circuit layer module, in which the openings expose a portion of the circuit layer module.
    Type: Application
    Filed: April 10, 2019
    Publication date: August 1, 2019
    Inventors: Kai-Ming YANG, Chen-Hao LIN, Cheng-Ta KO, John Hon-Shing LAU, Yu-Hua CHEN, Tzyy-Jang TSENG
  • Patent number: 10324370
    Abstract: A manufacturing method of a circuit substrate is provided. A substrate is provided. A positive photoresist layer is coated on the substrate. Once exposure process is performed on the positive photoresist layer disposed on the substrate so as to simultaneously form concaves with at least two different depths.
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: June 18, 2019
    Assignee: Unimicron Technology Corp.
    Inventors: Pu-Ju Lin, Shih-Lian Cheng, Yu-Hua Chen, Cheng-Ta Ko, Jui-Jung Chien, Wei-Tse Ho