Patents by Inventor Cheng Tao

Cheng Tao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11959137
    Abstract: Disclosed herein, inter alia, are compounds, compositions, and methods of use thereof in the sequencing of a nucleic acid.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: April 16, 2024
    Assignee: THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK
    Inventors: Jingyue Ju, Xiaoxu Li, Xin Chen, Zengmin Li, Shiv Kumar, Shundi Shi, Cheng Guo, Jianyi Ren, Min-Kang Hsieh, Minchen Chien, Chuanjuan Tao, Ece Erturk, Sergey Kalachikov, James J. Russo
  • Publication number: 20240103577
    Abstract: In one example, an electronic device may include a main body, and a back cover having an opening. The back cover may include an inner surface, and a hook protruding from the inner surface. The hook may be engageable with a receiving portion of the main body to slidably couple the back cover to the main body. Further, electronic device may include a component housing connected to the main body through the opening in the back cover to fixedly couple the back cover to the main body.
    Type: Application
    Filed: November 5, 2019
    Publication date: March 28, 2024
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Cheng-Yi Yang, Szu Tao Tong, Hai-Lung Hung
  • Patent number: 11943643
    Abstract: An access point (AP) and a station (STA) communicate with each other, with the AP indicating to the STA either or both of a preamble detection (PD) channel and a signaling (SIG) content channel and with the STA being initially monitoring a primary frequency segment of a plurality of frequency segments in an operating bandwidth of the AP. A downlink (DL) or triggered uplink (UL) communication is performed between the AP and the STA during a transmission opportunity (TXOP) such that: (i) during the TXOP, the STA monitors a preamble on the PD channel and decodes a SIG content on the SIG content channel; and (ii) after an end of the TXOP, the STA switches to the primary frequency segment.
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: March 26, 2024
    Assignee: MediaTek Singapore Pte. Ltd.
    Inventors: Kai Ying Lu, Yongho Seok, Hung-Tao Hsieh, Cheng-Yi Chang, James Chih-Shi Yee, Jianhan Liu, Po-Yuen Cheng
  • Patent number: 11914584
    Abstract: Embodiments of the present disclosure provide a method and apparatus for reset command configuration, a device, and a storage medium, the method, applied to an editor of target software, includes: starting a command group storage unit and starting a snapshot session through the inputted startGroup command; directly performing the reset command configuration on the target software in an command-type manner through the inputted operation execution command; converting change information of an object in the snapshot-type session into a command pair through the snapshot capture command, pressing the command pair into the command group storage unit, and using all command groups of the command pair as a reset command to realize performing the reset command configuration on the target software in the snapshot-type manner, thereby achieving that the target software supports both the command-type reset command configuration and the snapshot-type reset command configuration.
    Type: Grant
    Filed: November 14, 2022
    Date of Patent: February 27, 2024
    Assignee: LEMON INC.
    Inventors: Hai Quang Kim, Cheng Fang, Lu Tao
  • Patent number: 11916130
    Abstract: A lateral bipolar junction transistor including an emitter region, base region and collector region laterally orientated over a type IV semiconductor substrate, each of the emitter region, the base region and the collector region being composed of a type III-V semiconductor material. A buried oxide layer is present between the type IV semiconductor substrate and the emitter region, the base region and the collector region. The buried oxide layer having a pedestal aligned with the base region.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: February 27, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kuen-Ting Shiu, Tak H. Ning, Jeng-Bang Yau, Cheng-Wei Cheng, Ko-Tao Lee
  • Publication number: 20240054766
    Abstract: A method for rock identification includes the steps of receiving a rock slice image transmitted by an image acquisition device, generating a geometric feature, a mineral feature and a structural feature corresponding to a rock slice based on the rock slice image, and generating an identification result of the rock slice based on the geometric feature, the mineral feature and the structural feature. After the rock slice image is obtained, the rock slice image is subject to feature extraction based on three dimensions, i.e., the geometric feature, the mineral feature and the structural feature, the properties of rock are determined based on multiple dimensional features, and finally the identification result comprising a textual description is generated. After a microscopic visual image corresponding to the rock slice is obtained, feature extraction based on multiple dimensions is performed on the image, and the rock slice is identified with reference to multi-dimensional features.
    Type: Application
    Filed: September 29, 2021
    Publication date: February 15, 2024
    Inventors: Xiaolu YU, Yongqiang ZHAO, Chunhua NI, Zhongliang MA, Shengyou ZHOU, Weili YANG, Jun ZHANG, Cheng TAO, Kuang LI, Qiang WANG, Lunju ZHENG
  • Publication number: 20240048130
    Abstract: A low power oscillator circuit with temperature compensation is illustrated. A current supply unit of an oscillator used to output an output current which is proportional to a reference current. As the temperature is increased, both a first threshold and the reference current of a unidirectional conduct in the temperature compensation circuit are decreased. Because a delay time of the oscillating signal is proportional to the first threshold voltage, and the delay time is inversely proportional to the reference current, the effects of the first threshold voltage and the reference current on the delay time are canceled, and the delay time of the oscillating signal is not affected by the temperature.
    Type: Application
    Filed: April 11, 2023
    Publication date: February 8, 2024
    Inventors: CHENG-TAO LI, PING-WEN LAI
  • Publication number: 20240040743
    Abstract: Disclosed are a heat dissipation apparatus and an electronic device. The heat dissipation apparatus may include: a cooling component, comprising at least two cooling plates in which a flow channel for containing a working medium is arranged; and a first tube, through which the cooling plates are connected, allowing the flow channels of the cooling plates to be communicated with each other, at least part of the first tube being an extendable corrugated tube.
    Type: Application
    Filed: September 26, 2021
    Publication date: February 1, 2024
    Applicants: ZTE Corporation, Institute of Spacecraft System Engineering
    Inventors: Cheng Tao, Yalong Wang, Fan Liu, Shuai Li, Xingang Yu
  • Publication number: 20230402998
    Abstract: A comparator module for an oscillator is disclosed. The comparator module has a function provided by two independent comparators that are combined together to share the same bias current source, so that an operation current of the oscillator may be reduced, and the circuit area and power consumption may be effectively reduced. Further, compared to the conventional design that one of the two comparators compares a first voltage with a reference voltage and the other one of the two comparators compares a second voltage with the reference voltage and the time points at which the first voltage and the second voltage are a logic high level are different, three transistors of the disclosed comparator module are designed into two equivalent differential pairs and share a bias current source.
    Type: Application
    Filed: November 2, 2022
    Publication date: December 14, 2023
    Inventors: CHENG-TAO LI, PING-WEN LAI
  • Publication number: 20230403004
    Abstract: In a driving circuit, a drain of first NMOS transistor receives current with a positive temperature coefficient provided by current source, and a gate of first NMOS transistor and a gate of second NMOS transistor are electrically connected to the drain of first NMOS transistor. A drain and a source of second NMOS transistor respectively receive an input voltage and generate an output voltage for driving a load. Two ends of resistor are respectively electrically connected to a source of first NMOS transistor and an emitter of PNP bipolar junction transistor. A base of PNP bipolar junction transistor is electrically connected to a source of second NMOS transistor, and a collector of PNP bipolar junction transistor is electrically connected to a low voltage. By selecting the resistance value of the resistor, an overdrive voltage or a turned-on resistance value of second NMOS transistor is independent of a temperature variation.
    Type: Application
    Filed: April 20, 2023
    Publication date: December 14, 2023
    Inventors: CHENG-TAO LI, WEI-JEAN LIU
  • Publication number: 20230354782
    Abstract: A computer-implemented method for dynamically managing electronic pet care data including hosting a user portal corresponding to at least one user and at least one pet, the user portal including at least one user profile and at least one pet profile, receiving a first data set from a first external system, wherein the first data set includes at least one user identifier and at least one pet identifier, retrieving the at least one user profile and the at least one pet profile based on the at least one user identifier and the at least one pet identifier respectively, updating the at least one pet profile based on the first data set, generating an electronic key based on the at least one user profile and the at least one pet profile, and displaying the electronic key on a user interface of the user portal.
    Type: Application
    Filed: May 3, 2023
    Publication date: November 9, 2023
    Inventors: Santosh HEGDE, Leonid SUDAKOV, Sridevi GOUNI, Sumant MUNJAL, Cheng-Tao CHEN
  • Publication number: 20230344384
    Abstract: An oscillator equipped with a temperature compensation circuit is illustrated. Through the temperature compensation circuit, a transistor of a current mirror circuit of the oscillator which outputs a reference current to a voltage matching circuit is controlled by the temperature compensation voltage. Both of the temperature compensation voltage and a reference current decrease as the temperature rises, and a delay time of the oscillation voltage is proportional to the temperature compensation voltage and inversely proportional to the reference current. Therefore, the effects of temperature on the delay time just cancel each other out. The delay time of the oscillating voltage is related to the frequency of the clock signal. Therefore, if the delay time of the oscillating voltage is not affected by temperature, the frequency of the clock signal will not be affected by temperature.
    Type: Application
    Filed: November 4, 2022
    Publication date: October 26, 2023
    Inventors: CHENG-TAO LI, Ping-Wen LAI
  • Patent number: 11736073
    Abstract: An amplifier circuit has an output stage, a first current source, a second current source, a third current source, a fourth current source, and a voltage clamping voltage. The output stage has a first P-type transistor and a first N-type transistor. The voltage clamping circuit receives a first bias voltage and a second bias voltage, and has a first end and a second end. When a second input current is positive current and the input current is a negative current or a zero current, the first end provides a first clamping voltage greater than the first bias voltage to a gate of the first P-type transistor. When the first input current is positive and the second input current is a negative current or zero current, the second end provides a second clamping voltage lower than the second bias voltage to a gate of the first N-type transistor.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: August 22, 2023
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Po-Sheng Chen, Cheng-Tao Li
  • Patent number: 11716451
    Abstract: A color correction method and a color correction system that executes the color correction method are provided. A correction image is projected on a projection screen based on a predefined value. A single frame of the correction image includes multiple regions. The multiple regions include multiple hue regions with different hues and multiple lightness regions with different lightness corresponding to the hues, or the multiple regions include multiple gray-scales regions with different gray-scales. A captured image is obtained by capturing the projection screen. Optical information of the captured image is detected. The optical information is compared with the predefined value to obtain an uneven color region that does not conform to the predefined value. The uneven color region is adjusted so that the optical information of the uneven color region conforms to the predefined value. The time for color correction can be greatly reduced accordingly.
    Type: Grant
    Filed: March 28, 2021
    Date of Patent: August 1, 2023
    Assignee: Coretronic Corporation
    Inventors: Yu-Fan Lee, Cheng-Tao Ho
  • Patent number: 11616437
    Abstract: A constant power control circuit driving an external device receiving an input voltage and generating an output voltage is provided. A first conversion circuit converts the voltage difference between the input voltage and the output voltage to generate a charge current. An energy storage circuit is charged during a charging period by the charge current to provide a stored voltage. The charging period is terminated in response to the stored voltage reaching a predetermined voltage. A control circuit adjusts a control signal according to a length of the charging period. A second conversion circuit generates a counting voltage according to the control signal. The counting voltage is inversely proportional to the voltage difference. A third conversion circuit converts the counting voltage into a limitation current. A driving circuit compares the setting current and the limitation current to generate a driving signal and send it to the external device.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: March 28, 2023
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventor: Cheng-Tao Li
  • Publication number: 20230058295
    Abstract: A semiconductor structure includes a ceramic substrate, a first bonding layer, a second bonding layer, a cavity, and a semiconductor layer. The ceramic substrate includes holes on its surface. The first bonding layer is disposed on the surface of the ceramic substrate, and the second bonding layer is bonded to the first bonding layer. The cavity is disposed above the hole and enclosed by the first bonding layer and the second bonding layer. The semiconductor layer extends over the cavity and is disposed along the surface of the second bonding layer.
    Type: Application
    Filed: August 22, 2021
    Publication date: February 23, 2023
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Yang Du, Yung-Fong Lin, Tsung-Hsiang Lin, Yu-Chieh Chou, Cheng-Tao Chou, Yi-Chun Lu, Chun-Hsu Chen
  • Publication number: 20230043729
    Abstract: An amplifier circuit has an output stage, a first current source, a second current source, a third current source, a fourth current source, and a voltage clamping voltage. The output stage has a first P-type transistor and a first N-type transistor. The voltage clamping circuit receives a first bias voltage and a second bias voltage, and has a first end and a second end. When a second input current is positive current and the input current is a negative current or a zero current, the first end provides a first clamping voltage greater than the first bias voltage to a gate of the first P-type transistor. When the first input current is positive and the second input current is a negative current or zero current, the second end provides a second clamping voltage lower than the second bias voltage to a gate of the first N-type transistor.
    Type: Application
    Filed: February 17, 2022
    Publication date: February 9, 2023
    Inventors: PO-SHENG CHEN, CHENG-TAO LI
  • Publication number: 20230022410
    Abstract: A liquid-cooled plate and a heat dissipation device are disclosed. The liquid-cooled plate includes a single-phase channel and a two-phase channel. First fins are spaced apart in the single-phase channel and second fins are spaced apart in the two-phase channel. The first fins are configured to perform a heat exchange with a liquid-state coolant flowing through the single-phase channel to convert the liquid-state coolant after the heat exchange into a gas-liquid two-phase coolant, and the second fins are configured to perform a heat exchange with a gas-liquid two-phase coolant flowing through the two-phase channel to output a coolant after the heat exchange.
    Type: Application
    Filed: December 2, 2020
    Publication date: January 26, 2023
    Inventors: Fan Liu, Cheng Tao, Shuai Li
  • Patent number: 11552171
    Abstract: A substrate structure and a method for fabricating a semiconductor structure including the substrate structure are provided. The substrate structure includes a substrate, a bow adjustment layer, and a silicon layer. The bow adjustment layer is on the top surface of the substrate. The silicon layer is on the bow adjustment layer. The substrate structure has a total bow value, and the total vow value is from ?20 ?m to ?40 ?m.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: January 10, 2023
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Yung-Fong Lin, Cheng-Tao Chou
  • Patent number: 11528528
    Abstract: The invention provides a method and a system for controlling a projector. The control method includes: obtaining a first trigger rule and a first to-be-executed action corresponding to the first trigger rule. The first trigger rule and the first to-be-executed action respectively include at least one of a plurality of combinable elements. The control method includes: determining whether the first trigger rule is satisfied and controlling the projector to execute the first to-be-executed action when the first trigger rule is determined as being satisfied. The control system includes a projector and a control device configured to execute the control method. The control method and system of the invention provide more diverse and flexible rules and action generation mechanisms, thereby implementing effects of product differentiation and intelligent operation.
    Type: Grant
    Filed: November 22, 2020
    Date of Patent: December 13, 2022
    Assignee: Coretronic Corporation
    Inventor: Cheng-Tao Ho