Patents by Inventor Cheng Tu

Cheng Tu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10802126
    Abstract: An electronic device including a sound receiver and a processor is provided. The sound receiver receives a sound signal provided by a sound generator. When the processor determines that an obstacle is blocked between the electronic device and the fixed device, the processor estimates a virtual position of the electronic device at a current time according to previous movement information and a previous position of the electronic device. The virtual position has a shortest path between a boundary position of the obstacle and the sound generator. The processor obtains a first relative distance between the electronic device and the boundary position according to the sound signal received by the sound receiver and the boundary position. The processor calculates a relative velocity and a relative acceleration of the electronic device relative to the fixed device at the current time according to the sound signal and the first relative distance.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: October 13, 2020
    Assignee: Acer Incorporated
    Inventors: Po-Jen Tu, Jia-Ren Chang, Kai-Meng Tzeng, Wen-Cheng Hsu, Hsing-Chu Wu
  • Patent number: 10787593
    Abstract: Provided are an emulsifiable isocyanate composition and a preparation method therefor. The emulsifiable isocyanate composition comprises the following components: (a) a polymethylene polyphenyl polyisocyanate, (b) an emulsifier, (c) an adduct derived from a diisocyanate, and optionally (d) a terpene monomer. The emulsifiable isocyanate composition is used in artificial board adhesives, and has a smaller mold cumulative effect, an improved demoulding performance and an extended pot life.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: September 29, 2020
    Assignee: WANHUA CHEMICAL GROUP CO., LTD.
    Inventors: Wangshun Qi, Zuolong Liu, Song Tu, Bo Wang, Xianbo Liu, Deqiang Ma, Bo Xin, Cheng Gong, Weiqi Hua
  • Patent number: 10782808
    Abstract: A shift register and a touch display apparatus thereof are provided. The shift register includes a voltage setting unit, a driving unit, a control unit, a discharge unit, a first compensation transistor, and a second compensation transistor. The voltage setting unit sets a terminal voltage of an internal terminal. The driving unit is coupled to the internal terminal to provide a gate signal and a driving signal. The control unit receives the terminal voltage to provide a control signal. The discharge unit discharges the terminal voltage and the gate signal according to the control signal. The first compensation transistor and the second compensation transistor are coupled in series between a touch enable signal and the internal terminal, and control terminals of the first compensation transistor and the second compensation transistor receive the terminal voltage and the touch enable signal, respectively.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: September 22, 2020
    Assignee: Au Optronics Corporation
    Inventors: Chun-Da Tu, Ming-Hsien Lee, Kai-Wei Hong, Chuang-Cheng Yang, Yi-Cheng Lin, Chun-Feng Lin
  • Publication number: 20200284834
    Abstract: Herein disclosed are a method and a test probe for testing an electrical component. The electrical component comprises at least a first electrode and a second electrode. The method comprises the following steps: covering the first electrode with a first conducting flexible layer; driving a first electrode contact to electrically connect a first end of the first electrode contact with the first electrode via the first conducting flexible layer; covering the second electrode with a second conducting flexible layer; and driving a second electrode contact to electrically connect a second end of the second electrode contact with the second electrode via the second conducting flexible layer. The first conducting flexible layer is an anisotropic conductive film.
    Type: Application
    Filed: March 6, 2020
    Publication date: September 10, 2020
    Inventors: Min-Hung CHANG, Ching-Lin LEE, Chin-Yuan CHANG, Cheng-Hung PAN, Mao-Sheng LIU, Tzu-Tu CHAO
  • Publication number: 20200280706
    Abstract: A projection system and a projection method are provided. The projection system includes a processing module, a projection module and a photographing module. The projection module is coupled to the processing module, and projects a first projection image including a first asymmetric graph. The photographing module is coupled to the processing module, and captures at least a part of the first projection image based on a photographing range, so as to output a first photographed image including at least one second asymmetric graph. The processing module analyzes the first photographed image to determine whether the at least one second asymmetric graph is consistent with a geometric configuration of the first asymmetric graph. The processing module determines an effective photographing area according to one of the at least one second asymmetric graph that is consistent with the geometric configuration of the first asymmetric graph in the first photographed image.
    Type: Application
    Filed: February 24, 2020
    Publication date: September 3, 2020
    Applicant: Coretronic Corporation
    Inventors: Hsun-Cheng Tu, Chien-Chun Peng, Chi-Wei Lin
  • Patent number: 10763116
    Abstract: A semiconductor device includes: a fin structure disposed on a substrate; a gate feature that traverses the fin structure to overlay a central portion of the fin structure; a pair of source/drain features, along the fin structure, that are disposed at respective sides of the gate feature; and a plurality of contact structures that are formed of tungsten, wherein a gate electrode of the gate feature and the pair of source/drain features are each directly coupled to a respective one of the plurality of contact structures.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: September 1, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hong-Ying Lin, Cheng-Yi Wu, Alan Tu, Chung-Liang Cheng, Li-Hsuan Chu, Ethan Hsiao, Hui-Lin Sung, Sz-Yuan Hung, Sheng-Yung Lo, C. W. Chiu, Chih-Wei Hsieh, Chin-Szu Lee
  • Patent number: 10740122
    Abstract: A system module applied to the machine controller for simulating a machine operation screen based on a non-invasive data-extraction system, is disclosed. An image capture device of the system module can receive an original operation screen outputted from the machine controller, and transmit the original operation screen to the non-invasive data-extraction system and a high-speed image process unit for extraction of the information shown on the operation screen. The software control system can extract the operational information of the machine controller in real time, to create a machine operation flow for generating a simulated machine operation screen which is then outputted to a screen of the machine controller. As a result, the site working staff can be provided with operational information associated with the machine in real time, for example, the operational information includes currently executed operation screen, position of mouse cursor and pop-up window detection result.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: August 11, 2020
    Assignee: Adlink Technology Inc.
    Inventors: Chua-Hong Ng, Chao-Tung Yang, Wei-Hung Chen, Tsan-Ming Yu, Shih-Hsun Lin, Yang-Chung Tseng, Chih-Fu Hsu, Chien-Hsun Tu, Ren-Yu Wu, Chieh-Yuan Lo, Chih-Kai Shiao, Hsiao-Ling Chang, Te-Cheng Tseng, Chun-Liang Chen
  • Patent number: 10732738
    Abstract: A system module of customizing a screen image based on a non-invasive data-extraction system, and a method thereof are disclosed. The system module is applicable to a machine controller controlling a machine, and sensors are disposed around the machine. In the system module, an image capture device receives an image of an original screen from the machine controller, and transmits the image to the non-invasive data-extraction system for extracting information, and a software control system integrates data measured by the sensors with the information, and combined the integration result with a customized screen image, and an extra control component is embedded in an original operation screen of the machine controller. The customized screen image is shown on the machine controller to display information by more visual manner. Furthermore, the signal receiving device and an HID simulation device can be used to provide a basic function of a KVM switch.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: August 4, 2020
    Assignee: Adlink Technology Inc.
    Inventors: Chua-Hong Ng, Chao-Tung Yang, Wei-Hung Chen, Tsan-Ming Yu, Shih-Hsun Lin, Yang-Chung Tseng, Chih-Fu Hsu, Chien-Hsun Tu, Te-Cheng Chiu, Yi-Wei Lin, Jen-Chi Hsu
  • Patent number: 10734509
    Abstract: A nitride semiconductor epitaxial stack structure including: a silicon substrate; an AlN nucleation layer disposed on the silicon substrate; a buffer structure disposed on the aluminum-including nucleation layer and sequentially including a first superlattice epitaxial structure, a first GaN-based layer disposed on the first superlattice epitaxial structure, and a second superlattice epitaxial structure disposed on the first GaN based layer; a channel layer disposed on the buffer structure; and a barrier layer disposed on the channel layer; wherein the first superlattice epitaxial structure includes a first average Al composition ratio, the first GaN-based layer includes a first Al composition ratio, the_second superlattice epitaxial structure includes a second average Al composition ratio; wherein an Al composition ratio of the AlN nucleation layer?the first average Al composition ratio of the first superlattice epitaxial structure>the first Al composition ratio of the first GaN based layer>the second
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: August 4, 2020
    Assignee: Epistar Corporation
    Inventors: Shang Ju Tu, Ya Yu Yang, Chia Cheng Liu, Tsung Cheng Chang
  • Patent number: 10733952
    Abstract: A multiplexer applied to a display device includes: a plurality of switching units, electrically coupled to a data driver and a plurality of pixel units, where the switching units are adapted to receive a plurality of input display data signals output by the data driver, and the switching units output a plurality of output display data signals to the electrically coupled pixel units, where each of the switching units includes a plurality of switch units, configuration locations of the switch units in each of the switching units are the same as, and some of the switch units configured at a same configuration location in the different switching units are electrically coupled to different control signal lines and have different wiring lengths, where the wiring lengths are distances between the switch units and the control signal lines.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: August 4, 2020
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Yi-Cheng Lin, Ming-Hsien Lee, Kai-Wei Hong, Chun-Da Tu, Chuang-Cheng Yang, Chun-Feng Lin
  • Publication number: 20200244289
    Abstract: A data writing method, a memory control circuit unit and a memory storage device are provided. The method includes: executing a first programming operation to data according to a first RAID ECC rate, programming the data into at least a portion of a plurality of first physical programming units, and generating a first RAID ECC; and executing a second programming operation to the data programmed into at least the portion of the first physical programming units according to a second RAID ECC rate, programming the data into at least a portion of a plurality of second physical programming units, and generating a second RAID ECC, wherein the first RAID ECC rate is different from the second RAID ECC rate.
    Type: Application
    Filed: March 20, 2019
    Publication date: July 30, 2020
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Chia-Sheng Chou, Chia-Cheng Tu, Kuo-Ming Tseng, Yi-Liang Hu
  • Patent number: 10727804
    Abstract: An integrated circuit is a layered device, on a semiconductor substrate, which contains metal electrodes that sandwich a piezoelectric layer, followed by a magnetostrictive layer and a metal coil. The metal electrodes define an electrical port across which to receive an alternating current (AC) voltage, which is applied across the piezoelectric layer to cause a time-varying strain in the piezoelectric layer. The magnetostrictive layer is to translate the time-varying strain, received by way of a vibration mode from interaction with the piezoelectric layer, into a time-varying electromagnetic field. The metal coil, disposed on the magnetostrictive layer, includes a magnetic port at which to induce a current based on exposure to the time-varying electromagnetic field generated by the magnetostrictive layer.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: July 28, 2020
    Assignee: Board of Trustees of the University of Illinois
    Inventors: Songbin Gong, Ruochen Lu, Tomas Manzaneque Garcia, Cheng Tu, Daniel Shoemaker, Chengxi Zhao
  • Publication number: 20200227591
    Abstract: The present disclosure provides a light-emitting apparatus comprising a board having a plurality of first metal contacts and a plurality of second metal contacts on a top surface; a plurality of LEDs being bonded to the board, the each of the LEDs comprising a first cladding layer on the substrate, an active layer on the first cladding layer, a second cladding layer on the active layer, an upper surface on the second cladding layer, a first metal layer, and a second metal layer, wherein the first metal layer and the second metal layer are between the active layer and the board; an opaque layer between the adjacent LEDs and comprising a polymer mixed with a plurality of inorganic particles; and an encapsulating layer on the upper surfaces and opposite to the board, wherein the encapsulating layer does not cover a side wall of the active layer; and an underfill material between the board and the plurality of LEDs, wherein the underfill material surrounds each of the first metal layer and the second metal layer.
    Type: Application
    Filed: March 24, 2020
    Publication date: July 16, 2020
    Inventors: Min-Hsun HSIEH, Tzer-Perng CHEN, Jen-Chau WU, Yuh-Ren SHIEH, Chuan-Cheng TU
  • Patent number: 10713160
    Abstract: A data writing method, a memory control circuit unit and a memory storage device are provided. The method includes: executing a first programming operation to data according to a first RAID ECC rate, programming the data into at least a portion of a plurality of first physical programming units, and generating a first RAID ECC; and executing a second programming operation to the data programmed into at least the portion of the first physical programming units according to a second RAID ECC rate, programming the data into at least a portion of a plurality of second physical programming units, and generating a second RAID ECC, wherein the first RAID ECC rate is different from the second RAID ECC rate.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: July 14, 2020
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Chia-Sheng Chou, Chia-Cheng Tu, Kuo-Ming Tseng, Yi-Liang Hu
  • Publication number: 20200213565
    Abstract: A projection system and a projection method are provided. The projection system includes a processing module, a projection module and a photographing module. The projection module projects a first projection image based on a projection scope. The photographing module captures a part of the first projection image based on a photographing scope, so as to obtain a first photographic image. The part of the first projection image includes a plurality of first positioning grid points. The processing module analyzes the first photographic image, so as to obtain a plurality of first grid point coordinates. The processing module calculates a plurality of preset grid point coordinates corresponding to a plurality of preset positioning grid points in the whole projection scope one by one according to the first grid point coordinates. The processing module determines a projection result in the projection scope according to the preset grid point coordinates.
    Type: Application
    Filed: December 26, 2019
    Publication date: July 2, 2020
    Applicant: Coretronic Corporation
    Inventors: Chien-Chun Peng, Hsun-Cheng Tu
  • Patent number: 10692786
    Abstract: A semiconductor structure includes a substrate, a first insulating layer, a second insulating layer, a first seal ring structure, a second seal ring structure, and a passivation layer. The substrate has a chip region and a seal ring region. The first insulating layer is on the substrate. The second insulating layer is on the first insulating layer. The first seal ring structure is in the seal ring region and embedded in the first insulating layer and the second insulating layer, wherein the first seal ring structure includes a stack of metal layers. The second seal ring structure is in the seal ring region and embedded in the first insulating layer, wherein the second seal ring structure includes a polysilicon ring structure. The passivation layer is on the second insulating layer and the first seal ring structure.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: June 23, 2020
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Ting-You Lin, Chi-Li Tu, Shin-Cheng Lin, Yu-Hao Ho, Cheng-Tsung Wu
  • Publication number: 20200090614
    Abstract: The present embodiment of the invention provides a gate driving circuit and a display apparatus using the gate driving circuit. The gate driving circuit has a plurality of shift registers, and each shift register includes a first output unit, a first pull-down unit, a second output unit, a second pull-down unit, a voltage coupling unit, and a voltage boosting unit. The first output unit is coupled to a node and a first output end. The second output unit is coupled to the node and a second output end. The first pull-down unit is coupled to the first output end and a reference potential. The second pull-down unit is coupled to the second output end and the reference potential. The voltage coupling unit is coupled between the node and the second output end. The voltage boosting unit is coupled to a preset potential, the first output end, and a node and a gate high potential of a shift register at a previous stage.
    Type: Application
    Filed: November 21, 2019
    Publication date: March 19, 2020
    Inventors: Kai-Wei HONG, Chun-Da TU, Ming-Hsien LEE, Chuang-Cheng YANG, Yi-Cheng LIN, Chun-Feng LIN
  • Patent number: 10594994
    Abstract: A projection system and a projection method are provided. A projector projects a correction image towards a projection screen. The correction image has a pattern, a portion of the pattern exceeds a frame of the projection screen, and the pattern includes strip regions. An image capturing device obtains a captured image towards the projection screen and transmits the captured image to a processor. The captured image has brightness information of the strip regions. The processor analyzes a brightness difference of the strip regions between the projection screen and the frame in the captured image, calculates a position of the frame according to the brightness difference, and performs calculations according to the position of the frame to obtain a coordinate conversion table. The projector performs a warping operation on the projected image according to the table and projects the warped projected image into the projection screen.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: March 17, 2020
    Assignee: Coretronic Corporation
    Inventors: Hsun-Cheng Tu, Chien-Chun Peng, Yung-Chiao Liu
  • Patent number: 10573738
    Abstract: A semiconductor device is provided. The device includes a substrate having a first conductivity type. The device further includes a drain region, a source region, and a well region disposed in the substrate. The well region is disposed between the drain region and the source region and having a second conductivity type opposite to the first conductivity type. The device further includes a plurality of doped regions disposed within the well region. The doped regions are vertically and horizontally offset from each other. Each of the doped regions includes a lower portion having the first conductivity type, and an upper portion stacked on the lower region and having the second conductivity type.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: February 25, 2020
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shang-Hui Tu, Chih-Jen Huang, Jui-Chun Chang, Shin-Cheng Lin, Yu-Hao Ho, Wen-Hsin Lin
  • Publication number: 20200043739
    Abstract: A semiconductor device includes: a fin structure disposed on a substrate; a gate feature that traverses the fin structure to overlay a central portion of the fin structure; a pair of source/drain features, along the fin structure, that are disposed at respective sides of the gate feature; and a plurality of contact structures that are formed of tungsten, wherein a gate electrode of the gate feature and the pair of source/drain features are each directly coupled to a respective one of the plurality of contact structures.
    Type: Application
    Filed: October 8, 2019
    Publication date: February 6, 2020
    Inventors: Hong-Ying LIN, Cheng-Yi WU, Alan TU, Chung-Liang CHENG, Li-Hsuan CHU, Ethan HSIAO, Hui-Lin SUNG, Sz-Yuan HUNG, Sheng-Yung LO, C.W. CHIU, Chih-Wei Hsieh, Chin-Szu LEE