Patents by Inventor Cheng Wei Chou

Cheng Wei Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200161447
    Abstract: A method for forming a high electron mobility transistor (HEMT) includes forming a buffer layer on a transparent substrate. The method further includes forming a barrier layer on the buffer layer. A channel region is formed in the buffer layer adjacent to the interface between the buffer layer and the barrier layer. The method further includes forming a dielectric layer on the barrier layer. The method further includes forming source/drain electrodes through the dielectric layer and the barrier layer and disposed on the buffer layer. The method further includes forming a shielding layer conformally covering the dielectric layer and the source/drain electrodes. The method further includes performing a thermal process on the source/drain electrodes.
    Type: Application
    Filed: November 19, 2018
    Publication date: May 21, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Cheng-Wei CHOU, Hsin-Chih LIN
  • Patent number: 10651033
    Abstract: A method for manufacturing a semiconductor device structure is provided. The method includes providing a base substrate and forming a buffer layer on the base substrate. The method also includes forming a patterned silicon layer on the buffer layer. The patterned silicon layer has an opening to expose a portion of the buffer layer. The method further includes epitaxially growing a patterned channel layer and a patterned barrier layer on a top surface of the patterned silicon layer sequentially. In addition, the method includes forming a gate electrode on the patterned barrier layer.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: May 12, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Cheng-Wei Chou, Hsin-Chih Lin, Yu-Chieh Chou
  • Patent number: 10453947
    Abstract: A semiconductor device includes a substrate, a flowable dielectric material and a GaN-based semiconductor layer. The substrate has a pit exposed from an upper surface of the substrate, the flowable dielectric material fully fills the pit, and the GaN-based semiconductor layer is disposed over the substrate and the flowable dielectric material.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: October 22, 2019
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Yung-Fung Lin, Cheng-Wei Chou, Szu-Yao Chang, Cheng-Tao Chou, Hsiu-Ming Chen
  • Patent number: 10057596
    Abstract: A motion estimation method for blocks of a periodic pattern is provided, which includes determining a global motion vector corresponding to a region according to motion vectors of periodic blocks in the region; generating candidate motion vectors of a target periodic block to be encoded in a second frame; for each candidate motion vector, determining a penalty value based on at least one difference between the candidate motion vector and at least one global motion vector corresponding to at least a relative region in the first frame; for each candidate motion vector, calculating a weighted similarity value based on an original similarity value between the target periodic block of the second frame and a reference block corresponding to the candidate motion vector of the first frame, and the penalty value; and determining a motion vector of the target periodic block according to weighted similarity values of the candidate motion vectors.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: August 21, 2018
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Hsiao-En Chang, Cheng-Wei Chou
  • Patent number: 9985077
    Abstract: The present invention relates to a serial module of organic solar cells and the method for manufacturing the same. The structure comprises a transparent conductive layer composed by a plurality of conductive blocks, an active layer having notches on the periphery, and a metal layer composed by a plurality of metal blocks. The active layer according to the present invention is a complete layer except the notches on the periphery for exposing a portion of the transparent conductive layer. The metal blocks can contact the conductive blocks of adjacent organic solar cell via the exposure areas and thus connecting the organic solar cells in series. The present invention can improves the power generating efficiency of organic solar cells in a limited space, which is beneficial to the development of promotion of future organic solar cells.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: May 29, 2018
    Assignee: ATOMIC ENERGY COUNCIL—INSTITUTE OF NUCLEAR ENERGY RESEARCH
    Inventors: Yu-Ching Huang, De-Han Lu, Hou-Chin Cha, Cheng-Wei Chou, Chih-Min Chuang, Yeong-Der Lin, Charn-Ying Chen, Cheng-Si Tsao
  • Publication number: 20180131959
    Abstract: A motion estimation method for blocks of a periodic pattern is provided, which includes determining a global motion vector corresponding to a region according to motion vectors of periodic blocks in the region; generating candidate motion vectors of a target periodic block to be encoded in a second frame; for each candidate motion vector, determining a penalty value based on at least one difference between the candidate motion vector and at least one global motion vector corresponding to at least a relative region in the first frame; for each candidate motion vector, calculating a weighted similarity value based on an original similarity value between the target periodic block of the second frame and a reference block corresponding to the candidate motion vector of the first frame, and the penalty value; and determining a motion vector of the target periodic block according to weighted similarity values of the candidate motion vectors.
    Type: Application
    Filed: November 7, 2016
    Publication date: May 10, 2018
    Inventors: Hsiao-En Chang, Cheng-Wei Chou
  • Patent number: 9900550
    Abstract: An frame rate up-conversion (FRC) apparatus and method are provided. The motion vector generating circuit compares a previous original frame with a current original frame to obtain the first motion vectors of the blocks of the current original frame, and compares the current original frame and a posterior original frame to obtain the second motion vectors of the blocks of the current original frame. The motion vector correction circuit checks whether the blocks of the second original frame are located in an occlusion area, and corrects the motion vectors of the blocks in the occlusion area based on the first motion vectors and the second motion vectors of the first original frame, the second original frame and the third original frame. The interpolation frame generating circuit creates at least one interpolation frame between the first original frame and the second original frame based on the corrected motion vectors.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: February 20, 2018
    Assignee: Novatek Microelectronics Corp.
    Inventors: Cheng-Wei Chou, Hsiao-En Chang, Chun-Wei Chen
  • Patent number: 9437618
    Abstract: A pixel structure includes a thin film transistor device. The thin film transistor device includes a first connection electrode, a second connection electrode, an oxide semiconductor channel layer, a gate insulation layer, a gate electrode, a dielectric layer, a source electrode and a drain electrode. The oxide semiconductor channel layer at least partially covers a top surface of the first connection electrode and a top surface of the second connection electrode. The gate electrode is disposed on the gate insulation layer. The dielectric layer is disposed on the gate electrode and the gate insulation layer. The gate insulation layer and the dielectric layer have a first contact hole at least partially exposing the top surface of the first connection electrode and a second contact hole at least partially exposing the top surface of the second connection electrode.
    Type: Grant
    Filed: July 2, 2014
    Date of Patent: September 6, 2016
    Assignee: AU OPTRONICS CORP.
    Inventor: Cheng-Wei Chou
  • Patent number: 9323782
    Abstract: A matching search method is utilized for performing a matching search from a first image block to a second image block in a stereo matching system. The matching search method includes obtaining a global offset of the first image block corresponding to the second image block according to an offset relationship between a first image data of the first image block and a second image data of the second image block; and performing the matching search from the first image block to the second image block according to the global offset and a searching range.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: April 26, 2016
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Lei Zhou, Guangzhi Liu, Cheng-Wei Chou
  • Patent number: 9269904
    Abstract: A method for manufacturing large-area organic solar cells utilizes a hot solvent vapor annealing manufacturing process while manufacturing the organic solar cells via a large-area proceeding method, such as spraying. Namely, a heated solvent vapor is utilized to modify an active layer after the active layer of the organic solar cells is formed, which ensures a flatness and an uniformity thereof and increases a crystallinity of the active layer and an element charge transport rate so that a power conversion efficiency of the large area organic solar cells is increased, a proceeding time is quite short, and the performance thereof is quite obvious. Therefore, the method not only reduces the cost by a large area production but obtains organic solar cells with higher conversion efficiency.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: February 23, 2016
    Assignee: Atomic Energy Council—Institute of Nuclear Energy Research
    Inventors: Yu-Ching Huang, Hou-Chin Cha, Fan-Hsuan Hsu, Cheng-Wei Chou, De-Han Lu, Yeong-Der Lin, Chih-Min Chuang, Charn-Ying Chen, Cheng-Si Tsao
  • Patent number: 9241148
    Abstract: A disparity calculating method includes generating an energy matrix according to a first image-block and a second image-block, wherein the energy matrix includes a plurality of energies of a plurality of pixels corresponding to a plurality of disparity candidates; setting the energy corresponding to a starting pixel of the plurality of pixels and a specified disparity candidate of the plurality of disparity candidates as a first predetermined value and setting the energies corresponding to the starting pixel and other disparity candidates of the plurality of disparity candidates as a second predetermined value, wherein the second predetermined value is greater than the first predetermined value; generating a path matrix according to the energy matrix; and determining a plurality of disparities of the plurality of pixels sequentially from an ending pixels of the plurality of pixels, wherein the disparity of the ending pixel is set as a third predetermined value.
    Type: Grant
    Filed: December 8, 2013
    Date of Patent: January 19, 2016
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Guangzhi Liu, Lei Zhou, Cheng-Wei Chou
  • Publication number: 20150380465
    Abstract: The present invention relates to a serial module of organic solar cells and the method for manufacturing the same. The structure comprises a transparent conductive layer composed by a plurality of conductive blocks, an active layer having notches on the periphery, and a metal layer composed by a plurality of metal blocks. The active layer according to the present invention is a complete layer except the notches on the periphery for exposing a portion of the transparent conductive layer. The metal blocks can contact the conductive blocks of adjacent organic solar cell via the exposure areas and thus connecting the organic solar cells in series. The present invention can improves the power generating efficiency of organic solar cells in a limited space, which is beneficial to the development of promotion of future organic solar cells.
    Type: Application
    Filed: October 17, 2014
    Publication date: December 31, 2015
    Inventors: YU-CHING HUANG, DE-HAN LU, HOU-CHIN CHA, CHENG-WEI CHOU, CHIH-MIN CHUANG, YEONG-DER LIN, CHARN-YING CHEN, CHENG-SI TSAO
  • Patent number: 9196852
    Abstract: A method for manufacturing membrane layers of organic solar cells by roll to roll coating utilizes a roll to roll process for manufacturing an electron transferring layer and an active layer of the organic solar cells is disclosed. The roll to roll process adopted by the method cooperates with a particular solvent and accompanies a parameter control such as temperature and processing time during the sintering and baking steps. The method utilizes a slot-die coating technique in the interim, whereby a membrane layer of the solar cells can be manufactured with a large area for reducing the cost, and the formed membrane layers can have a good efficiency.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: November 24, 2015
    Assignee: Atomic Energy Council—Institute of Nuclear Energy Research
    Inventors: Hou-Chin Cha, Yu-Ching Huang, Chih-Min Chuang, Cheng-Wei Chou, De-Han Lu, Yeong-Der Lin, Charn-Ying Chen, Cheng-Si Tsao
  • Patent number: 9196740
    Abstract: A pixel structure including a substrate, a gate, an insulation layer, a metal oxide semiconductor (MOS) layer, a source and a drain, at least one film layer, and a first electrode layer is provided. The gate is disposed on the substrate. The insulation layer covers the gate. The MOS layer is disposed on the insulation layer above the gate. The source and the drain are disposed on the MOS layer. The film layer covers the MOS layer and includes a transparent photocatalytic material, wherein the transparent photocatalytic material blocks ultraviolet light from reaching the MOS layer. The first electrode layer is electrically connected to the source or the drain.
    Type: Grant
    Filed: October 3, 2012
    Date of Patent: November 24, 2015
    Assignee: Au Optronics Corporation
    Inventors: Cheng-Wei Chou, Hsueh-Hsing Lu, Hung-Che Ting, Tsung-Hsiang Shih, Chia-Yu Chen
  • Publication number: 20150214248
    Abstract: A pixel structure includes a thin film transistor device. The thin film transistor device includes a first connection electrode, a second connection electrode, an oxide semiconductor channel layer, a gate insulation layer, a gate electrode, a dielectric layer, a source electrode and a drain electrode. The oxide semiconductor channel layer at least partially covers a top surface of the first connection electrode and a top surface of the second connection electrode. The gate electrode is disposed on the gate insulation layer. The dielectric layer is disposed on the gate electrode and the gate insulation layer. The gate insulation layer and the dielectric layer have a first contact hole at least partially exposing the top surface of the first connection electrode and a second contact hole at least partially exposing the top surface of the second connection electrode.
    Type: Application
    Filed: July 2, 2014
    Publication date: July 30, 2015
    Inventor: Cheng-Wei Chou
  • Patent number: 9042638
    Abstract: An image matching method is utilized for performing a stereo matching from a first image block to a second image block in a stereo matching system. The image matching method includes performing a matching computation from the first image block to the second image block according to a first matching algorithm to generate a first matching result; performing the matching computation between the first image block and the second image block according to a second matching algorithm to generate a second matching result and a third matching result; obtaining a matching error and a matching similarity of the first image block according to the second matching result and the third matching result; and determining a stereo matching result of the first image block according to the matching error and the matching similarity.
    Type: Grant
    Filed: September 22, 2013
    Date of Patent: May 26, 2015
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Lei Zhou, Guangzhi Liu, Cheng-Wei Chou
  • Publication number: 20150085085
    Abstract: A disparity calculating method for a stereo matching system includes calculating a global energy matrix according to a first image, a second image and a previous disparity matrix of a previous frame; calculating a global disparity matrix according to the global energy matrix and a first stereo matching algorithm; calculating a local energy matrix between a first image block of the first image and a second image block of the second image according to the first image block, the second image block, a previous block disparity matrix and the global disparity matrix; and calculating a local disparity matrix between the first image block and the second image block according to the local energy matrix and a second stereo matching algorithm.
    Type: Application
    Filed: December 6, 2013
    Publication date: March 26, 2015
    Applicant: NOVATEK Microelectronics Corp.
    Inventors: Guangzhi Liu, Lei Zhou, Cheng-Wei Chou
  • Publication number: 20150063680
    Abstract: A disparity calculating method includes generating an energy matrix according to a first image-block and a second image-block, wherein the energy matrix includes a plurality of energies of a plurality of pixels corresponding to a plurality of disparity candidates; setting the energy corresponding to a starting pixel of the plurality of pixels and a specified disparity candidate of the plurality of disparity candidates as a first predetermined value and setting the energies corresponding to the starting pixel and other disparity candidates of the plurality of disparity candidates as a second predetermined value, wherein the second predetermined value is greater than the first predetermined value; generating a path matrix according to the energy matrix; and determining a plurality of disparities of the plurality of pixels sequentially from an ending pixels of the plurality of pixels, wherein the disparity of the ending pixel is set as a third predetermined value.
    Type: Application
    Filed: December 8, 2013
    Publication date: March 5, 2015
    Applicant: NOVATEK Microelectronics Corp.
    Inventors: Guangzhi Liu, Lei Zhou, Cheng-Wei Chou
  • Publication number: 20150056735
    Abstract: A method for manufacturing membrane layers of organic solar cells by roll to roll coating utilizes a roll to roll process for manufacturing an electron transferring layer and an active layer of the organic solar cells is disclosed. The roll to roll process adopted by the method cooperates with a particular solvent and accompanies a parameter control such as temperature and processing time during the sintering and baking steps. The method utilizes a slot-die coating technique in the interim, whereby a membrane layer of the solar cells can be manufactured with a large area for reducing the cost, and the formed membrane layers can have a good efficiency.
    Type: Application
    Filed: October 29, 2013
    Publication date: February 26, 2015
    Applicant: ATOMIC ENERGY COUNCIL-INSTITUTE OF NUCLEAR ENERGY RESEARCH
    Inventors: HOU-CHIN CHA, YU-CHING HUANG, CHIH-MIN CHUANG, CHENG-WEI CHOU, DE-HAN LU, YEONG-DER LIN, CHARN-YING CHEN, CHENG-SI TSAO
  • Publication number: 20150023585
    Abstract: A matching search method is utilized for performing a matching search from a first image block to a second image block in a stereo matching system. The matching search method includes obtaining a global offset of the first image block corresponding to the second image block according to an offset relationship between a first image data of the first image block and a second image data of the second image block; and performing the matching search from the first image block to the second image block according to the global offset and a searching range.
    Type: Application
    Filed: October 15, 2013
    Publication date: January 22, 2015
    Applicant: NOVATEK Microelectronics Corp.
    Inventors: Lei Zhou, Guangzhi Liu, Cheng-Wei Chou