Abstract: A memory control device includes a memory and a controller. The memory includes a plurality of memory blocks. The controller is coupled to the memory and configured to select a first memory block from the memory blocks and program data into the first memory block. When the memory control device is deactivated and re-activated, the controller is further configured to read a voltage distribution of the first memory block to determine a deactivation interval, and determine a reference time according to the deactivation interval and an initial time, and the voltage distribution of the first memory block correspond to the data.

Abstract: The present invention discloses a memory control device and method compatible to multiple types of interface the memory control device comprises: a multi-interface physical layer circuit configured to couple to a host, to receive a differential signal from the host, to detect at least one of characteristics of the differential signal to generate a physical layer output signal and to generate a physical layer output signal according to a detected result, wherein a frequency of the differential signal is higher than hundreds of KHz; and a processing circuit, coupled between the multi-interface physical layer circuit and a memory module, configured to receive the physical layer output signal from the multi-interface physical layer circuit, to determine the differential signal complies with one of a specification of an first type of interface and that of a second type of interface according to the physical layer output signal, and to adapt an operation mode of the memory control device to one of the multiple type

Abstract: A data storage device includes a power line communication (PLC) circuit and a storage controller. The PLC circuit is coupled to a power line. The storage controller is coupled to the PLC circuit. The storage controller is configured to access a plurality of memory block. The PLC circuit is configured to carry at least one signal outputted from the storage controller on the power line, in order to transmit the at least one signal to an external device such that an operational state of the data storage device can be debugged/monitored.

Abstract: The present invention discloses a solid state drive (SSD) control device including: a multi-interface compatible physical layer circuit operable to generate a physical layer output signal according to a serializer/deserializer (SerDes) reception signal; and a processing circuit operable to make the solid state drive control device adapt to one of several interface types in accordance with the physical layer output signal.

Abstract: A memory device includes a memory module and a control module. The control module is coupled to the memory module and is configured to store data into the memory module according to a first mapping table. The control module includes a storing unit and a guaranteeing unit. The storing unit is configured to store the first mapping table. The guaranteeing unit is coupled to the storing unit and is configured to determine whether the first mapping table is correct or not. The guaranteeing unit is further configured to issue an error signal in a state where the first mapping table is incorrect.

Abstract: A memory control device includes a memory and a controller. The memory includes a plurality of memory blocks. The controller is coupled to the memory and configured to select a first memory block from the memory blocks and program data into the first memory block. When the memory control device is deactivated and re-activated, the controller is further configured to read a voltage distribution of the first memory block to determine a deactivation interval, and determine a reference time according to the deactivation interval and an initial time, and the voltage distribution of the first memory block correspond to the data.

Abstract: A data backup method for backing up target data, through a driver module, from a first storage device to a second storage device is disclosed. The first storage device includes a first storage unit that stores the target data, and a first control unit that accesses the first storage unit based on a first logical-to-physical mapping table. The second storage device includes a second storage unit and a second control unit that accesses the second storage unit based on a second logical-to-physical mapping table. The method includes steps of: reading the target data from the first storage unit without accessing the first logical-to-physical mapping table and transmitting the target data to the driver module; transmitting the target data to the second control unit; and writing the target data to the second storage unit without accessing the second logical-to-physical mapping table.

Abstract: The present invention discloses a solid state drive (SSD) control device including: a multi-interface compatible physical layer circuit operable to generate a physical layer output signal according to a serializer/deserializer (SerDes) reception signal; an input/output (I/O) circuit operable to generate at least one terminal output signal according to signal variation of at least one terminal; and a processing circuit operable to make the solid state drive control device adapt to one of several interface types in accordance with the physical layer output signal and/or the at least one terminal output signal.

Abstract: A method of isolating at least one phenanthroindolizidine alkaloid, in particular with telomerase inhibitory activity, from Tylophora atrofolliculata is used to isolate and obtain for example about six to eight phenanthroindolizidine alkaloids, including at least four new phenanthroindolizidine alkaloids which have not been previously isolated. Experimental tests confirmed an exceptional telomerase inhibitory activity of the phenanthroindolizidine alkaloids isolated. A pharmaceutical composition includes at least one phenanthroindolizidine alkaloid and at least one pharmaceutical tolerable excipient. Still further, a method of treating a subject suffering from cancer includes administering at least one phenanthroindolizidine alkaloid isolated from Tylophora atrofolliculata. Also, a method of treating a subject suffering from cancer includes administering to the subject at least one phenanthroindolizidine alkaloid having certain formula.

Abstract: A memory device includes a memory module and a control module. The control module is coupled to the memory module and is configured to store data into the memory module according to a first mapping table. The control module includes a storing unit and a guaranteeing unit. The storing unit is configured to store the first mapping table. The guaranteeing unit is coupled to the storing unit and is configured to determine whether the first mapping table is correct or not. The guaranteeing unit is further configured to issue an error signal in a state where the first mapping table is incorrect.

Abstract: A computing system including a memory, a processor and a solid state disk is provided. The memory stores a disk access driver program. The solid state disk includes a storage circuit and a control circuit. The control circuit includes a processing unit, a first access path and a second access path. The processing unit communicates with the processor through the first access path. The processor executes the driver program that enables the processor to process a disk access command for directly accessing the storage circuit of the solid state disk through the second access path.

Abstract: A data backup method for backing up target data, through a driver module, from a first storage device to a second storage device is disclosed. The first storage device includes a first storage unit that stores the target data, and a first control unit that accesses the first storage unit based on a first logical-to-physical mapping table. The second storage device includes a second storage unit and a second control unit that accesses the second storage unit based on a second logical-to-physical mapping table. The method includes steps of: reading the target data from the first storage unit without accessing the first logical-to-physical mapping table and transmitting the target data to the driver module; transmitting the target data to the second control unit; and writing the target data to the second storage unit without accessing the second logical-to-physical mapping table.

Abstract: The present invention discloses a solid state drive (SSD) control device including: a multi-interface compatible physical layer circuit operable to generate a physical layer output signal according to a serializer/deserializer (SerDes) reception signal; an input/output (I/O) circuit operable to generate at least one terminal output signal according to signal variation of at least one terminal; and a processing circuit operable to make the solid state drive control device adapt to one of several interface types in accordance with the physical layer output signal and/or the at least one terminal output signal.

Abstract: The invention relates to a method for determining ischemic status. The method comprises acquiring magnetic resonance diffusion tensor matrices and obtaining a relative decrease of diffusion magnitude due to the ischemic status from the magnetic resonance diffusion tensor matrices. The invention also relates to a method for assessing stroke onset time. The method comprises acquiring magnetic resonance diffusion tensor matrices and obtaining a relative decrease of pure anisotropy due to stroke from the magnetic resonance diffusion tensor matrices.

Abstract: A system on a chip (SOC) and an integrated circuit device having the same are disclosed. The SOC has a chip controller and a first chip element which do not need to operate according to a reference clock signal, and the SOC has a second chip element which needs to operate according to the reference clock signal. During resetting of a main system processor, the chip controller of the SOC is reset simultaneously. After the chip controller finishes resetting, the first chip element is then reset. After the main system processor finishes resetting, the second chip element of the SOC starts to reset. Accordingly, during the resetting of the main system processor, the SOC is reset simultaneously, thereby reducing the boot time of the integrated circuit device.

Abstract: A heat dissipation device control method for dissipating heat from an electronic element without self-heat-dissipation function in an electronic device. The method comprises: detecting a first temperature of the electronic element; and controlling the fan of the peripheral element located around the electronic element when the first temperature exceeds the first upper temperature threshold to dissipate the heat from the electronic element.

Abstract: An extending device includes a first interface unit, at least one second interface unit and a control circuit. The first interface unit is coupled to controller, the at least one second interface unit is coupled to at least one memory, and the control circuit is coupled between the first interface unit and the at least one second interface unit. The first interface unit is configured to receive a control command sent by the controller. The control circuit is configured to interpret the control command, and to control the at least one second interface unit to execute a corresponding action according to the control command.

Abstract: The present disclosure provides a storage device for accelerating a booting procedure. The storage device includes a non-volatile storage medium, a volatile cache memory and a storage controller. The non-volatile storage medium stores booting data and is configured to output the booting data according to a read instruction. The storage controller is configured to store the booting data to the volatile cache memory by executing the following steps: reading a booting data table including non-physical addresses of the booting data; generating a read instruction according to the booting data table, in which the read instruction indicates the physical addresses of the booting data in the non-volatile storage medium; storing the booting data from the non-volatile storage medium to the volatile cache memory; and associating the non-physical addresses of the booting data with the cache addresses of the booting data in the volatile cache memory.

Abstract: A synchronous rectifier control circuit and the control method thereof for controlling a switching power supply which includes a transformer, a first switch transistor and a second switch transistor. According to one embodiment to the present invention, the control circuit comprises a conducting detection module, a voltage averaging module, a voltage-second balance module and a logic-controlled module. The conducting detection module is comprised of a first reference potential and a conduction signal. The voltage averaging module includes an averaged circuit and outputs a second reference potential. The voltage-second balance module includes a first reference current, a second reference current, a voltage-second balance switch, a voltage-second balance comparator and a timing capacitor, and outputs a reset signal. The logic-controlled module includes a logic circuit to control the second switch transistor to turn on or off.

Abstract: The present invention discloses a solid state drive (SSD) control device including: a multi-interface compatible physical layer circuit operable to generate a physical layer output signal according to a serializer/deserializer (SerDes) reception signal; an input/output (I/O) circuit operable to generate at least one terminal output signal according to signal variation of at least one terminal; and a processing circuit operable to make the solid state drive control device adapt to one of several interface types in accordance with the physical layer output signal and/or the at least one terminal output signal.