Abstract: A semiconductor package includes a first chip, an insulating protection layer, a second chip, a plurality of second conductive bumps and an underfill. The insulating protection layer is disposed on a first active surface of the first chip and includes a concave. Projections of a plurality of first inner pads and a plurality of first outer pads of the first chip projected on the insulating protection layer are located in the concave and out of the concave, respectively. The second chip is flipped on the concave and includes a plurality of second pads. Each of the first inner pads is electrically connected to the corresponding second pad through the corresponding second conductive bump. The underfill is disposed between the concave and the second chip and covers the second conductive bumps.

Abstract: In a method of manufacturing a semiconductor device, a first layer containing an amorphous first material is formed by a deposition process over a semiconductor layer. A second layer containing a metal second material is formed over the first layer. A thermal process is performed to form an alloy layer of the amorphous first material and the metal second material.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a fin structure over the semiconductor substrate. The semiconductor device structure also includes a gate stack over a portion of the fin structure, and the fin structure includes an intermediate portion under the gate stack and upper portions besides the intermediate portion. The semiconductor device structure further includes a contact layer over the fin structure. The contact layer includes a metal material, and the upper portions of the fin structure also include the metal material.

Abstract: A forming die with a flexible blank holder is provided. The forming die includes an upper die set, a lower die set, and a blank holder with a flexible pad. The upper die set has an upper die base and an upper die insert provided on the upper die base and has a cavity surface. The lower die set has a lower die base, an elastic member on the lower die base, and a lower die punch on the lower die base. Guide posts are provided between the upper die set and the lower die set to define relative positions of the two die sets. Through relative movement of the upper and the lower die sets, a blank placed on the blank holder there between is formed by forming. During the forming, the flexible pad is tightly pressed against the blank under the pressing force of the elastic member.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a first gate stack and a second gate stack over the semiconductor substrate. The semiconductor device structure also includes a first doped structure over the semiconductor substrate and adjacent to the first gate stack. The first doped structure includes a III-V compound semiconductor material and a dopant. The semiconductor device structure further includes a second doped structure over the semiconductor substrate and adjacent to the second gate stack. The second doped structure includes the III-V compound semiconductor material and the dopant. One of the first doped structure and the second doped structure is an n-type semiconductor structure, and the other one of the first doped structure and the second doped structure is a p-type semiconductor structure.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a first gate stack and a second gate stack over the semiconductor substrate. The semiconductor device structure also includes a first doped structure over the semiconductor substrate and adjacent to the first gate stack. The first doped structure includes a III-V compound semiconductor material and a dopant. The semiconductor device structure further includes a second doped structure over the semiconductor substrate and adjacent to the second gate stack. The second doped structure includes the III-V compound semiconductor material and the dopant. One of the first doped structure and the second doped structure is an n-type semiconductor structure, and the other one of the first doped structure and the second doped structure is a p-type semiconductor structure.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a fin structure over the semiconductor substrate. The semiconductor device structure also includes a gate stack over a portion of the fin structure, and the fin structure includes an intermediate portion under the gate stack and upper portions besides the intermediate portion. The semiconductor device structure further includes a contact layer over the fin structure. The contact layer includes a metal material, and the upper portions of the fin structure also include the metal material.

Abstract: A drawing die provided with a slant blank clamping surface, where the drawing die includes a lower die base, a lower die secured on the lower die base, an upper die base, a punch fixing plate secured on the upper die base, a punch secured on the punch fixing plate, where the punch is capable of moving relative to the lower die, and a blank holder capable of moving relative to and in parallel with the punch fixing plate, where a blank pressing surface facing the lower die of the blank holder is provided with a slant surface and/or a lower die surface facing the blank holder of the lower die is provided with a slant surface.

Abstract: A resin composition for optical lenses and optical packaging includes (1) 1 to 99.99 wt % mixture of epoxy, siloxane and epoxy-siloxane copolymers, (2) 0.01 to 5 wt % catalyst and (3) 0 to 40 wt % curing agent. The mixture of epoxy, siloxane and epoxy-siloxane copolymers includes (1) 1 to 85 wt % epoxy and siloxane oligomers, based on total weight of the mixture; (2) 1 to 90 wt % siloxane containing at least one alkoxy group, based on total weight of the mixture; (3) 1 to 80 wt % a epoxy resin having a benzene ring with at least one epoxy group or a hydrogenated benzene ring, or aliphatic epoxy resin, based on total weight of the mixture; (4) 1 to 70 wt % epoxy resin containing at least one hydroxyl group and at least an epoxy group, based on total weight of the mixture.

Abstract: The present invention relates to the use of microwave-assisted technology for shortening the fabrication and detection time of protein array. After printing the proteins on a surface-treated aldehyde slide by an arrayer, the proteins are rapidly fixed on the surface of the slide by heating of microwave irradiation. As for the prevention of the appearance of non-specific signal from the backgrounds, the protein array is then blocked with skim milk buffer solution by heating with microwave irradiation, and a fast detection result of the protein array with high sensitivity will be obtained. Also, the present invention of the method of microwave-assisted technology for decreasing fabrication and detection time of the protein array is used as a full automatic protein array system.