Patents by Inventor Cheng Yu

Cheng Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250087592
    Abstract: A package structure includes a first bonding film on a first package component and a first alignment mark in the first bonding film. The first alignment mark includes a plurality of first patterns spaced apart from each other. The package structure includes a second bonding film on a second package component and bonded to the first bonding film, and a second alignment mark in the second bonding film. The second alignment mark includes a plurality of second patterns spaced apart from each other, and the first patterns overlap the second patterns. In this case, an interference pattern can be formed by the optical signal passing through the varying spacing between the gratings of top wafer and bottom wafer due to pitch difference between first pitch and second pitch. By reading the optical signal, the resolution of overlay (misalignment) measurement is improved.
    Type: Application
    Filed: September 11, 2023
    Publication date: March 13, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Geng-Ming CHANG, Kewei ZUO, Tzu-Cheng LIN, Chih-Hang TUNG, Wen-Chih CHIOU, Wen-Yao CHANG, Chen-Hua YU
  • Publication number: 20250089393
    Abstract: Various embodiments of the present application are directed to a narrow band filter with high transmission and an image sensor comprising the narrow band filter. In some embodiments, the filter comprises a first distributed Bragg reflector (DBR), a second DBR, a defect layer between the first and second DBRs, and a plurality of columnar structures. The columnar structures extend through the defect layer and have a refractive index different than a refractive index of the defect layer. The first and second DBRs define a low transmission band, and the defect layer defines a high transmission band dividing the low transmission band. The columnar structures shift the high transmission band towards lower or higher wavelengths depending upon a refractive index of the columnar structures and a fill factor of the columnar structures.
    Type: Application
    Filed: November 22, 2024
    Publication date: March 13, 2025
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Chien-Hsien Tseng, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Hau Wu
  • Publication number: 20250087652
    Abstract: A semiconductor package includes an interposer that has a first side and a second side opposing the first side. A semiconductor device that is on the first side of the interposer and an optical device that is on the first side of the interposer and next to the semiconductor device. A first encapsulant layer includes a first portion and a second portion. The first portion of the first encapsulant layer is on the first side of the interposer and along sidewalls of the semiconductor device. A gap is between a first sidewall of the optical device and a second sidewall of the first portion of the first encapsulant layer. A substrate is over the second side of the interposer. The semiconductor device and the optical device are electrically coupled to the substrate through the interposer.
    Type: Application
    Filed: January 5, 2024
    Publication date: March 13, 2025
    Inventors: Wei-Yu Chen, Cheng-Shiuan Wong, Chia-Shen Cheng, Hsuan-Ting Kuo, Hao-Jan Pei, Hsiu-Jen Lin, Mao-Yen Chang
  • Publication number: 20250088782
    Abstract: A cushion for a wearable device includes an outer cover layer and an inner cushion. The outer cover layer includes a first base material, a heat conducting material and a first heat storage material. The heat conducting material and the first heat storage material are dispersed in the first base material. The enthalpy value of the outer cover layer is less than or equal to 5 J/g. The inner cushion includes a second base material and a second heat storage material. The second heat storage material is dispersed in the second base material. The enthalpy value of the inner cushion is greater than that of the outer cover layer. The difference between the enthalpy value of the inner cushion and the enthalpy value of the outer cover layer is greater than 45 J/g.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 13, 2025
    Applicant: Merry Electronics(Shenzhen) Co., Ltd.
    Inventors: Ying Chen Cheng, Yu Lin Chu, Cheng Yu Tsai, Hsin-Chu Lin
  • Publication number: 20250089364
    Abstract: A integrated circuit includes a first, a second, a third, and a fourth gate, a first input pin and a first conductor. The first and third gate are on a first level. The second and fourth gate are on a second level. The second gate is coupled to the first gate. The fourth gate is coupled to the third gate. The first input pin extends in a second direction, is on a first metal layer above a front-side of a substrate, is coupled to the first gate, and configured to receive a first input signal. The first input pin is electrically coupled to the third gate by the first, second or fourth gate. The first conductor extends in the first direction, is on a second metal layer below a back-side of the substrate, and is coupled to the second and fourth gate.
    Type: Application
    Filed: September 11, 2023
    Publication date: March 13, 2025
    Inventors: Cheng-Ling WU, Chih-Liang CHEN, Chi-Yu LU, Yi-Yi CHEN, Ting-Yun WU
  • Patent number: 12249649
    Abstract: A semiconductor device includes a fin-shaped structure on the substrate, a shallow trench isolation (STI) around the fin-shaped structure, a single diffusion break (SDB) structure in the fin-shaped structure for dividing the fin-shaped structure into a first portion and a second portion; a first gate structure on the fin-shaped structure, a second gate structure on the STI, and a third gate structure on the SDB structure. Preferably, a width of the third gate structure is greater than a width of the second gate structure and each of the first gate structure, the second gate structure, and the third gate structure includes a U-shaped high-k dielectric layer, a U-shaped work function metal layer, and a low-resistance metal layer.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: March 11, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Han Wu, Hsin-Yu Chen, Chun-Hao Lin, Shou-Wei Hsieh, Chih-Ming Su, Yi-Ren Chen, Yuan-Ting Chuang
  • Patent number: 12249581
    Abstract: A semiconductor device has a conductive via laterally separated from the semiconductor, an encapsulant between the semiconductor device and the conductive via, and a mark. The mark is formed from characters that are either cross-free characters or else have a overlap count of less than two. In another embodiment the mark is formed using a wobble scan methodology. By forming marks as described, defects from the marking process may be reduced or eliminated.
    Type: Grant
    Filed: November 28, 2023
    Date of Patent: March 11, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jing-Cheng Lin, Chen-Hua Yu, Po-Hao Tsai
  • Publication number: 20250081735
    Abstract: Provided are a display panel and a display device. The display panel includes: a base substrate, including a plurality of light-emitting regions and a non-light-emitting region located between adjacent light-emitting regions; a pixel-defining layer, located on the base substrate and having a main body part and a plurality of openings defined by the main body part, each of the plurality openings being configured to define at least one of the plurality of light-emitting regions; a first structural layer at least located in one light-emitting region; a second structural layer at least located in the non-light-emitting region; the first structural layer has a first refractive index, the second structural layer has a second refractive index, and the first refractive index is greater than the second refractive index.
    Type: Application
    Filed: February 9, 2023
    Publication date: March 6, 2025
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Donghui Yu, Cheng Xu, Dandan Zhou
  • Publication number: 20250079075
    Abstract: Provided are a transformer winding and a method for constructing a transformer winding. The transformer winding includes: a winding conductor having a ring structure; a first insulating layer wrapped on a surface of the winding conductor formed by winding; a conductor tape attached in an unclosed surrounding manner to a surface of the first insulating layer along a circumferential direction of the first insulating layer, where the conductor tape is attached to a position having a minimum value of a leakage flux on the surface of the first insulating layer; a first shielding layer attached to the surface of the first insulating layer with the conductor tape attached thereto; a second insulating layer cast outside the first shielding layer; and a second shielding layer wrapped on an outer surface of the second insulating layer.
    Type: Application
    Filed: August 27, 2024
    Publication date: March 6, 2025
    Inventors: Jianxiong Yu, Cheng Luo, Jiajie Duan, Cheng Wang
  • Publication number: 20250076369
    Abstract: A minimum IC operating voltage searching method includes acquiring a corner type of an IC, acquiring ring oscillator data of the IC, generating a first prediction voltage according to the corner type and the ring oscillator data by using a training model, generating a second prediction voltage according to the ring oscillator data by using a non-linear regression approach under an N-ordered polynomial, and generating a predicted minimum IC operating voltage according to the first prediction voltage and the second prediction voltage. N is a positive integer.
    Type: Application
    Filed: April 16, 2024
    Publication date: March 6, 2025
    Applicant: MEDIATEK INC.
    Inventors: Ronald Kuo-Hua Ho, Kun-Yu Wang, Yen-Chang Shih, Sung-Te Chen, Cheng-Han Wu, Yi-Ying Liao, Chun-Ming Huang, Yen-Feng Lu, Ching-Yu Tsai, Tai-Lai Tung, Kuan-Fu Lin, Bo-Kang Lai, Yao-Syuan Lee, Tsyr-Rou Lin, Ming-Chao Tsai, Li-Hsuan Chiu
  • Publication number: 20250078150
    Abstract: Described herein are systems and methods that take advantage of a self-servicing mortgage engine that utilizes a language-model-based virtual assistant with access to knowledge databases, loan product databases, and underwriting databases. The mortgage engine integrates rules-based responses with the language model to analyze user input from conversations and provide context-aware interactive guidance, e.g., in the form of easy-to-understand explanations, instructions, and suggestions tailored to user questions. The interactive guidance generates recommendations and actionable outputs for borrowers that reduce the complexities of the lending process and drives the loan application. Advantageously, this increase efficiency and transparency to the borrower, while simultaneously reducing costs to lenders.
    Type: Application
    Filed: September 5, 2023
    Publication date: March 6, 2025
    Applicant: TidalWave Tech Inc.
    Inventors: Jiuqing Deng, Mai Hou, Cheng Li, Diane Yu
  • Publication number: 20250078151
    Abstract: Described herein are systems and methods that take advantage of a self-servicing mortgage engine that utilizes a language-model-based virtual assistant with access to knowledge databases, loan product databases, and underwriting databases. The mortgage engine integrates rules-based responses with the language model to analyze user input from conversations and provide context-aware interactive guidance, e.g., in the form of easy-to-understand explanations, instructions, and suggestions tailored to user questions. The interactive guidance generates recommendations and actionable outputs for borrowers that reduce the complexities of the lending process and drives the loan application. Advantageously, this increase efficiency and transparency for the borrower, while simultaneously reducing costs to lenders.
    Type: Application
    Filed: September 4, 2024
    Publication date: March 6, 2025
    Applicant: TidalWave Tech Inc.
    Inventors: Jiuqing Deng, Mai Hou, Cheng Li, Diane Yu
  • Publication number: 20250079852
    Abstract: A power adapter includes a flyback converter and a buck converter. If a first device is a preferred device, then power is allocated to the first device up to a first value. If a second device is plugged in, then power is re-allocating to the first device up to a second value and up to a third value to the second device. A total of the second value and the third value is up to the first value.
    Type: Application
    Filed: September 6, 2023
    Publication date: March 6, 2025
    Inventors: Tsung-Cheng Liao, Wei-Cheng Yu, Merle Jackson Wood III, Chin Jui Liu, Tun-Chieh Liang, Chi-Che Wu
  • Patent number: 12240736
    Abstract: Provided is a construction method for a fully prefabricated multi-story concrete plant, the construction method may achieve full coverage of a hoisting operation of the large beam and column prefabricated components of a floor by employing a single intelligent hoisting robot, an angle change of the track devices, an angle change of a moving device, and a self-lifting device. It is not necessary to arrange a transition track at the turn of the installation route, which saves space and installation cost, and overcomes the disadvantage of high cost caused by the traditional prefabricated construction mode of multi-story concrete plant, which needs to arrange a plurality of large hoisting equipment. It may achieve the mechanization and intelligence of the whole construction process of the fully prefabricated multi-story concrete plant.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: March 4, 2025
    Assignees: GMC GRAND-BAY INTELLIGENT MANUFACTURING AND TECHNOLOGY CO., LTD., GUANGZHOU WU YANG CONSTRUCTION MACHINERY CO., LTD.
    Inventors: Long Wang, Zhenying Chen, Wenshen Zhong, Zhen Yu, Jiali Cao, Tao He, Cheng Li, Yafei Zhang
  • Patent number: 12243438
    Abstract: A computer processing system is provided for enhancing video-based language learning. The system includes a video server for storing videos that use one or more languages to be learned. The system further includes a video metadata database for storing translations of sentences uttered in the videos, character profiles of characters appearing in the videos, and mappings between the sentences and a learner profile. The system also includes a learner profile database for storing learner profiles. The system additionally includes a semantic analyzer and matching engine for finding, for at least a given video and a given learner, alternative sentences for and responsive to the translations of the sentences uttered in the given video that conflict with a respective learner profile for the given learner. The computer processing system further includes a presentation system for playing back the given video and providing the alternative sentences to the given learner.
    Type: Grant
    Filed: August 16, 2023
    Date of Patent: March 4, 2025
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: I-Hsiang Liao, Cheng-Yu Yu, Chih-Yuan Lin, Yu-Ning Hsu
  • Publication number: 20250072065
    Abstract: A device includes: a substrate; a stack of semiconductor channels on the substrate; a gate structure wrapping around the semiconductor channels; a source/drain region abutting the semiconductor channels; and a hybrid structure between the source/drain region and the substrate. The hybrid structure includes: a first semiconductor layer under the source/drain region; and an isolation region extending vertically from an upper surface of the first semiconductor layer to a level above a bottom surface of the first semiconductor layer.
    Type: Application
    Filed: January 5, 2024
    Publication date: February 27, 2025
    Inventors: Jung-Hung CHANG, Shih-Cheng CHEN, Chia-Hao YU, Chia-Cheng TSAI, Kuo-Cheng CHIANG, Chih-Hao WANG
  • Publication number: 20250071944
    Abstract: A uniform temperature plate comprises a first plate, a second plate, and a braided wire. The second plate is enclosed with the first plate to form a containing cavity. The containing cavity is filled with working liquid. The containing cavity comprises an evaporation zone and a condensation zone. The braided wire has a capillary structure is arranged in the containing cavity. A first end of the braided wire is arranged in the evaporation zone. A second end of the braided wire is arranged in the condensation zone. Through the capillary structure of the braided wire, the evaporating and re-cooling working liquid can be diverted to the evaporation zone quickly, so as to avoid water accumulated in the uniform temperature plate, improve the reflux efficiency and the temperature uniform performance of the uniform temperature plate. An electronic equipment is also provided.
    Type: Application
    Filed: April 7, 2024
    Publication date: February 27, 2025
    Inventors: MING-YU XIAO, CHENG-HUI LIN
  • Publication number: 20250072135
    Abstract: A semiconductor device, and method of fabricating the same, includes a first substrate, the first substrate including at least one visible light photosensor disposed between a first side and a second side of the first substrate, a second substrate including an infrared light photosensor disposed between a second side of the second substrate and a first side of the second substrate, and a metalens disposed between the visible light photosensor and the infrared light photosensor, the metalens configured to focus infrared light impinging on a surface of the first substrate onto the infrared light photosensor.
    Type: Application
    Filed: August 25, 2023
    Publication date: February 27, 2025
    Inventors: Hsiang-Lin Chen, Yi-Shin Chu, Cheng-Yu Huang, Wei-Chieh Chiang, Dun-Nian Yaung
  • Publication number: 20250072007
    Abstract: A MRAM layout structure with multiple unit cells, including a first word line, a second word line and a third word line extending through active areas, wherein two ends of a first MTJ are connected respectively to a second active area and one end of a second MTJ, and two ends of a third MTJ are connected respectively to a third active area and one end of a fourth MTJ, and a first bit line and a second bit line connected respectively to the other end of the second MTJ and the other end of the fourth MTJ.
    Type: Application
    Filed: November 13, 2024
    Publication date: February 27, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Ting Wu, Cheng-Tung Huang, Jen-Yu Wang, Yung-Ching Hsieh, Po-Chun Yang, Jian-Jhong Chen, Bo-Chang Li
  • Publication number: 20250067781
    Abstract: A voltage meter includes a sampler, a gain circuit, an accumulator and a feedback circuit. The sampler samples an input signal to generate a series of first signals and a series of second signals. The gain circuit, coupled to the sampler, modifies at least one of the series of first signals and the series of second signals, to generate a series of modified first signals and a series of modified second signals. The accumulator, coupled to the gain circuit, accumulates an operational result of the series of modified first signals and the series of modified second signals, to generate an accumulation result. The feedback circuit, coupled between the accumulator and the sampler, sends a feedback signal back to the sampler according to the accumulation result.
    Type: Application
    Filed: August 24, 2023
    Publication date: February 27, 2025
    Applicant: NOVATEK Microelectronics Corp.
    Inventors: Cheng-Yu Liu, Chiao-Wei Hsiao