Abstract: The present disclosure provides an antenna device including a ground plane, a plurality of omni-directional antennas connected to the ground plane, a directional antenna connected to the ground plane, and a wall structure including a metal and connected to the ground plane, the wall structure surrounding the directional antenna and disposed between the directional antenna and the plurality of omni-directional antennas

Abstract: The present disclosure relates to a resistive random access memory (RRAM) device. In some embodiments, the RRAM device includes a first electrode disposed over a substrate and a second electrode over the first electrode. A doped data storage structure is disposed between the first electrode and the second electrode. The doped data storage structure has a dopant with a doping concentration profile that is asymmetric over a height of the doped data storage structure and that has a maximum dopant concentration at non-zero distances from a top surface and a bottom surface of the doped data storage structure.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure includes a first substrate having a first horizontally extending surface and a second horizontally extending surface above the first horizontally extending surface as viewed in a cross-sectional view. The first horizontally extending surface continuously wraps around an outermost perimeter of the second horizontally extending surface in a closed loop as viewed in a plan-view. A second substrate is disposed over the first substrate and includes a third horizontally extending surface above the second horizontally extending surface as viewed in the cross-sectional view. The second horizontally extending surface continuously wraps around an outermost perimeter of the third horizontally extending surface in a closed loop as viewed in the plan-view.

Abstract: Method, system, device, and non-transitory computer-readable medium for joining a virtual participant in a conversation. In some examples, a computer-implemented method includes: identifying a first conversation scheduled to be participated by a first group of actual participants; joining a first virtual participant into the first conversation; obtaining, via the first virtual participant, a first set of audio data associated with the first conversation while the first conversation occurs; transcribing, via the first virtual participant, the first set of audio data into a first set of text data while the first conversation occurs; and presenting the first set of text data to the first group of actual participants while the first conversation occurs.

Abstract: Some embodiments relate to a semiconductor structure. The semiconductor structure includes a conductive structure over a semiconductor substrate. A first dielectric layer is over the conductive structure. A second dielectric layer is over the first dielectric layer. An interconnect structure is over the conductive structure and disposed in the first and second dielectric layers. The interconnect structure has a protrusion in direct contact with a sidewall of the conductive structure. The interconnect structure comprises an interconnect liner surrounding a conductive interconnect body. A sidewall spacer is disposed on the sidewall of the conductive structure.

Abstract: The present disclosure relates to a semiconductor wafer structure including a semiconductor substrate and a plurality of semiconductor devices disposed along the semiconductor substrate. A dielectric stack including a plurality of dielectric layers is arranged over the semiconductor substrate. A conductive interconnect structure is within the dielectric stack. A seal ring layer is over the dielectric stack and laterally surrounds the dielectric stack along a first sidewall of the dielectric stack. The seal ring layer includes a first protrusion that extends into a first trench in the semiconductor substrate.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor having a semiconductor substrate comprising a front-side surface opposite a back-side surface. A plurality of photodetectors is disposed in the semiconductor substrate. An isolation structure extends into the back-side surface of the semiconductor substrate and is disposed between adjacent photodetectors. The isolation structure includes a metal core, a conductive liner disposed between the semiconductor substrate and the metal core, and a first dielectric liner disposed between the conductive liner and the semiconductor substrate. The metal core comprises a first metal material and the conductive liner comprises the first metal material and a second metal material different from the first metal material.

Abstract: A semiconductor device package includes a carrier, an emitting element and a first package body. The carrier includes a first surface and a second surface opposite to the first surface. The emitting element is disposed on the first surface of the carrier. The first package body is disposed over the first surface of the carrier and spaced apart from the first surface of the carrier.

Abstract: An exchangeable in-pipe power generating device includes a pipe unit, a base unit, and a power generating unit. The pipe unit includes a pipe body extending along a pipe axial direction, and an opening disposed on the pipe body and extending along the pipe axial direction. The base unit includes a first base portion extending along the pipe axial direction, disposed in the pipe body, and adjacent to the opening. The power generating unit includes a plurality of power generators disposed on the first base portion and spaced apart from one another along the pipe axial direction. Each of the power generators includes a blade module rotatable about a blade axis, and a power converting module driven by the blade module to convert kinetic energy into electrical energy. The blade axis of each of the power generators cooperates with the pipe axial direction to form an acute angle.

Abstract: A thin-film deposition system includes a top plate positioned above a wafer and configured to generate a plasma during a thin-film deposition process. The system includes a gap sensor configured to generate sensor signals indicative of a gap between the wafer and the top plate. The system includes a control system configured to adjust the gap during the thin-film deposition process responsive to the sensor signals.

Abstract: A tandem solar cell and a method of manufacturing the same are provided. The tandem solar cell includes a bottom solar cell, a silicon suboxide thin film disposed over the bottom solar cell, a transparent conductive thin film disposed over the silicon suboxide thin film, and a top solar cell disposed on the transparent conductive thin film and series connected to the bottom solar cell. The silicon suboxide thin film has a refractive index of 2.0 to 3.5 for a visible light with a wavelength of 700 nm to 750 nm, and the transparent conductive thin film has a refractive index of 1.7 to 2.1 for the visible light with the wavelength of 700 nm to 750 nm. The tandem solar cell can achieve better optical matching and increase conversion efficiency.

Abstract: The present disclosure, in some embodiments, relates to a method of forming an integrated chip structure. The method may be performed by forming a plurality of interconnect layers within a first interconnect structure disposed over an upper surface of a first semiconductor substrate. An edge trimming process is performed to remove parts of the first interconnect structure and the first semiconductor substrate along a perimeter of the first semiconductor substrate. The edge trimming process results in the first semiconductor substrate having a recessed surface coupled to the upper surface by way of an interior sidewall disposed directly over the first semiconductor substrate. A dielectric capping structure is formed onto a sidewall of the first interconnect structure after performing the edge trimming process.

Abstract: The present disclosure describes an interconnect structure and a method forming the same. The interconnect structure can include a substrate, a layer of conductive material over the substrate, a metallic capping layer over the layer of conductive material, a layer of insulating material over top and side surfaces of the metallic capping layer, and a layer of trench conductor formed in the layer of insulating material and the metallic capping layer.

Abstract: The application discloses a method, apparatus and system for scanning an animal. The method includes obtaining a species of an animal to be scanned, identifying a type of an animal cabin where the animal to be scanned is located, and determining whether the species of the animal to be scanned matches the type of the animal cabin, determining and presenting a corresponding scanning protocol that matches the species of the animal to be scanned if the species of the animal to be scanned matches the type of the animal cabin, and perform a scan according to the corresponding scanning protocol, or according to a user-defined scanning protocol.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a substrate having an image sensor region arranged between sidewalls of the substrate that form one or more trenches. One or more dielectric materials are arranged along the sidewalls of the substrate that form the one or more trenches. A reflective region is disposed within the one or more trenches and laterally surrounded by the one or more dielectric materials. The reflective region includes a plurality of reflective portions that are arranged at different vertical positions within the reflective region and that have different reflective properties.

Abstract: Provided are an integrated circuit (IC) and a method of forming the same. The IC includes a substrate; a conductive layer, disposed on the substrate; a barrier layer, disposed on the conductive layer; an etching stop layer, covering a sidewall of the barrier layer and extending on a first portion of a top surface of the barrier layer; and at least one capacitor structure, disposed on a second portion of the top surface of the barrier layer.

Abstract: Some embodiments relate to a method for forming an integrated chip. The method includes forming a bottom electrode over a substrate. A data storage layer is formed on the bottom electrode. A diffusion barrier layer is formed over the data storage layer. The diffusion barrier layer has a first diffusion activation temperature. A top electrode is formed over the diffusion barrier layer. The top electrode has a second diffusion activation temperature less than the first diffusion activation temperature.

Abstract: A chemical mechanical polishing composition for polishing tungsten or molybdenum comprises, consists essentially of, or consists of a water based liquid carrier, abrasive particles dispersed in the liquid carrier, an amino acid selected from the group consisting of arginine, histidine, cysteine, lysine, and mixtures thereof, an anionic polymer or an anionic surfactant, and an optional amino acid surfactant. A method for chemical mechanical polishing a substrate including a tungsten layer or a molybdenum layer includes contacting the substrate with the above described polishing composition, moving the polishing composition relative to the substrate, and abrading the substrate to remove a portion of the tungsten layer or the molybdenum layer from the substrate and thereby polish the substrate.

Abstract: A computing system having a memory component with an embedded media controller. The memory component is encapsulated within an integrated circuit (IC) package. The embedded controller within the IC package is configured to: receive incoming packets, via a serial communication interface of the controller, from a serial connection outside of the IC package; convert the incoming packets into commands and addresses according to a predetermined serial communication protocol; operate memory units encapsulated within the IC package according to the commands and the addresses; convert results of at least a portion of the commands into outgoing packets; and transmit the outgoing packets via the serial communication interface to the serial connection outside of the IC package.

Abstract: Disclosed is a pluggable gun holster assembly, including a gun body, a holster body and a limiting device. The gun body includes a gun head and a trigger part, and the gun head has a muzzle. An accommodating groove is formed between the trigger part and the gun head. The holster body includes an accommodating space and a hole. The accommodating space is configured through both ends of the holster body, and the hole is located on one side of the accommodating space. The limiting device is disposed in the hole, and the limiting device includes a buffer block extending from the hole to the accommodating space.