Patents by Inventor Cheng-Yuan KUNG

Cheng-Yuan KUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11935841
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a device package and a shielding layer. The device package includes an electronic device unit and has a first surface, a second surface opposite to the first surface, and a third surface connecting the first surface to the second surface. The shielding layer is disposed on the first surface and the second surface of the device package. A common edge of the second surface and the third surface includes a first portion exposed from the shielding layer by a first length, and a common edge of the first surface and the third surface includes a second portion exposed from the shielding layer by a second length that is different from the first length.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: March 19, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Hung-Yi Lin, Meng-Wei Hsieh, Yu-Pin Tsai
  • Patent number: 11923825
    Abstract: A semiconductor device and a method of manufacturing a semiconductor device are provided. The semiconductor device includes a carrier, an element, and a first electronic component. The element is disposed on the carrier. The first electronic component is disposed above the element. The element is configured to adjust a first bandwidth of a first signal transmitted from the first electronic component.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: March 5, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Meng-Wei Hsieh
  • Publication number: 20230420395
    Abstract: The present disclosure provides an electronic device. The electronic device includes a first electronic component and a second electronic component. The first electronic component is configured to receive a radio frequency (RF) signal and amplify a power of the RF signal. The second electronic component is disposed under the first electronic component. The second electronic component includes an interconnection structure passing through the second electronic component. The interconnection structure is configured to provide a path for a transmission of the RF signal.
    Type: Application
    Filed: June 22, 2022
    Publication date: December 28, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wei-Cheng LIN, Hung-Yi LIN, Cheng-Yuan KUNG, Hsu-Chiang SHIH, Cheng-Yu HO
  • Publication number: 20230403078
    Abstract: A system including optical devices is provided. The system includes a first substrate and a first device for optical communication. The first device has a first surface, a second surface opposite to the first surface, and a first side contiguous with the first surface and the second surface. Moreover, the first side is smaller than one of the first surface and the second surface in terms of area. The first device is attached at the first side thereof to the first substrate.
    Type: Application
    Filed: August 8, 2023
    Publication date: December 14, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chang-Yu LIN, Cheng-Yuan KUNG, Hung-Yi LIN
  • Patent number: 11798890
    Abstract: An assembly structure includes a core-computing section and a sub-computing section. The core-computing section has a first surface and a second surface opposite to the first surface. The core-computing section includes at least one conductive via electrically connecting the first surface and the second surface. The sub-computing section has a first surface stacked on the first surface of the core-computing section and a second surface opposite to the first surface. The sub-computing section includes at least one conductive via electrically connecting the first surface and the second surface. The assembly structure includes a first signal transmission path and a second signal transmission path. The first signal transmission path is between the at least one conductive via of the sub-computing section and the at least one conductive via of the core-computing section.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: October 24, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Hung-Yi Lin
  • Publication number: 20230326861
    Abstract: An electronic package is provided. The electronic package includes a first processing component, a second processing component, and a first memory unit. The first memory unit is over the first processing component and the second processing component. The first processing component and the second processing component are configured to access data stored in the first memory unit.
    Type: Application
    Filed: April 7, 2022
    Publication date: October 12, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hung-Yi LIN, Cheng-Yuan KUNG
  • Publication number: 20230326889
    Abstract: An electronic package is provided. The electronic package includes a processing component and a memory unit. The processing component has a side including a first region and a second region distinct from the first region. The memory unit is disposed over the first region. The first region is configured to provide interconnection between the processing component and the memory unit, and the second region is configured to provide external connection.
    Type: Application
    Filed: April 7, 2022
    Publication date: October 12, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hung-Yi Lin, Cheng-Yuan Kung
  • Patent number: 11784111
    Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a semiconductor substrate, at least one conductive via, a second insulation layer and a conductive layer. The conductive via is disposed in the semiconductor substrate and includes an interconnection metal and a first insulation layer around the interconnection metal. A portion of the first insulation layer defines an opening to expose the interconnection metal. The second insulation layer is disposed on a surface of the semiconductor substrate and in the opening. The conductive layer is electrically disconnected with the semiconductor substrate by the second insulation layer and electrically connected to the interconnection metal of the at least one conductive via.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: October 10, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Hung-Yi Lin, Chin-Cheng Kuo, Wu Chou Hsu
  • Patent number: 11756896
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes an electronic component, a conductive contact, and a first shielding layer. The electronic component has a first surface, a lateral surface angled with the first surface, and a second surface opposite to the first surface. The conductive contact is connected to the first surface of the electronic component. The first shielding layer is disposed on the lateral surface of the electronic component and a portion of the first surface of the electronic component. The first shielding layer contacts the conductive contact.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: September 12, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Meng-Wei Hsieh
  • Patent number: 11722220
    Abstract: A system including optical devices is provided. The system includes a first substrate and a first device for optical communication. The first device has a first surface, a second surface opposite to the first surface, and a first side contiguous with the first surface and the second surface. Moreover, the first side is smaller than one of the first surface and the second surface in terms of area. The first device is attached at the first side thereof to the first substrate.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: August 8, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chang-Yu Lin, Cheng-Yuan Kung, Hung-Yi Lin
  • Publication number: 20230215822
    Abstract: An electronic package is provided. The electronic package includes an amplifier component, a control component, and a first circuit layer. The control component is disposed above the amplifier component. The first circuit layer is disposed between the amplifier component and the control component. The control component is configured to transmit a first signal to the amplifier component and to output a second signal amplified by the amplifier component.
    Type: Application
    Filed: December 30, 2021
    Publication date: July 6, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Meng-Wei HSIEH, Hung-Yi LIN, Hsu-Chiang SHIH, Cheng-Yuan KUNG
  • Publication number: 20230215816
    Abstract: A package structure includes an encapsulant, a patterned circuit structure, at least one electronic component and a shrinkage modifier. The patterned circuit structure is disposed on the encapsulant and includes a pad. The electronic component is disposed on the patterned circuit structure, and includes a bump electrically connected to the pad. The shrinkage modifier is encapsulated in the encapsulant and configured to reduce a relative displacement between the bump and the pad along a horizontal direction in an environment of temperature variation.
    Type: Application
    Filed: December 30, 2021
    Publication date: July 6, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yuan KUNG, Hsu-Chiang SHIH, Hung-Yi LIN, Chien-Mei HUANG
  • Publication number: 20230207729
    Abstract: A semiconductor device package includes a carrier, an emitting element and a first package body. The carrier includes a first surface and a second surface opposite to the first surface. The emitting element is disposed on the first surface of the carrier. The first package body is disposed over the first surface of the carrier and spaced apart from the first surface of the carrier.
    Type: Application
    Filed: February 28, 2023
    Publication date: June 29, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tang-Yuan CHEN, Meng-Wei HSIEH, Cheng-Yuan KUNG
  • Publication number: 20230077877
    Abstract: A photonic package and a method of manufacturing a photonic package are provided. The photonic package includes a carrier, an electronic component, and a photonic component. The carrier has a first surface and a recess portion exposed from the first surface. The electronic component is disposed in recessed portion. The photonic component is disposed on and electrically connected to the electronic component and is configured to communicate optical signals.
    Type: Application
    Filed: September 10, 2021
    Publication date: March 16, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yuan KUNG, Hung-Yi LIN
  • Publication number: 20230078564
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a device package and a shielding layer. The device package includes an electronic device unit and has a first surface, a second surface opposite to the first surface, and a third surface connecting the first surface to the second surface. The shielding layer is disposed on the first surface and the second surface of the device package. A common edge of the second surface and the third surface includes a first portion exposed from the shielding layer by a first length, and a common edge of the first surface and the third surface includes a second portion exposed from the shielding layer by a second length that is different from the first length.
    Type: Application
    Filed: November 18, 2022
    Publication date: March 16, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yuan KUNG, Hung-Yi LIN, Meng-Wei HSIEH, Yu-Pin TSAI
  • Publication number: 20230075336
    Abstract: A semiconductor package structure includes a plurality of transducer devices, a cap structure, at least one redistribution layer (RDL) and a protection material. The transducer devices are disposed side by side. Each of the transducer devices has at least one transducing region, and includes a die body and at least one transducing element. The die body has a first surface and a second surface opposite to the first surface. The transducing region is disposed adjacent to the first surface of the die body. The transducing element is disposed adjacent to the first surface of the die body and within the transducing region. The cap structure covers the transducing region of the transducer device to form an enclosed space. The redistribution layer (RDL) electrically connects the transducer devices. The protection material covers the transducer devices.
    Type: Application
    Filed: November 15, 2022
    Publication date: March 9, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chien-Hua CHEN, Cheng-Yuan KUNG
  • Publication number: 20230065615
    Abstract: An electronic device includes a first electronic component, an encapsulant and a second electronic component. The encapsulant encapsulates the first electronic component. The second electronic component is disposed over the first electronic component and separated from the encapsulant. The second electronic component is configured to receive a power from the first electronic component.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yuan KUNG, Hung-Yi LIN
  • Patent number: 11594660
    Abstract: A semiconductor device package includes a carrier, an emitting element and a first package body. The carrier includes a first surface and a second surface opposite to the first surface. The emitting element is disposed on the first surface of the carrier. The first package body is disposed over the first surface of the carrier and spaced apart from the first surface of the carrier.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: February 28, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Tang-Yuan Chen, Meng-Wei Hsieh, Cheng-Yuan Kung
  • Publication number: 20230024293
    Abstract: A semiconductor device and a method of manufacturing a semiconductor device are provided. The semiconductor device includes a carrier, an element, and a first electronic component. The element is disposed on the carrier. The first electronic component is disposed above the element. The element is configured to adjust a first bandwidth of a first signal transmitted from the first electronic component.
    Type: Application
    Filed: July 22, 2021
    Publication date: January 26, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yuan KUNG, Meng-Wei HSIEH
  • Patent number: 11545427
    Abstract: A capacitor bank structure includes a plurality of capacitors, a protection material, a first dielectric layer and a plurality of first pillars. The capacitors are disposed side by side. Each of the capacitors has a first surface and a second surface opposite to the first surface, and includes a plurality of first electrodes and a plurality of second electrodes. The first electrodes are disposed adjacent to the first surface for external connection, and the second electrodes are disposed adjacent to the second surface for external connection. The protection material covers the capacitors, sidewalls of the first electrodes and sidewalls of the second electrodes, and has a first surface corresponding to the first surface of the capacitor and a second surface corresponding to the second surface of the capacitor. The first dielectric layer is disposed on the first surface of the protection material, and defines a plurality of openings to expose the first electrodes.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: January 3, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Yuan Kung, Chien-Hua Chen, Teck-Chong Lee, Hung-Yi Lin, Pao-Nan Lee, Hsin Hsiang Wang, Min-Tzu Hsu, Po-Hao Chen