Patents by Inventor Cheng-Yuan Wu

Cheng-Yuan Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250060879
    Abstract: A computing system having a memory component with an embedded media controller. The memory component is encapsulated within an integrated circuit (IC) package. The embedded controller within the IC package is configured to: receive incoming packets, via a serial communication interface of the controller, from a serial connection outside of the IC package; convert the incoming packets into commands and addresses according to a predetermined serial communication protocol; operate memory units encapsulated within the IC package according to the commands and the addresses; convert results of at least a portion of the commands into outgoing packets; and transmit the outgoing packets via the serial communication interface to the serial connection outside of the IC package.
    Type: Application
    Filed: November 1, 2024
    Publication date: February 20, 2025
    Inventors: Samir Mittal, Gurpreet Anand, Ying Yu Tai, Cheng Yuan Wu
  • Patent number: 12135876
    Abstract: A computing system having a memory component with an embedded media controller. The memory component is encapsulated within an integrated circuit (IC) package. The embedded controller within the IC package is configured to: receive incoming packets, via a serial communication interface of the controller, from a serial connection outside of the IC package; convert the incoming packets into commands and addresses according to a predetermined serial communication protocol; operate memory units encapsulated within the IC package according to the commands and the addresses; convert results of at least a portion of the commands into outgoing packets; and transmit the outgoing packets via the serial communication interface to the serial connection outside of the IC package.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: November 5, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Samir Mittal, Gurpreet Anand, Ying Yu Tai, Cheng Yuan Wu
  • Patent number: 11869618
    Abstract: A sequencer component residing in a first package receives data from a controller residing in a second package that is different than the first package including the sequencer component. The sequencer component performs an error correction operation on the data received from the controller. The error correction operation encodes the data with additional data to generate a code word. The sequencer component stores the code word at a memory device.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Samir Mittal, Ying Yu Tai, Cheng Yuan Wu, Jiangli Zhu
  • Patent number: 11675714
    Abstract: An instruction can be received at a sequencer from a controller. The sequencer can be in a package including the sequencer and one or more memory components. The sequencer is operatively coupled to a controller that is separate from the package. A processing device of the sequencer can perform an operation based on the instruction on at least one of the one or more memory components in the package.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: June 13, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Samir Mittal, Ying Yu Tai, Cheng Yuan Wu
  • Patent number: 11669275
    Abstract: A host operation to be performed can be received. Sub-operations that are associated with the received host operation can be determined. A memory component of multiple memory components can be identified for each sub-operation. Furthermore, each sub-operation can be transmitted to a media sequencer component that is associated with a respective memory component of the memory components.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: June 6, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Jiangli Zhu, Cheng Yuan Wu, Ying Yu Tai
  • Patent number: 11567817
    Abstract: A processing device can determine a configuration parameter based on a memory type of a memory component that is managed by a memory system controller. The processing device can receive data from a host system. The processing device can generate, by performing a memory operation using the configuration parameter, an instruction based on the data. The processing device can identify a sequencer of a plurality of sequencers that are collocated, within a single package external to the memory system controller, wherein each sequencer of the plurality of sequencers interfaces with a respective memory component. The processing device can send the instruction to the sequencer.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: January 31, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Samir Mittal, Ying Yu Tai, Cheng Yuan Wu
  • Patent number: 11526395
    Abstract: A read operation to retrieve data stored at a memory device is performed. Whether the data retrieved from the memory device includes an error that is not correctable is determined. Responsive to determining that the data retrieved from the memory device comprises the error that is not correctable, a buffer in a data path along which a write operation was performed to write the data at the memory device is searched for the data.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: December 13, 2022
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Wei Wang, Jiangli Zhu, Ying Yu Tai, Ning Chen, Zhengang Chen, Cheng Yuan Wu
  • Publication number: 20210365391
    Abstract: An instruction can be received at a sequencer from a controller. The sequencer can be in a package including the sequencer and one or more memory components. The sequencer is operatively coupled to a controller that is separate from the package. A processing device of the sequencer can perform an operation based on the instruction on at least one of the one or more memory components in the package.
    Type: Application
    Filed: August 2, 2021
    Publication date: November 25, 2021
    Inventors: Samir Mittal, Ying Yu Tai, Cheng Yuan Wu
  • Publication number: 20210286665
    Abstract: A processing device can determine a configuration parameter based on a memory type of a memory component that is managed by a memory system controller. The processing device can receive data from a host system. The processing device can generate, by performing a memory operation using the configuration parameter, an instruction based on the data. The processing device can identify a sequencer of a plurality of sequencers that are collocated, within a single package external to the memory system controller, wherein each sequencer of the plurality of sequencers interfaces with a respective memory component. The processing device can send the instruction to the sequencer.
    Type: Application
    Filed: June 1, 2021
    Publication date: September 16, 2021
    Inventors: Samir Mittal, Ying Yu Tai, Cheng Yuan Wu
  • Patent number: 11080210
    Abstract: An instruction can be received at a sequencer from a controller. The sequencer can be in a package including the sequencer and one or more memory components. The sequencer is operatively coupled to a controller that is separate from the package. A processing device of the sequencer can perform an operation based on the instruction on at least one of the one or more memory components in the package.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: August 3, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Samir Mittal, Ying Yu Tai, Cheng Yuan Wu
  • Publication number: 20210233601
    Abstract: A sequencer component residing in a first package receives data from a controller residing in a second package that is different than the first package including the sequencer component. The sequencer component performs an error correction operation on the data received from the controller. The error correction operation encodes the data with additional data to generate a code word. The sequencer component stores the code word at a memory device.
    Type: Application
    Filed: April 16, 2021
    Publication date: July 29, 2021
    Inventors: Samir Mittal, Ying Yu Tai, Cheng Yuan Wu, Jiangli Zhu
  • Patent number: 11061751
    Abstract: A processing device can determine a configuration parameter to be used in an error correction code (ECC) operation. The configuration parameter is based on a memory type of a memory component that is associated with a controller. Data can be received from a host system. The processing device can generate a code word for the data by using the ECC operation that is based on the configuration parameter. The code word can be sent to a sequencer that is external to the controller.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: July 13, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Samir Mittal, Ying Yu Tai, Cheng Yuan Wu
  • Publication number: 20210208820
    Abstract: A host operation to be performed can be received. Sub-operations that are associated with the received host operation can be determined. A memory component of multiple memory components can be identified for each sub-operation. Furthermore, each sub-operation can be transmitted to a media sequencer component that is associated with a respective memory component of the memory components.
    Type: Application
    Filed: March 23, 2021
    Publication date: July 8, 2021
    Inventors: Jiangli Zhu, Cheng Yuan Wu, Ying Yu Tai
  • Patent number: 10991445
    Abstract: A processing device of a sequencer component can receive data from a controller that is external to the sequencer component. The processing device of the sequencer component can perform an error correction operation on the data received from the controller that is external to the sequencer component to generate a code word associated with the data. The code word can be stored at a memory component coupled with the sequencer component.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: April 27, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Samir Mittal, Ying Yu Tai, Cheng Yuan Wu, Jiangli Zhu
  • Patent number: 10983724
    Abstract: A host operation to be performed can be received. Sub-operations that are associated with the received host operation can be determined. A memory component of multiple memory components can be identified for each sub-operation. Furthermore, each sub-operation can be transmitted to a media sequencer component that is associated with a respective memory component of the memory components.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: April 20, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Jiangli Zhu, Cheng Yuan Wu, Ying Yu Tai
  • Publication number: 20210073068
    Abstract: A read operation to retrieve data stored at a memory device is performed. Whether the data retrieved from the memory device includes an error that is not correctable is determined. Responsive to determining that the data retrieved from the memory device comprises the error that is not correctable, a buffer in a data path along which a write operation was performed to write the data at the memory device is searched for the data.
    Type: Application
    Filed: November 20, 2020
    Publication date: March 11, 2021
    Inventors: Wei Wang, Jiangli Zhu, Ying Yu Tai, Ning Chen, Zhengang Chen, Cheng Yuan Wu
  • Patent number: 10877835
    Abstract: A read operation to retrieve data from memory component and that bypasses a prior search for the data at a buffer in a read data path associated with the read operation can be performed. Responsive to performing the read operation that bypasses the prior search for the data at the buffer, the data is returned to a host system.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: December 29, 2020
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Wei Wang, Jiangli Zhu, Ying Yu Tai, Ning Chen, Zhengang Chen, Cheng Yuan Wu
  • Publication number: 20200089429
    Abstract: A host operation to be performed can be received. Sub-operations that are associated with the received host operation can be determined. A memory component of multiple memory components can be identified for each sub-operation. Furthermore, each sub-operation can be transmitted to a media sequencer component that is associated with a respective memory component of the memory components.
    Type: Application
    Filed: September 14, 2018
    Publication date: March 19, 2020
    Inventors: Jiangli Zhu, Cheng Yuan Wu, Ying Yu Tai
  • Publication number: 20200081851
    Abstract: An instruction can be received at a sequencer from a controller. The sequencer can be in a package including the sequencer and one or more memory components. The sequencer is operatively coupled to a controller that is separate from the package. A processing device of the sequencer can perform an operation based on the instruction on at least one of the one or more memory components in the package.
    Type: Application
    Filed: September 6, 2018
    Publication date: March 12, 2020
    Inventors: Samir Mittal, Ying Yu Tai, Cheng Yuan Wu
  • Publication number: 20200081763
    Abstract: A processing device can determine a configuration parameter to be used in an error correction code (ECC) operation. The configuration parameter is based on a memory type of a memory component that is associated with a controller. Data can be received from a host system. The processing device can generate a code word for the data by using the ECC operation that is based on the configuration parameter. The code word can be sent to a sequencer that is external to the controller.
    Type: Application
    Filed: September 6, 2018
    Publication date: March 12, 2020
    Inventors: Samir Mittal, Ying Yu Tai, Cheng Yuan Wu