Abstract: A deep trench structure may be formed between electrodes of a capacitive device. The deep trench structure may be formed to a depth, a width, and/or an aspect ratio that increases the volume of the deep trench structure relative to a trench structure formed using a metal etch-stop layer. Thus, the deep trench structure is capable of being filled with a greater amount of dielectric material, which increases the capacitance value of the capacitive device. Moreover, the parasitic capacitance of the capacitive device may be decreased by omitting the metal etch-stop layer. Accordingly, the deep trench structure (and the omission of the metal etch-stop layer) may increase the sensitivity of the capacitive device, may increase the humidity-sensing performance of the capacitive device, and/or may increase the performance of devices and/or integrated circuits in which the capacitive device is included.

Abstract: A light source for EUV is provided. The light source includes a target droplet generator, a laser generator, and a controller. The target droplet generator is configured to provide target droplets to a source vessel. The laser generator is configured to provide first laser pulses according to a control signal to irradiate the target droplets in the source vessel. The controller is configured to provide the control signal according to at least two of process parameters including temperature of the source vessel, droplet positions of the target droplets, and beam sizes and focal points of the first laser pulses. When the average value or the standard deviation of the temperature of the source vessel and the droplet positions of the target droplets exceed the predetermined range, the controller is configured to provide the control signal to the laser generator to stop providing the first laser pulses.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.

Abstract: A reticle, a reticle container and a method for discharging static charges accumulated on a reticle are provided. The reticle includes a mask substrate, a reflective multilayer (ML) structure, a capping layer, an absorption structure and a conductive material structure. The mask substrate has a front-side surface and a back-side surface. The reflective ML structure is positioned over the front-side surface of mask substrate. The capping layer is positioned over the reflective ML structure. The absorption structure is positioned over the capping layer. The conductive material structure is positioned over a sidewall surface of the mask substrate and a sidewall surface of the absorption structure.

Abstract: A photosensitive module is provided. The photosensitive module includes a base, an integrated package substrate, and a photosensitive element. The integrated package substrate is connected to the base. The integrated package substrate has a plurality of first electronic components, and the first electronic components are housed inside the integrated package substrate without being exposed to external environment. The photosensitive element is connected to the integrated package substrate, and the photosensitive element is configured to receive a light beam traveling along an optical axis.

Abstract: A method of forming graphene on a flexible substrate includes providing a polymer substrate including a metal structure and providing a carbon source and a carrier gas. The method also includes subjecting the polymer substrate to a plasma enhanced chemical vapor deposition (PECVD) process and growing a graphene layer on the copper structure.

Abstract: An extreme ultraviolet (EUV) mask includes a multilayer Mo/Si stack comprising alternating Mo and Si layers disposed over a first major surface of a mask substrate, a capping layer made of ruthenium (Ru) disposed over the multilayer Mo/Si stack, and an absorber layer on the capping layer. The EUV mask includes a circuit pattern area and a particle attractive area, and the capping layer is exposed at bottoms of patterns in the particle attractive area.

Abstract: An extreme ultra violet (EUV) radiation source apparatus includes a collector, a target droplet generator for generating a tin (Sn) droplet, a rotatable debris collection device and a chamber enclosing at least the collector and the rotatable debris collection device. The rotatable debris collection device includes a first end support, a second end support and a plurality of vanes, ends of which are supported by the first end support and the second end support, respectively. A surface of at least one of the plurality of vanes is coated by a catalytic layer, which reduces a SnH4 to Sn.

Abstract: The present disclosure relates to a pixel circuit including a light emitting element, a driving circuit, a first data storage circuit and a second data storage circuit. The driving circuit is electrically coupled to the light emitting element. The first data storage circuit is electrically coupled to the driving circuit, and is configured to transmit a first data signal to the driving circuit during a first frame period, so that the driving circuit drives the light emitting element according to the first data signal. The second data storage circuit is electrically coupled to the driving circuit, and is configured to receive a second data signal during the first frame period.

Abstract: A method for extreme ultraviolet (EUV) lithography includes loading an EUV mask to a lithography system; loading a wafer to the lithography system, wherein the wafer includes a resist layer sensitive to EUV radiation; producing EUV radiation by heating target plumes using a radiation source; and exposing the resist layer to the EUV radiation while monitoring a speed of the target plumes.

Abstract: An extreme ultra-violet (EUV) lithography system includes an EUV source and EUV scanner. A droplet generator provides a droplet stream in the EUV source. A gas shield is configured to surround the droplet stream. When a laser reacts a droplet in the stream EUV radiation and ionized particles are produced. The gas shield can reduce contamination resulting from the ionized particles by conveying the ionized particles to a droplet catcher. Components of the EUV source may be biased with a voltage to repel or attract ionized particles to reduce contamination from the ionized particles.

Abstract: A system is disclosed. The system includes a cleaning device and a scanner device. The cleaning device is configured to clean a mask. The scanner device is coupled to the cleaning device and is configured to receive the mask, a reference image and a real-time image that is captured at the mask. The reference image includes at least one first mark image having a plurality of mapping marks on the mask. The real-time image includes at least one second mark image having the plurality of mapping marks on the mask. The scanner device is configured to map the at least one second mark image in the real-time image with the at least one first image in the reference image, when a lithography exposing process is performed. A method is also disclosed herein.

Abstract: A clock multiplexer device includes first and second control circuitries and an output circuitry. The first control circuitry generates a first enable signal and a first signal according to a first clock signal and a first selection signal, and determines whether to output the first signal to be a first output clock signal according to a second selection signal and a second enable signal. The first and the second selection signals have opposite logic values. The second control circuitry generates the second enable signal and a second signal according to a second clock signal and the second selection signal, and determines whether to output the second signal to be a second output clock signal according to the first selection signal and the first enable signal. The output circuitry outputs one of the first output clock signal and the second output clock signal to be a final clock signal.

Abstract: A digital circuit device includes a power supply circuitry, a digital circuitry, a digital circuitry, and a protection circuitry. The power supply circuitry is configured to output a supply voltage. The digital circuitry is configured to be driven by the supply voltage, and is configured to perform at least one operation according to a first clock signal. The protection circuitry is configured to generate the first clock signal according to at least one of a voltage drop of the supply voltage and a load signal sent from the digital circuitry.

Abstract: In a method of manufacturing a semiconductor device, a layout is prepared. The layout includes active region patterns, each of the active region patterns corresponding to one or two fin structures, first fin cut patterns and second fin cut patterns. At least one pattern selected from the group consisting of the first fin cut patterns and the second fin cut patterns has a non-rectangular shape. The layout is modified by adding one or more dummy active region patterns and by changing the at least one pattern to be a rectangular pattern. Base fin structures are formed according to a modified layout including the active region patterns and the dummy active region patterns. Part of the base fin structures is removed according to one of a modified layout of the first fin cut patterns and a modified layout of the second fin cut patterns.

Abstract: A semiconductor arrangement includes a first well formed to a first depth and a first width in a substrate and a second well formed to a second depth and a second width in the substrate. The first well is formed in the second well, the first depth is greater than the second depth, and the second width is greater than the first width. A source region is formed in the second well and a drain region is formed in the substrate.

Abstract: A particle removal method for removing particles on the backside of a reticle is provided. The method includes disposing the reticle on a reticle holder. In addition, the method includes moving a baffle defining an enclosed area that encompasses a particle to be removed on a backside of the reticle. The method further includes spraying, by a solution spraying module of a particle removal device, a solution onto the particle. The method further includes sucking, by a sucking module of the particle removal device, the solution on the reticle with the particle. The method further includes emitting, by the particle removal device, a gas onto the backside of the reticle for drying the backside.

Abstract: A device includes a Static Random Access Memory (SRAM) array, and an SRAM cell edge region abutting the SRAM array. The SRAM array and the SRAM cell edge region in combination include first gate electrodes having a uniform pitch. A word line driver abuts the SRAM cell edge region. The word line driver includes second gate electrodes, and the first gate electrodes have lengthwise directions aligned to lengthwise directions of respective ones of the second gate electrodes.

Abstract: A reticle holding tool is provided. The reticle holding tool includes a housing, a reticle chuck, and a gas delivery assembly. The housing includes an opening, a top housing member, and a lateral housing member extending from the top housing member and terminating at a lower edge which is located on a predetermined plane. The reticle chuck is positioned in the housing and has an effective surface configured to secure a reticle. The effective surface is located between the predetermined plane and the top housing member. The reticle chuck is movable between two boundary lines that are perpendicular to the effective surface. A width of the opening is greater than a distance between the two boundary lines. The gas delivery assembly is positioned within the housing and configured to supply gas into the housing.

Abstract: A system is disclosed. The system includes a cleaning device and a scanner device. The cleaning device is configured to clean a mask. The scanner device is coupled to the cleaning device and is configured to receive the mask, a reference image and a real-time image that is captured at the mask. The reference image includes at least one first mark image having a plurality of mapping marks on the mask. The real-time image includes at least one second mark image having the plurality of mapping marks on the mask. The scanner device is configured to map the at least one second mark image in the real-time image with the at least one first image in the reference image, when a lithography exposing process is performed. A method is also disclosed herein.