Patents by Inventor Chih Lin

Chih Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250251098
    Abstract: The present invention relates to a lighting structure. The lighting structure includes: an appearance decorative component; a light-emitting unit emitting an LED light when activated; a circuit substrate configured to provide the light-emitting unit to be configured thereon and to control the light-emitting unit; and a light guide configured to guide the LED light to propagate toward the appearance decorative component.
    Type: Application
    Filed: January 31, 2025
    Publication date: August 7, 2025
    Inventors: YEN-CHIH LIN, LONG-JYH PAN, CHINYI CHOU
  • Publication number: 20250243627
    Abstract: A forming method for a molded pulp bottle includes the steps of: (a) immersing a forming mold in a pulp tank that contains pulp to adsorb the pulp and form at least one bottle preform; (b) separating the forming mold from the pulp tank, followed by sucking the pulp into the chamber of the at least one bottle preform and adsorbing the pulp to an inner surface of the at least one bottle preform through the forming mold; (c) transferring the at least one bottle preform from the forming mold to a transfer platform with the at least one bottle preform being supported by at least one air bag; and (d) moving the at least one bottle preform supported by the transfer platform and the at least one air bag away from the forming mold. A forming machine for implementing the forming method is also disclosed.
    Type: Application
    Filed: January 15, 2025
    Publication date: July 31, 2025
    Applicant: Yulan Green Technology CO., LTD.
    Inventors: Chun-Hsiung CHEN, Kao-Yi Chang, Ming-Chih Lin
  • Publication number: 20250241414
    Abstract: The present invention relates to a continuous polarization adhesive bonding and transmission apparatus for shoemaking. A polarizing device is provided inside a polarization chamber, and a conveyor belt capable of conveying materials is provided below said polarization chamber. The entrance side and the exit side of said polarization channel is respectively provided with a wave blocking tunnel, and said conveyor belt is installed through said wave blocking tunnel. The conveyor belt is provided with spaced electromagnetic protection plates, and the material to be polarized is provided between the two electro magnetic protection plates. When the material conveyed by the conveyor belt is polarized through the polarization chamber, the spaced electromagnetic protection plates can prevent the leakage of polarized waves.
    Type: Application
    Filed: January 25, 2024
    Publication date: July 31, 2025
    Inventors: Wen-Chih LIN, Li-Yung HSU
  • Publication number: 20250237229
    Abstract: A fan impeller structure includes a hub having a top and a sidewall; and a plurality of blades being circumferentially spaced on the sidewall. Each of the blades has a barrier zone formed at a tip portion of the blade; the barrier zone is used to prevent or block fluid at a lower side of the blade to turn over to an upper side of the blade owing to a difference in the pressure distributed over the upper and the lower side of the blade. Therefore, when a fan using the fan impeller structure is operating, the fan is able to maintain constant air flow and static efficiency to largely reduce vortices formed at the tip portions of the blades (also referred to as wingtip vortices) and accordingly, to reduce the occurrence of aerodynamic noise.
    Type: Application
    Filed: February 1, 2024
    Publication date: July 24, 2025
    Inventors: Sung-Wei Sun, Chu-Hsien Chou, Yi-Chih Lin, Pei-Chuan Lee
  • Publication number: 20250228564
    Abstract: A suturing device is adapted for sewing two tubular objects together, and includes a suturing aid rod, a plurality of sewing subunits, and two pushing subunits. The suturing aid rod has two carrying portions that are opposite to each other in a first direction. Each of the sewing subunits includes a suture thread, and two suture needles that are respectively connected to two opposite ends of the suture thread. Each of the pushing subunits is slidable relative to a respective one of the carrying portions between an initial position and a puncture position. When the pushing subunits are in the puncture position, one of the suture needles of each of the sewing subunits is adapted to puncture one of the tubular objects, and the other one of the suture needles of each of the sewing subunits is adapted to puncture the other one of the tubular objects.
    Type: Application
    Filed: January 15, 2024
    Publication date: July 17, 2025
    Applicants: Anasto Medical Inc.
    Inventors: Shang-Chih LIN, Irene HL HUANG, Eric Lynn HUANG
  • Patent number: 12363985
    Abstract: A semiconductor may include an active region, an epitaxial source/drain formed in and extending above the active region, and a first dielectric layer formed over a portion of the active region. The semiconductor may include a first metal gate and a second metal gate formed in the first dielectric layer, a second dielectric layer formed over the first dielectric layer and the second metal gate, and a titanium layer, without an intervening fluorine residual layer, formed on the metal gate and the epitaxial source/drain. The semiconductor may include a first metal layer formed on top of the titanium on the first metal gate, a second metal layer formed on top of the titanium layer on the epitaxial source/drain, and a third dielectric layer formed on the second dielectric layer. The semiconductor may include first and second vias formed in the third dielectric layer.
    Type: Grant
    Filed: January 10, 2024
    Date of Patent: July 15, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Ting Tsai, Chung-Liang Cheng, Hong-Ming Lo, Chun-Chih Lin, Chyi-Tsong Ni
  • Patent number: 12363989
    Abstract: A semiconductor device includes a fin-shape base protruding from a substrate, channel structures suspended above the fin-shape base, a gate structure wrapping around each of the channel structures, a source/drain (S/D) epitaxial feature abutting the channel structures and directly above a top surface of the fin-shape base, inner spacers interposing the S/D epitaxial feature and the gate structure, and a dielectric layer disposed vertically between the top surface of the fin-shape base and a bottom surface of the S/D epitaxial feature.
    Type: Grant
    Filed: August 10, 2023
    Date of Patent: July 15, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Bo-Yu Lai, Jyun-Chih Lin, Yen-Ting Chen, Wei-Yang Lee, Chia-Pin Lin, Wei Hao Lu, Li-Li Su
  • Patent number: 12362095
    Abstract: A method for producing a magnetic device is provided. The magnetic device produced by the method includes a main body that is integrally formed. The method includes a preparing process, a coil assembling process, a placing process, and a forming process. The preparing process is implemented by producing a bottom seat and a lid. The coil assembling process is implemented by fixing a coiling to the bottom seat for formation of a first semi-finished product. The placing process is implemented by placing the first semi-finished product into a mold and placing the lid onto the first semi-finished product for formation of a second semi-finished product. The forming process is implemented by pressurizing the second semi-finished product, such that the bottom seat and the lid are melted and connected to each other to form the main body. The coil is correspondingly encompassed by the main body.
    Type: Grant
    Filed: May 17, 2024
    Date of Patent: July 15, 2025
    Assignee: CHILISIN ELECTRONICS CORP.
    Inventors: Chun-Chih Lin, Shou-Yi Tsao
  • Patent number: 12354946
    Abstract: A chip package and a method of fabricating the same are disclosed. The chip package includes a substrate with a first region, a second region surrounding the first region, and a third region surrounding the second region, a device layer disposed on the substrate, a via layer disposed on the device layer, an interconnect structure disposed on the via layer, and a stress buffer layer with tapered side profiles disposed on the interconnect structure. First and second portions of the via layer above the first and second regions include first and second set of vias. First, second, and third portions of the interconnect structure above the first, second, and third regions include conductive lines connected to the devices, a first set of dummy metal lines connected to the second set of vias, and a second set of dummy metal lines.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: July 8, 2025
    Inventors: Jun He, Li-Hsien Huang, Yao-Chun Chuang, Chih-Lin Wang, Shih-Kang Tien
  • Publication number: 20250219016
    Abstract: A semiconductor structure and a manufacturing method thereof are provided. A semiconductor structure includes top, bottom, and middle tiers. The bottom tier includes a first interconnect structure overlying a first semiconductor substrate, and a first front-side bonding structure overlying the first interconnect structure. The middle tier interposed between and electrically coupled to the top and bottom tiers includes a second interconnect structure overlying a second semiconductor substrate, a second front-side bonding structure interposed between the top tier and the second interconnect structure, and a back-side bonding structure interposed between the second semiconductor substrate and the first front-side bonding structure.
    Type: Application
    Filed: March 23, 2025
    Publication date: July 3, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Hsing-Chih Lin, Zheng-Xun Li
  • Publication number: 20250221067
    Abstract: The present disclosure relates to an image sensor integrated chip (IC) structure. The image sensor IC structure includes a plurality of image sensing elements respectively disposed within a plurality of pixel regions of a pixel array within a substrate. An inter-level dielectric (ILD) structure is disposed on a surface of the substrate and surrounds one or more interconnects. A plurality of three-dimensional (3D) capacitors are arranged within respective ones of the plurality of pixel regions and are coupled to one of the plurality of image sensing elements by the one or more interconnects. The plurality of 3D capacitors include a base region extending in parallel to the surface of the substrate and one or more fingers extending outward from the base region along a direction perpendicular to the surface of the substrate.
    Type: Application
    Filed: April 15, 2024
    Publication date: July 3, 2025
    Inventors: Min-Feng Kao, Hsing-Chih Lin, Jen-Cheng Liu, Dun-Nian Yaung
  • Patent number: 12349599
    Abstract: A memory device includes a bottom electrode, a resistance switching element over the bottom electrode, a top electrode over the resistance switching element, and a dielectric layer. The dielectric layer surrounds the bottom electrode, the resistance switching element, and the top electrode. The resistance switching element has a first portion between the top electrode and the dielectric layer.
    Type: Grant
    Filed: March 18, 2024
    Date of Patent: July 1, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsin-Hsiang Tseng, Chih-Lin Wang, Yi-Huang Wu
  • Publication number: 20250199415
    Abstract: A method of controlling a wafer stage includes moving the wafer stage to position an immersion hood over a first sensor in the wafer stage. The method further includes moving the wafer stage to position the immersion hood over a first particle capture area on the wafer stage after moving the wafer stage to position the immersion hood over the first sensor. The method further includes moving the wafer stage to define a first routing track over the first particle capture area. The method further includes moving the wafer stage to position the immersion hood over an area for receiving a wafer on the wafer stage after defining the first routing track.
    Type: Application
    Filed: March 3, 2025
    Publication date: June 19, 2025
    Inventors: Yung-Yao LEE, Wei Chih LIN, Chih Chien LIN
  • Publication number: 20250198421
    Abstract: A fan blade structure includes a plurality of blades circumferentially spaced on a sidewall of a hub. The hub has upper and lower surfaces, which are downwind and upwind side, respectively; a front and a rear edge sequentially arranged in a rotation direction of the blade; and a root portion and a tip portion. Areas of the blade located between the tip and the root portion are divided into at least one first section located adjacent to the tip portion and one second section located between the first section and the root portion. The second section may have a thickness larger than or smaller than that of the first section, such that a stepped configuration is formed on the upwind side of the blade to provide a height difference thereon, which can effectively decrease flow resistance to reduce fan power consumption and upgrade fan efficiency.
    Type: Application
    Filed: December 14, 2023
    Publication date: June 19, 2025
    Inventors: Pei-Chuan Lee, Yi-Chih Lin, Chu-Hsien Chou, Sung-Wei Sun
  • Publication number: 20250203884
    Abstract: Some embodiments relate to an integrated device, including a first contact wire comprising an upper surface over a substrate; a plurality of shielding wires level with the first contact wire and having upper surfaces that are level with the upper surface of the first contact wire; and a first capacitor having an upper layer and a plurality of protrusions including a first protrusion and a second protrusion extending from the upper layer in a first direction towards the shielding wires; wherein the first protrusion extends to the upper surface of the first contact wire; and wherein the second protrusion is over and separated from the shielding wires in the first direction.
    Type: Application
    Filed: January 2, 2024
    Publication date: June 19, 2025
    Inventors: Jaio-Wei Wang, Dun-Nian Yaung, Jen-Cheng Liu, Hsing-Chih Lin, Min-Feng Kao, Ko Chun Liu, Meng-Hsien Lin
  • Publication number: 20250201610
    Abstract: A reticle carrier includes an inner pod, a first auxiliary structure, and an outer pod. The inner pod is configured to receive a reticle. The inner pod comprises an inner baseplate and an inner cover plate, and an inner surface of the inner baseplate and an inner surface of the inner cover plate face each other. The first auxiliary structure is on one of the inner surface of the inner baseplate and the inner surface of the inner cover plate. The first auxiliary structure includes a raised structure and a contact pattern on the raised structure, and the contact pattern includes a plurality of parallel strips. The outer pod houses the inner pod.
    Type: Application
    Filed: January 5, 2024
    Publication date: June 19, 2025
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Lu-Chih LIN, Pei-Cheng HSU, Ta-Cheng LIEN, Tran-Hui SHEN, Tzu-Yi WANG, Hsin-Chang LEE
  • Publication number: 20250192433
    Abstract: An electronic device includes a metal housing and an antenna structure. The metal housing includes a first housing and a second housing. The antenna structure is disposed between the first housing and the second housing. The antenna structure includes a carrier, a radiating element, a grounding metal member, a first grounding extension structure, and a reactive element. A first metal portion of the grounding metal member is electrically connected to the first housing, and a second metal portion of the grounding metal member is electrically connected to the second housing. The first grounding extension structure is connected to the first metal portion and the second metal portion. The reactive element is electrically connected between the radiating element and the second metal portion.
    Type: Application
    Filed: August 27, 2024
    Publication date: June 12, 2025
    Inventors: SHIH-CHIANG WEI, Ying-Hsuan Chen, HSIEH-CHIH LIN
  • Publication number: 20250179404
    Abstract: Cartridges for manufacturing a population of cells suitable for formulation as a cellular therapeutic are disclosed herein, along with systems and instruments for operating the cartridges and performing methods to generate the population of cells suitable for formulation as a cellular therapeutic. The population of cells suitable for formulation as a cellular therapeutic can be immunological cells, such as T lymphocytes, including endogenous T cells (ETCs), tumor infiltrating lymphocytes (TILs), CAR T-cells, TCR engineered T-cells, or otherwise engineered T-cells. The systems and methods can be largely automated.
    Type: Application
    Filed: September 27, 2024
    Publication date: June 5, 2025
    Inventors: Andrew W. McFarland, Peter J. Beemiller, Guido K. Stadler, Alexander J. Mastroianni, Joshua J. Cardiel Rivera, Darcy K. Kelly-Greene, Jonathan Cloud Dragon Hubbard, Natalie C. Marks, Long Van Le, Ke-Chih LIN
  • Patent number: 12322694
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC includes a first inter-metal dielectric (IMD) structure disposed over a semiconductor substrate. A metal-insulator-metal (MIM) device is disposed over the first IMD structure. The MIM device includes at least three metal plates that are spaced from one another. The MIM device further includes a plurality of capacitor insulator structures. Each of the plurality of capacitor insulator structures are disposed between and electrically isolate neighboring metal plates of the at least three metal plates.
    Type: Grant
    Filed: July 25, 2023
    Date of Patent: June 3, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Hsing-Chih Lin, Kuan-Hua Lin
  • Patent number: 12323710
    Abstract: A head-mounted display device and a control method for an eye-tracking operation are provided. The head-mounted display device includes a frame, a track, a sensor and a controller. The track is disposed on a peripheral region of the frame. The sensor is disposed on the track, and is configured to capture a target image of a target area. The controller is coupled to the sensor, is configured to generate a control signal according to the target image, and adjust a position of the sensor on the peripheral region by moving the sensor according to the control signal.
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: June 3, 2025
    Assignee: HTC Corporation
    Inventors: Yan-Min Kuo, Jun-Lin Guo, Wei-Chen Chen, Chih-Lin Chang, Wei-Cheng Hsu, Cheng-Yu Chen