Abstract: A method includes encapsulating a first device die and a second device die in an encapsulant, and forming an interconnect structure over and electrically connecting to the first device die and the second device die. A waveguide is formed in the interconnect structure. An optical-engine based interconnect component is bonded to the interconnect structure. The optical-engine based interconnect component forms a part of a signal path that connects the first device die to the second device die.

Abstract: A method for generating and outputting a message is implemented using an electronic device the stores a computer program product and a text database. The text database includes a main message template, a template text that includes a placeholder, and a word group that includes a plurality of preset words for replacing the placeholder. The method includes: in response to receipt of a command for execution of the computer program product, displaying an editing interface including the main message template; in response to receipt of user operation of a selection of the main message template, displaying the template text; in response to receipt of user operation of a selection of one of the preset words via the user interface, generating an edited text by replacing the placeholder with the one of the preset words in the template text; and outputting the edited text as a message.

Abstract: A method includes performing a plasma activation on a surface of a first package component, removing oxide regions from surfaces of metal pads of the first package component, and performing a pre-bonding to bond the first package component to a second package component.

Abstract: A device package includes a first die directly bonded to a second die at an interface, wherein the interface comprises a conductor-to-conductor bond. The device package further includes an encapsulant surrounding the first die and the second die and a plurality of through vias extending through the encapsulant. The plurality of through vias are disposed adjacent the first die and the second die. The device package further includes a plurality of thermal vias extending through the encapsulant and a redistribution structure electrically connected to the first die, the second die, and the plurality of through vias. The plurality of thermal vias is disposed on a surface of the second die and adjacent the first die.

Abstract: An antenna structure includes a metal mechanism element, a feeding radiation element, a first radiation element, a second radiation element, a third radiation element, a fourth radiation element, a fifth radiation element, a sixth radiation element, and a tuning circuit. A slot is formed in the metal mechanism element. The first radiation element is coupled to the feeding radiation element. The tuning circuit is coupled to the first radiation element. The second radiation element is coupled to the feeding radiation element. The third radiation element is coupled to a first grounding point on the metal mechanism element. The fourth radiation element is coupled to a second grounding point on the metal mechanism element. The fifth radiation element is coupled to a third grounding point on the metal mechanism element.

Abstract: A semiconductor device package includes a carrier, an electronic component, a connection element and an encapsulant. The electronic component is disposed on a surface of the carrier. The connection element is disposed on the surface and adjacent to an edge of the carrier. The encapsulant is disposed on the surface of the carrier. A portion of the connection element is exposed from an upper surface and an edge of the encapsulant.

Abstract: The present disclosure, in some embodiments, relates an integrated chip. The integrated chip includes a substrate. A through-substrate-via (TSV) extends through the substrate. A dielectric liner separates the TSV from the substrate. The dielectric liner is along one or more sidewalls of the substrate. The TSV includes a horizontally extending surface and a protrusion extending outward from the horizontally extending surface. The TSV has a maximum width along the horizontally extending surface.

Abstract: An image sensing device and a control device of an illumination device thereof are provided. The control device includes a control circuit, an operation circuit, and multiple driving signal generators. The control circuit generates multiple control signals. The operation circuit performs a logical operation on the control signals and an image capturing signal to generate multiple operation results. The driving signal generator respectively provides multiple driving signals to the illumination device according to the operation results, and the driving signals respectively have multiple different output powers.

Abstract: Provided include a beam modulation apparatus for modulating an input light field and a projection system containing the apparatus. The input light field has a first light field and a second light field, having a difference of 90° in their polarization states. The apparatus includes a PBS prism, a first LCOS panel and a second LCOS panel. The first and the second LCOS panel are respectively over a side surface of the PBS prism opposing to an optical incident surface and an optical exit surface. Each LCOS panel comprises a plurality of pixels over a reflective surface thereof, with each pixel controllably switched on or off such that a polarity state of a light beam reflected by a portion of the reflective surface corresponding thereto is changed or remains unchanged. This beam modulation apparatus can be applied in a projection system, such as a laser TV projection system.

Abstract: The invention provides a memory searching device and method. The memory searching device includes a memory, a lookup command processing circuit, and a lookup result processing circuit. The lookup command processing circuit reorders an original order of lookup commands in an original lookup command string into a new order based on an accessing characteristic of the memory, and provides a reordered lookup command string to the memory. The lookup result processing circuit is coupled to the memory to receive a lookup result string, and coupled to the lookup command processing circuit to receive mapping information between the original order and the new order. The lookup result string includes lookup results corresponding to the lookup commands of the reordered lookup command string. The lookup result processing circuit restores an order of the lookup results to the original order based on the mapping information.

Abstract: A system for generating and providing a livestream includes a streaming-end assembly configured to generate a data stream, and a streaming server connected to the streaming-end assembly. In response to receipt of the data stream, the streaming server executing a processing software application processes the data stream to generate a plurality of streaming data chunks, and an index file that indicates an order of the plurality of streaming data chunks. The streaming server publishes the streaming data chunks and the index file to an InterPlanetary File System (IPFS) system, so as to enable a viewer-end device executing a web browser to communicate with the IPFS system to obtain the index file and the streaming data chunks from the IPFS system, and to play the streaming data chunks in the order indicated by the index file.

Abstract: A transistor includes an insulating layer, a source region, a drain region, a channel layer, a ferroelectric layer, and a gate electrode. The source region and the drain region are respectively disposed on and in physical contact with two opposite sidewalls of the insulating layer. A thickness of the source region, a thickness of the drain region, and a thickness of the insulating layer are substantially the same. The channel layer is disposed on the insulating layer, the source region, and the drain region. The ferroelectric layer is disposed over the channel layer. The gate electrode is disposed on the ferroelectric layer.

Abstract: A semiconductor structure includes a plurality of memory cells stacked up along a first direction. Each of the memory cells include a memory stack, connecting lines, and insulating layers. The memory stack includes a first dielectric layer, a channel layer disposed on the first dielectric layer, a charge trapping layer disposed on the channel layer, a second dielectric layer disposed on the charge trapping layer, and a gate layer disposed in between the channel layer and the second dielectric layer. The connecting lines are extending along the first direction and covering side surfaces of the memory stack. The insulating layers are extending along the first direction, wherein the insulating layers are located aside the connecting lines and covering the side surfaces of the memory stack.

Abstract: A wafer transporting method includes following operations. A plurality of wafers are received in a semiconductor container attached to a mobile vehicle. An air processing system is coupled to a wall of the semiconductor container. The air processing system includes an inlet valve, an outlet valve, a pump between the inlet valve and the outlet valve, and a desiccant coupled to the pump. The semiconductor container is moved. The pump of the air processing system is turned on to extract air from inside the semiconductor container into the air processing system through the inlet valve. Humidity of the air is reduced when the air passes through the desiccant of the air processing system. The air is returned back to the semiconductor container through the outlet valve.

Abstract: A method for manufacturing a package structure includes: providing a first electrical element and a second electrical element on a surface of a first carrier, wherein the second electrical element is shifted with respect to the first electrical element; and moving the first electrical element along at least one direction substantially parallel with the surface of the first carrier until a first surface of the first electrical element is substantially aligned with a first surface of the second electrical element from a top view.

Abstract: A memory array and an operation method of the memory array are provided. The memory array includes first and second ferroelectric memory devices formed along a gate electrode, a channel layer and a ferroelectric layer between the gate electrode and the channel layer. The ferroelectric memory devices include: a common source/drain electrode and two respective source/drain electrodes, separately in contact with a side of the channel layer opposite to the ferroelectric layer, wherein the common source/drain electrode is disposed between the respective source/drain electrodes; and first and second auxiliary gates, capacitively coupled to the channel layer, wherein the first auxiliary gate is located between the common source/drain electrode and one of the respective source/drain electrodes, and the second auxiliary gate is located between the common source/drain electrode and the other respective source/drain electrode.

Abstract: A mounting seat is connected to a doorbell includes a mounting portion, an extendable portion, and a connecting portion. The mounting portion is connected to a mounting surface. The extendable portion is connected to the mounting portion. The extendable portion could be extended or retracted by exerting force. The extendable portion includes a first extendable section and a second extendable section. The connecting portion is connected between the extendable portion and the doorbell. When the first extendable section is extended or retracted relative to the mounting portion, the extendable portion drives the connecting portion and the doorbell to turn along a first axis. When the second extendable section is extended or retracted relative to the mounting portion, the extendable portion drives the connecting portion and the doorbell to turn along a second axis. The first axis is not parallel to the second axis.

Abstract: An integrated circuit structure includes a first metal feature formed into a first dielectric layer, a second metal feature formed into a second dielectric layer, the second dielectric layer being disposed on said first dielectric layer, and a via connecting the first metal feature to the second metal feature, wherein a top portion of the via is offset from a bottom portion of the via.

Abstract: An installing module includes a seat bracket, a plurality of lower gaskets, a device bracket and an upper gasket. The seat bracket includes a first locking plate and a second locking plate locked to each other. The first locking plate includes a first concave and the second locking plate includes a second concave corresponding to the first concave. The lower gaskets are respectively disposed on the first concave and the second concave. The lower gaskets face each other and jointly define a lower assembly hole and are disposed on a lower side of a head-support fixer of a car seat. The device bracket is locked to the seat bracket and an electronic device is pivotally coupled to the device bracket. The upper gasket is disposed between the device bracket and the head-support fixer, and the head-support fixer is clamped between the upper gasket and the lower gaskets.

Abstract: A rotation device includes a base seat, an axle unit and a lock unit. The axle unit extends into the base seat. The lock unit includes a lock plate that is sleeved on the axle unit, and a lock member that is disposed on the base seat. The lock plate is formed with a first lock groove. The lock member has a lock portion that is operable to move into the first lock groove. The lock plate is locked by the lock portion of the lock member when the lock portion moves into the first lock groove, so that the axle unit and the lock plate are not rotatable relative to the base seat.