Patents by Inventor Chi-I Lang

Chi-I Lang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145245
    Abstract: Embodiments of the present disclosure generally relate to methods for enhancing carbon hardmask to have improved etching selectivity and profile control. In some embodiments, a method of treating a carbon hardmask layer is provided and includes positioning a workpiece within a process region of a processing chamber, where the workpiece has a carbon hardmask layer disposed on or over an underlying layer, and treating the carbon hardmask layer by exposing the workpiece to a sequential infiltration synthesis (SIS) process to produce an aluminum oxide carbon hybrid hardmask which is denser than the carbon hardmask layer. The SIS process includes exposing and infiltrating the carbon hardmask layer with an aluminum precursor, purging to remove gaseous remnants, exposing and infiltrating the carbon hardmask layer to an oxidizing agent to produce an aluminum oxide coating disposed on inner surfaces of the carbon hardmask layer, and purging the process region to remove gaseous remnants.
    Type: Application
    Filed: August 24, 2023
    Publication date: May 2, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Yung-chen LIN, Zhiyu HUANG, Chi-I LANG, Ho-yung HWANG
  • Publication number: 20240142869
    Abstract: Embodiments of the present disclosure generally relate to methods for enhancing carbon hardmask to have improved etching selectivity and profile control. In some embodiments, a method of treating a carbon hardmask layer is provided and includes positioning a workpiece within a process region of a processing chamber, where the workpiece has a carbon hardmask layer disposed on or over an underlying layer, and treating the carbon hardmask layer by exposing the workpiece to a sequential infiltration synthesis (SIS) process to produce an aluminum oxide carbon hybrid hardmask which is denser than the carbon hardmask layer. The SIS process includes exposing and infiltrating the carbon hardmask layer with an aluminum precursor, purging to remove gaseous remnants, exposing and infiltrating the carbon hardmask layer to an oxidizing agent to produce an aluminum oxide coating disposed on inner surfaces of the carbon hardmask layer, and purging the process region to remove gaseous remnants.
    Type: Application
    Filed: August 24, 2023
    Publication date: May 2, 2024
    Inventors: Yung-chen LIN, Zhiyu HUANG, Chi-I LANG, Ho-yung HWANG
  • Publication number: 20240142870
    Abstract: Embodiments of the present disclosure generally relate to methods for enhancing carbon hardmask to have improved etching selectivity and profile control. In some embodiments, a method of treating a carbon hardmask layer is provided and includes positioning a workpiece within a process region of a processing chamber, where the workpiece has a carbon hardmask layer disposed on or over an underlying layer, and treating the carbon hardmask layer by exposing the workpiece to a sequential infiltration synthesis (SIS) process to produce an aluminum oxide carbon hybrid hardmask which is denser than the carbon hardmask layer. The SIS process includes exposing and infiltrating the carbon hardmask layer with an aluminum precursor, purging to remove gaseous remnants, exposing and infiltrating the carbon hardmask layer to an oxidizing agent to produce an aluminum oxide coating disposed on inner surfaces of the carbon hardmask layer, and purging the process region to remove gaseous remnants.
    Type: Application
    Filed: August 24, 2023
    Publication date: May 2, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Yung-chen LIN, Zhiyu HUANG, Chi-I LANG, Ho-yung HWANG
  • Publication number: 20240071773
    Abstract: Exemplary methods of semiconductor processing may include forming a layer of silicon-containing material on a semiconductor substrate. The methods may include performing a post-formation treatment on the layer of silicon-containing material to yield a treated layer of silicon-containing material. The methods may include contacting the treated layer of silicon-containing material with an adhesion agent. The methods may include forming a layer of a resist material on the treated layer of silicon-containing material.
    Type: Application
    Filed: August 11, 2023
    Publication date: February 29, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Lei Liao, Yichuan Ling, Zhiyu Huang, Hideyuki Kanzawa, Fenglin Wang, Rajesh Prasad, Yung-Chen Lin, Chi-I Lang, Ho-yung David Hwang, Lequn Liu
  • Publication number: 20230215735
    Abstract: A method of forming features over a semiconductor substrate is provided. The method includes supplying a gas mixture over a surface of a substrate at a continuous flow rate. A first radio frequency (RF) signal is delivered to an electrode while the gas mixture is supplied at the continuous flow rate to deposit a polymer layer over the surface of the substrate. The surface of the substrate includes an oxide containing portion and a nitride containing portion. A second RF signal is delivered to the electrode while continuously supplying the gas mixture at the continuous flow rate to selectively etch the oxide containing portion relative to the nitride containing portion.
    Type: Application
    Filed: November 14, 2022
    Publication date: July 6, 2023
    Inventors: Lei LIAO, Yung-chen LIN, Chi-I LANG, Ho-yung David HWANG
  • Publication number: 20230095970
    Abstract: Embodiments of the present disclosure generally relate to methods for enhancing photoresist (PR) to have improved profile control. A method for treating a PR includes positioning a workpiece within a process region of a processing chamber, where the workpiece contains a patterned PR disposed on an underlayer, and treating the patterned PR by exposing the workpiece to a sequential infiltration synthesis (SIS) process to produce a treated patterned PR which is denser and harder than the patterned PR. The SIS process includes one or more infiltration cycles of exposing the patterned PR to a precursor containing silicon or boron, infiltrating the patterned PR with the precursor, purging to remove remnants of the precursor, exposing the patterned PR to an oxidizing agent, infiltrating the patterned PR with the oxidizing agent to produce oxide coating disposed on inner surfaces of the patterned PR, and purging to remove remnants of the oxidizing agent.
    Type: Application
    Filed: August 22, 2022
    Publication date: March 30, 2023
    Inventors: Zhiyu HUANG, Chi-I LANG, Yung-chen LIN, Ho-yung HWANG, Gabriela ALVA, Wayne R. FRENCH
  • Publication number: 20230045689
    Abstract: A method of forming an interconnect structure for semiconductor devices is described. The method comprises etching a patterned interconnect stack for form first conductive lines and expose a top surface of a first etch stop layer; etching the first etch stop layer to form second conductive lines and expose a top surface of a barrier layer; and forming a self-aligned via.
    Type: Application
    Filed: October 18, 2022
    Publication date: February 9, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Hao Jiang, Chi Lu, He Ren, Chi-I Lang, Ho-yung David Hwang, Mehul Naik
  • Publication number: 20230033038
    Abstract: Methods for formation of a layer stack during a back-end-of-line (BEOL) process flow and the layer stack formed therefrom are provided. In one or more embodiments, the method utilizes a two-dimensional (2D) self-aligned scheme with a subtractive metal etch. The method includes using a hard mask to form a via with a small width which is formed through or contacts each of a first metal layer and a second metal layer. The via is filled with a metal gapfill to connect the first metal layer and the second metal layer. Each of the first metal layer and the second metal layer are patterned to form a plurality of features.
    Type: Application
    Filed: July 7, 2022
    Publication date: February 2, 2023
    Inventors: Yung-chen LIN, Chi-I LANG, Ho-yung HWANG
  • Publication number: 20220392752
    Abstract: Embodiments of the present disclosure generally relate to methods for etching materials. In one or more embodiments, the method includes positioning a substrate in a process volume of a process chamber, where the substrate includes a metallic ruthenium layer disposed thereon, and exposing the metallic ruthenium layer to an oxygen plasma to produce a solid ruthenium oxide on the metallic ruthenium layer and a gaseous ruthenium oxide within the process volume. The method also includes exposing the solid ruthenium oxide to a secondary plasma to convert the solid ruthenium oxide to either metallic ruthenium or a ruthenium oxychloride compound. The metallic ruthenium is in a solid state on the metallic ruthenium layer or the ruthenium oxychloride compound is in a gaseous state within the process volume.
    Type: Application
    Filed: May 18, 2022
    Publication date: December 8, 2022
    Inventors: Yung-chen LIN, Chi-I LANG, Ho-yung HWANG
  • Patent number: 11508617
    Abstract: A method of forming an interconnect structure for semiconductor devices is described. The method comprises etching a patterned interconnect stack for form first conductive lines and expose a top surface of a first etch stop layer; etching the first etch stop layer to form second conductive lines and expose a top surface of a barrier layer; and forming a self-aligned via.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: November 22, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Hao Jiang, Chi Lu, He Ren, Chi-I Lang, Ho-yung David Hwang, Mehul Naik
  • Publication number: 20220367186
    Abstract: Methods and film stacks for extreme ultraviolet (EUV) lithography are described. The film stack comprises a substrate with a hard mask, bottom layer, middle layer and photoresist. Etching of the photoresist is highly selective to the middle layer and a modification of the middle layer allows for a highly selective etch relative to the bottom layer.
    Type: Application
    Filed: July 28, 2022
    Publication date: November 17, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Nancy Fung, Chi-I Lang, Ho-yung David Hwang
  • Patent number: 11495461
    Abstract: Methods for forming a film stack comprising a hardmask layer and etching such hardmask layer to form features in the film stack are provided. The methods described herein facilitate profile and dimension control of features through a proper profile management scheme formed in the film stack. In one or more embodiments, a method for etching a hardmask layer includes forming a hardmask layer on a substrate, where the hardmask layer contains a metal-containing material containing a metal element having an atomic number greater than 28, supplying an etching gas mixture to the substrate, and etching the hardmask layer exposed by a photoresist layer.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: November 8, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Tejinder Singh, Suketu Arun Parikh, Daniel Lee Diehl, Michael Anthony Stolfi, Jothilingam Ramalingam, Yong Cao, Lifan Yan, Chi-I Lang, Hoyung David Hwang
  • Patent number: 11437238
    Abstract: Methods and film stacks for extreme ultraviolet (EUV) lithography are described. The film stack comprises a substrate with a hard mask, bottom layer, middle layer and photoresist. Etching of the photoresist is highly selective to the middle layer and a modification of the middle layer allows for a highly selective etch relative to the bottom layer.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: September 6, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Nancy Fung, Chi-I Lang, Ho-yung David Hwang
  • Publication number: 20220199401
    Abstract: Methods for depositing boron-containing films on a substrate are described. The substrate is exposed to a boron precursor and a plasma to form the boron-containing film (e.g., elemental boron, boron oxide, boron carbide, boron silicide, boron nitride). The exposures can be sequential or simultaneous. The boron-containing films are selectively deposited on one material (e.g., SiN or Si) rather than on another material (e.g., silicon oxide).
    Type: Application
    Filed: December 13, 2021
    Publication date: June 23, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Yung-Chen Lin, Chi-I Lang, Ho-yung David Hwang
  • Publication number: 20220189786
    Abstract: A method and apparatus for patterning semiconductor materials using tin-based materials as mandrels, hardmasks, and liner materials are provided. One or more implementations of the present disclosure use tin-oxide and/or tin-carbide materials as hardmask materials, mandrel materials, and/or liner material during various patterning applications. Tin-oxide or tin-carbide materials are easy to strip relative to other high selectivity materials like metal oxides (e.g., TiO2, ZrO2, HfO2, Al2O3) to avoid influencing critical dimensions and generate defects. In addition, tin-oxide and tin-carbide have low refractive index, k-value, and are transparent under 663-nm for lithography overlay.
    Type: Application
    Filed: November 23, 2021
    Publication date: June 16, 2022
    Inventors: Yung-chen LIN, Chi-I LANG, Ho-yung HWANG
  • Publication number: 20210125864
    Abstract: A method of forming an interconnect structure for semiconductor devices is described. The method comprises etching a patterned interconnect stack for form first conductive lines and expose a top surface of a first etch stop layer; etching the first etch stop layer to form second conductive lines and expose a top surface of a barrier layer; and forming a self-aligned via.
    Type: Application
    Filed: October 24, 2019
    Publication date: April 29, 2021
    Inventors: Hao Jiang, Chi Lu, He Ren, Chi-I Lang, Ho-yung David Hwang, Mehul Naik
  • Patent number: 10954129
    Abstract: A method of fabricating a semiconductor structure is described. The method comprises forming at least one mandrel on a substrate, the at least one mandrel comprising a diamond-like carbon and having a top and two opposing sidewalls, the diamond-like carbon comprising at least 40% sp3 hybridized carbon atoms. The mandrel may be used in Self-Aligned Multiple Patterning (SAMP) processes.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: March 23, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Takehito Koshizawa, Eswaranand Venkatasubramanian, Pramit Manna, Chi Lu, Chi-I Lang, Nancy Fung, Abhijit Basu Mallick
  • Patent number: 10867795
    Abstract: A method of etching a hardmask layer formed on a substrate is provided. The method includes supplying an etching gas mixture to a processing region of a processing chamber. A device is disposed in the processing region when the etching gas mixture is supplied to the processing region. The device comprises a substrate and a hardmask layer formed over the substrate. The etching gas mixture comprises a fluorine-containing gas, a silicon-containing gas, and an oxygen-containing gas. The method further includes providing RF power to the etching gas mixture to form a plasma in the processing region. The plasma is configured to etch exposed portions of the hardmask layer.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: December 15, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Nancy Fung, Gene Lee, Hailong Zhou, Zohreh Hesabi, Akhil Mehrotra, Shan Jiang, Abhijit Patil, Chi-I Lang, Larry Gao
  • Publication number: 20200273705
    Abstract: Methods for forming a film stack comprising a hardmask layer and etching such hardmask layer to form features in the film stack are provided. The methods described herein facilitate profile and dimension control of features through a proper profile management scheme formed in the film stack. In one or more embodiments, a method for etching a hardmask layer includes forming a hardmask layer on a substrate, where the hardmask layer contains a metal-containing material containing a metal element having an atomic number greater than 28, supplying an etching gas mixture to the substrate, and etching the hardmask layer exposed by a photoresist layer.
    Type: Application
    Filed: February 25, 2020
    Publication date: August 27, 2020
    Inventors: Tejinder SINGH, Suketu Arun PARIKH, Daniel Lee DIEHL, Michael Anthony STOLFI, Jothilingam RAMALINGAM, Yong CAO, Lifan YAN, Chi-I LANG, Hoyung David HWANG
  • Publication number: 20200013620
    Abstract: Methods and film stacks for extreme ultraviolet (EUV) lithography are described. The film stack comprises a substrate with a hard mask, bottom layer, middle layer and photoresist. Etching of the photoresist is highly selective to the middle layer and a modification of the middle layer allows for a highly selective etch relative to the bottom layer.
    Type: Application
    Filed: July 8, 2019
    Publication date: January 9, 2020
    Inventors: Nancy Fung, Chi-I Lang, Ho-yung David Hwang