Patents by Inventor Chi-I Lang
Chi-I Lang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8871860Abstract: Methods of modifying a patterned semiconductor substrate are presented including: providing a patterned semiconductor substrate surface including a dielectric region and a conductive region; and applying an amphiphilic surface modifier to the dielectric region to modify the dielectric region. In some embodiments, modifying the dielectric region includes modifying a wetting angle of the dielectric region. In some embodiments, modifying the wetting angle includes making a surface of the dielectric region hydrophilic. In some embodiments, methods further include applying an aqueous solution to the patterned semiconductor substrate surface. In some embodiments, the conductive region is selectively enhanced by the aqueous solution. In some embodiments, methods further include providing the dielectric region formed of a low-k dielectric material. In some embodiments, applying the amphiphilic surface modifier modifies an interaction of the low-k dielectric region with a subsequent process.Type: GrantFiled: August 20, 2013Date of Patent: October 28, 2014Assignee: Intermolecular, Inc.Inventors: Anh Duong, Tony Chiang, Zachary M. Fresco, Nitin Kumar, Chi-I Lang, Jinhong Tong, Anna Tsizelmon
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Publication number: 20140315331Abstract: Candidate wet processes for native oxide removal from, and passivation of, germanium surfaces can be screened by high-productivity combinatorial variation of different process parameters on different site-isolated regions of a single substrate. Variable process parameters include the choice of hydrohalic acid used to remove the native oxide, the concentration of the acid in the solution, the exposure time, and the use of an optional sulfur passivation step. Measurements to compare the results of the process variations include attenuated total reflectance Fourier transform infrared spectroscopy (ATR-FTIR), contact angle, atomic force microscopy (AFM), scanning electron microscopy (SEM), and X-ray fluorescence (XRF). A sample screening experiment indicated somewhat less native oxide regrowth using HCl or HBr without sulfur passivation, compared to using HF with sulfur passivation.Type: ApplicationFiled: March 11, 2014Publication date: October 23, 2014Applicant: Intermolecular, Inc.Inventors: Sandip Niyogi, Shuogang Huang, Chi-I Lang
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Patent number: 8865518Abstract: Resistive switching memory elements are provided that may contain electroless metal electrodes and metal oxides formed from electroless metal. The resistive switching memory elements may exhibit bistability and may be used in high-density multi-layer memory integrated circuits. Electroless conductive materials such as nickel-based materials may be selectively deposited on a conductor on a silicon wafer or other suitable substrate. The electroless conductive materials can be oxidized to form a metal oxide for a resistive switching memory element. Multiple layers of conductive materials can be deposited each of which has a different oxidation rate. The differential oxidization rates of the conductive layers can be exploited to ensure that metal oxide layers of desired thicknesses are formed during fabrication.Type: GrantFiled: June 4, 2013Date of Patent: October 21, 2014Assignee: Intermolecular, Inc.Inventors: Nitin Kumar, Tony P. Chiang, Chi-I Lang, Zhi-Wen Wen Sun, Jihong Tong
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Patent number: 8859427Abstract: Embodiments of the current invention describe methods of processing a semiconductor substrate that include applying a zincating solution to the semiconductor substrate to form a zinc passivation layer on the titanium-containing layer, the zincating solution comprising a zinc salt, FeCl3, and a pH adjuster.Type: GrantFiled: December 22, 2011Date of Patent: October 14, 2014Assignee: Intermolecular, Inc.Inventors: Bob Kong, Tony Chiang, Chi-I Lang, Zhi-Wen Sun, Jinhong Tong
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Publication number: 20140264281Abstract: Semiconductor devices and methods of making thereof are disclosed. A field effect transistor (FET) is provided comprising a substrate, a first layer disposed above the substrate, the first layer being operable as a gate electrode, a second layer disposed above the first layer, the second layer comprising a dielectric material, a third layer disposed above the second layer, the third layer comprising a semiconductor, and a fourth layer comprising one or more conductive materials and operable as source and drain electrodes disposed above the third layer. In some embodiments, the dielectric material comprises a high-? dielectric. In some embodiments, the source and drain electrodes comprise one or more metals. The source and drain electrodes are each in ohmic contact with an area of the top surface of the third layer, and substantially all of the current through the transistor flows through the ohmic contacts.Type: ApplicationFiled: December 20, 2013Publication date: September 18, 2014Applicant: Intermolecular, Inc.Inventors: Sandip Niyogi, Sean Barstow, Chi-I Lang, Ratsamee Limdulpaiboon, Dipankar Pramanik, J. Watanabe
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Publication number: 20140262749Abstract: Combinatorial processing of a substrate comprising site-isolated sputter deposition and site-isolated plasma processing can be performed in a same process chamber. The process chamber, configured to perform sputter deposition and plasma processing, comprises a grounded shield having at least an aperture disposed above the substrate to form a small, dark space gap to reduce or eliminate any plasma formation within the gap. The plasma processing may include plasma etching or plasma surface treatment.Type: ApplicationFiled: March 14, 2013Publication date: September 18, 2014Applicant: INTERMOLECULAR, INC.Inventors: Ashish Bodke, Olov Karlsson, Kevin Kashefi, Chi-I Lang, Dipankar Pramanik, Hong Sheng Yang, Xuena Zhang
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Publication number: 20140273493Abstract: Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber enclosing a substrate support, a remote plasma source, and a showerhead. A substrate heater can be mounted in the substrate support. A transport system moves the substrate support and is capable of positioning the substrate. The plasma system may be used to generate activated hydrogen species. The activated hydrogen species can be used to etch/clean semiconductor oxide surfaces such as silicon oxide or germanium oxide.Type: ApplicationFiled: September 19, 2013Publication date: September 18, 2014Applicant: Intermolecular, Inc.Inventors: Ratsamee Limdulpaiboon, Chi-I Lang, Sandip Niyogi, J. Watanabe
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Publication number: 20140273525Abstract: Metal-oxide films (e.g., aluminum oxide) with low leakage current suitable for high-k gate dielectrics are deposited by atomic layer deposition (ALD). The purge time after the metal-deposition phase is 5-15 seconds, and the purge time after the oxidation phase is prolonged beyond 60 seconds. Prolonging the post-oxidation purge produced an order-of-magnitude reduction of leakage current in 30 ?-thick Al2O3 films.Type: ApplicationFiled: September 6, 2013Publication date: September 18, 2014Applicant: Intermolecular, Inc.Inventors: Kurt Pang, Sean Barstow, Chi-I Lang, Michael Miller, Sandip Niyogi, Prashant B. Phatak
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Publication number: 20140273309Abstract: Remote-plasma treatments of surfaces, for example in semiconductor manufacture, can be improved by preferentially exposing the surface to only a selected subset of the plasma species generated by the plasma source. The probability that a selected species reaches the surface, or that an unselected species is quenched or otherwise converted or diverted before reaching the surface, can be manipulated by introducing additional gases with selected properties either at the plasma source or in the process chamber, varying chamber pressure or flow rate to increase or decrease collisions, or changing the dimensions or geometry of the injection ports, conduits and other passages traversed by the species. Some example processes treat surfaces preferentially with relatively low-energy radicals, vary the concentration of radicals at the surface in real time, or clean and passivate in the same unit process.Type: ApplicationFiled: October 10, 2013Publication date: September 18, 2014Applicant: Intermolecular, Inc.Inventors: Sandip Niyogi, Sean Barstow, Jay Dedontney, Chi-I Lang, Ratsamee Limdulpaiboon, Martin Romero, Sunil Shanker, James Tsung, J. Watanabe
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Patent number: 8836365Abstract: An apparatus and method for testing electromigration in semiconductor devices includes providing an electromigration test structure, where the electromigration test structure includes a first metal line; a metal bridge operatively coupled to the first metal line; a second metal line operatively coupled to the metal bridge; a barrier layer surrounding the electromigration test structure; current contact pads; and voltage contact pads. The current contact pads are connected to a current source and the voltage contact pads are connected to a voltage source. The barrier layer is exposed to the elevated current density as current travels from the first metal line across the barrier layer through the metal bridge to the second metal line.Type: GrantFiled: November 30, 2010Date of Patent: September 16, 2014Assignee: Intermolecular, Inc.Inventors: Yun Wang, Tony P. Chiang, Chi-I Lang
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Publication number: 20140252565Abstract: A germanium-containing semiconductor surface is prepared for formation of a dielectric overlayer (e.g., a thin layer of high-k gate dielectric) by (1) removal of native oxide, for example by wet cleaning, (2) additional cleaning with hydrogen species, (3) in-situ formation of a controlled monolayer of GeO2, and (4) in-situ deposition of the dielectric overlayer to prevent uncontrolled regrowth of native oxide. The monolayer of GeO2 promotes uniform nucleation of the dielectric overlayer, but it too thin to appreciably impact the effective oxide thickness of the dielectric overlayer.Type: ApplicationFiled: March 5, 2014Publication date: September 11, 2014Applicant: Intermolecular, Inc.Inventors: Frank Greer, Edwin Adhiprakasha, Chi-I Lang, Ratsamee Limdulpaiboon, Sandip Niyogi, Kurt Pang, J. Watanabe
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Patent number: 8822313Abstract: Embodiments provided herein describe methods and systems for processing substrates. A plasma including radical species and charged species is generated. The charged species of the plasma are collected. A substrate is exposed to the radical species of the plasma. A layer is formed on the substrate after exposing the substrate to the radical species.Type: GrantFiled: December 20, 2012Date of Patent: September 2, 2014Assignee: Intermolecular, Inc.Inventors: Chi-I Lang, Sandip Niyogi
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Patent number: 8821985Abstract: Methods and apparatuses for combinatorial processing are disclosed. Methods include introducing a substrate into a processing chamber. Methods further include forming a first film on a surface of a first site-isolated region on the substrate and forming a second film on a surface of a second site-isolated region on the substrate. The methods further include exposing the first film to a plasma having a first source gas to form a first treated film on the substrate and exposing the second film to a plasma having a second source gas to form a second treated film on the substrate without etching the first treated film in the processing chamber. In addition, methods include evaluating results of the treated films post processing.Type: GrantFiled: November 2, 2012Date of Patent: September 2, 2014Assignee: Intermolecular, Inc.Inventors: ShouQian Shao, Chi-I Lang, Sandip Niyogi, Jinhong Tong
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Patent number: 8821987Abstract: Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber, a remote plasma source, and a showerhead. Inert gas ports within the showerhead assembly can be used to alter the concentration and energy of reactive radical or reactive neutral species generated by the remote plasma source in different regions of the showerhead. This allows the showerhead to be used to apply a surface treatment to different regions of the surface of a substrate. Varying parameters such as the remote plasma parameters, the inert gas flows, pressure, and the like allow different regions of the substrate to be treated in a combinatorial manner.Type: GrantFiled: December 17, 2012Date of Patent: September 2, 2014Assignee: Intermolecular, Inc.Inventors: Sunil Shanker, Tony P. Chiang, Chi-I Lang, Sandip Niyogi
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Publication number: 20140231744Abstract: Resistive switching memory elements are provided that may contain electroless metal electrodes and metal oxides formed from electroless metal. The resistive switching memory elements may exhibit bistability and may be used in high-density multi-layer memory integrated circuits. Electroless conductive materials such as nickel-based materials may be selectively deposited on a conductor on a silicon wafer or other suitable substrate. The electroless conductive materials can be oxidized to form a metal oxide for a resistive switching memory element. Multiple layers of conductive materials can be deposited each of which has a different oxidation rate. The differential oxidization rates of the conductive layers can be exploited to ensure that metal oxide layers of desired thicknesses are formed during fabrication.Type: ApplicationFiled: April 29, 2014Publication date: August 21, 2014Applicant: Intermolecular Inc.Inventors: Nitin Kumar, Tony P. Chiang, Chi-I Lang, Zhi-Wen Wen Sun, Jinhong Tong
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Patent number: 8809161Abstract: Methods of this invention relate to filling gaps on substrates with a solid dielectric material by forming a flowable film in the gap. The flowable film provides consistent, void-free gap fill. The film is then converted to a solid dielectric material. In this manner gaps on the substrate are filled with a solid dielectric material. According to various embodiments, the methods involve reacting a dielectric precursor with an oxidant to form the dielectric material. In certain embodiments, the dielectric precursor condenses and subsequently reacts with the oxidant to form dielectric material. In certain embodiments, vapor phase reactants react to form a condensed flowable film.Type: GrantFiled: July 3, 2013Date of Patent: August 19, 2014Assignee: Novellus Systems, Inc.Inventors: Vishal Gauri, Raashina Humayun, Chi-I Lang, Judy H. Huang, Michael Barnes, Sunil Shanker
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Publication number: 20140227880Abstract: According to various embodiments of the disclosure, an apparatus and method for enhanced deposition and etch techniques is described, including a pedestal, the pedestal having at least two electrodes embedded in the pedestal, a showerhead above the pedestal, a plasma gas source connected to the showerhead, wherein the showerhead is configured to deliver plasma gas to a processing region between the showerhead and the substrate and a power source operably connected to the showerhead and the at least two electrodes with plasma being substantially contained in an area which corresponds with one electrode of the at least two electrodes.Type: ApplicationFiled: April 15, 2014Publication date: August 14, 2014Applicant: Intermolecular, Inc.Inventors: Sunil Shanker, Tony P. Chiang, Chi-I Lang
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Publication number: 20140174907Abstract: A deposition chamber is provided. The deposition chamber includes a plurality of sputter guns disposed within the chamber, wherein the plurality of sputter guns are operable to vertically extend and retract within the chamber and wherein each gun of the plurality of sputter guns is pivotable around a pivot axis. The chamber includes a substrate support rotatable around a first axis and a second axis and a plate disposed over the substrate support. The plate has a plurality of apertures extending therethrough. The plurality of apertures includes an aperture located below each sputter gun of the plurality of sputter guns and a centrally located aperture.Type: ApplicationFiled: December 21, 2012Publication date: June 26, 2014Applicant: INTERMOLECULAR, INC.Inventors: Hong Sheng Yang, Kent Riley Child, Chi-I Lang, James Tsung
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Publication number: 20140179095Abstract: Embodiments provided herein describe methods and systems for forming gate dielectrics for field effect transistors. A substrate including a germanium channel and a germanium oxide layer on a surface of the germanium channel is provided. A metallic layer is deposited on the germanium oxide layer. The metallic layer may be nanocrystalline or amorphous. The deposition of the metallic layer causes the germanium oxide layer to be reduced such that a metal oxide layer is formed adjacent to the germanium channel.Type: ApplicationFiled: December 21, 2012Publication date: June 26, 2014Applicant: INTERMOLECULAR, INC.Inventors: Sandip Niyogi, Sean Barstow, Chi-I Lang
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Publication number: 20140174918Abstract: A sputter gun is provided. The sputter gun includes a target and a first plate coupled to a surface of the target. A first magnet is disposed over a second magnet. A second plate coupled to a surface of the first magnet and a gap is defined between a surface of the second magnet and a surface of the first plate. A fluid inlet and a fluid outlet are disposed above a surface of the first magnet. A restriction bar is coupled to the second plate, wherein the restriction bar is configured to prevent a flow path of fluid through the first inlet to the second inlet unless the fluid traverses the gap defined between a surface of the second magnet and a surface of the first plate. Alternative configurations of the sputter gun are included.Type: ApplicationFiled: December 20, 2012Publication date: June 26, 2014Applicant: Intermolecular, Inc.Inventors: Hong Sheng Yang, Kent Riley Child, Chi-I Lang, Jingang Su, Danny Wang