Patents by Inventor Chi-I Lang

Chi-I Lang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9245744
    Abstract: According to various embodiments of the disclosure, an apparatus and method for enhanced deposition and etch techniques is described, including a pedestal, the pedestal having at least two electrodes embedded in the pedestal, a showerhead above the pedestal, a plasma gas source connected to the showerhead, wherein the showerhead is configured to deliver plasma gas to a processing region between the showerhead and the substrate and a power source operably connected to the showerhead and the at least two electrodes with plasma being substantially contained in an area which corresponds with one electrode of the at least two electrodes.
    Type: Grant
    Filed: April 15, 2014
    Date of Patent: January 26, 2016
    Assignee: Intermolecular, Inc.
    Inventors: Sunil Shanker, Tony P. Chiang, Chi-I Lang
  • Patent number: 9224644
    Abstract: Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber enclosing a substrate support, a remote plasma source, and a showerhead. A substrate heater can be mounted in the substrate support. A transport system moves the substrate support and is capable of positioning the substrate. The remote plasma source may be used to provide a plasma surface treatment or as a source to incorporate dopants into a pre-deposited layer.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: December 29, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Sandip Niyogi, Amol Joshi, Chi-I Lang, Salil Mujumdar
  • Patent number: 9176181
    Abstract: Measuring current-voltage (I-V) characteristics of a solar cell using a lamp that emits light, a substrate that includes a plurality of solar cells, a positive electrode attached to the solar cells, and a negative electrode peripherally deposited around each of the solar cells and connected to a common ground, an articulation platform coupled to the substrate, a multi-probe switching matrix or a Z-stage device, a programmable switch box coupled to the multi-probe switching matrix or Z-stage device and selectively articulating the probes by raising the probes until in contact with at least one of the positive electrode and the negative electrode and lowering the probes until contact is lost with at least one of the positive electrode and the negative electrode, a source meter coupled to the programmable switch box and measuring the I-V characteristics of the substrate.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: November 3, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Yun Wang, Tony P. Chiang, Chi-I Lang
  • Patent number: 9178145
    Abstract: Resistive switching memory elements are provided that may contain electroless metal electrodes and metal oxides formed from electroless metal. The resistive switching memory elements may exhibit bistability and may be used in high-density multi-layer memory integrated circuits. Electroless conductive materials such as nickel-based materials may be selectively deposited on a conductor on a silicon wafer or other suitable substrate. The electroless conductive materials can be oxidized to form a metal oxide for a resistive switching memory element. Multiple layers of conductive materials can be deposited each of which has a different oxidation rate. The differential oxidization rates of the conductive layers can be exploited to ensure that metal oxide layers of desired thicknesses are formed during fabrication.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: November 3, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Nitin Kumar, Tony P. Chiang, Chi-I Lang, Zhi-Wen Wen Sun, Jinhong Tong
  • Patent number: 9175382
    Abstract: In one aspect of the invention, a process chamber is provided. The chamber includes a plurality of sputter guns with a target affixed to one end of each of the sputter guns. Each of the plurality of sputter guns is coupled to a first power source. The first power source is operable to provide a pulsed power supply to each of the plurality of sputter guns. The pulsed power supply has a duty cycle that is less than 30%. A substrate support disposed at a distance from the plurality of sputter guns is included. The substrate support is coupled to a second power source. The second power source is operable to bias a substrate disposed on the substrate support, wherein the duty cycle of the second power source is synchronized with a duty cycle of the first power source. A method of performing a deposition process is also included.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: November 3, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Hong Sheng Yang, Tony P. Chiang, Kent Riley Child, Chi-I Lang, ShouQian Shao
  • Patent number: 9147841
    Abstract: A resistive-switching memory element is described. The memory element includes a first electrode, a porous layer over the first electrode including a point defect embedded in a plurality of pores of the porous layer, and a second electrode over the porous layer, wherein the nonvolatile memory element is configured to switch between a high resistive state and a low resistive state.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: September 29, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Tony P. Chiang, Chi-I Lang, Prashant B. Phatak
  • Patent number: 9103871
    Abstract: Simultaneous measurement of an internal quantum efficiency and an external quantum efficiency of a solar cell using an emitter that emits light; a three-way beam splitter that splits the light into solar cell light and reference light, wherein the solar cell light strikes the solar cell; a reference detector that detects the reference light; a reflectance detector that detects reflectance light, wherein the reflectance light comprises a portion of the solar cell light reflected off the solar cell; a source meter operatively coupled to the solar cell; a multiplexer operatively coupled to the solar cell, the reference detector, and the reflectance detector; and a computing device that simultaneously computes the internal quantum efficiency and the external quantum efficiency of the solar cell.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: August 11, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Yun Wang, Tony P. Chiang, Chi-I Lang
  • Patent number: 9105563
    Abstract: A method and system includes a first substrate and a second substrate, each substrate comprising a predetermined baseline transmittance value at a predetermine wavelength of light, processing regions on the first substrate by combinatorially varying at least one of materials, process conditions, unit processes, and process sequences associated with the graphene production, performing a first characterization test on the processed regions on the first substrate to generate first results, processing regions on a second substrate in a combinatorial manner by varying at least one of materials, process conditions, unit processes, and process sequences associated with the graphene production based on the first results of the first characterization test, performing a second characterization test on the processed regions on the second substrate to generate second results, and determining whether at least one of the first substrate and the second substrate meet a predetermined quality threshold based on the second res
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: August 11, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Charlene Chen, Tony P. Chiang, Chi-I Lang, Yun Wang
  • Publication number: 20150184298
    Abstract: Apparatus and methods for depositing materials on a plurality of site-isolated regions on a substrate are provided. The deposition uses PECVD or PEALD. The apparatus include an inner chamber with an aperture and barrier that can be used to isolate the regions during the deposition and prevent the remaining portions of the substrate from being exposed to the deposition process. The process parameters for the deposition process are varied among the site-isolate regions in a combinatorial manner.
    Type: Application
    Filed: March 17, 2015
    Publication date: July 2, 2015
    Inventors: ShouQian Shao, Chi-I Lang, Jingang Su
  • Publication number: 20150179509
    Abstract: Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber enclosing a substrate support, a remote plasma source, and a showerhead. A substrate heater can be mounted in the substrate support. A transport system moves the substrate support and is capable of positioning the substrate. The plasma system may be used to generate activated species. The activated species can be used to treat the surfaces of low-k and/or ultra low-k dielectric materials to facilitate improved deposition of diffusion barrier materials.
    Type: Application
    Filed: December 19, 2013
    Publication date: June 25, 2015
    Applicant: Intermolecular, Inc.
    Inventors: Ratsamee Limdulpaiboon, Frank Greer, Chi-I Lang, J. Watanabe, Wenxian Zhu
  • Publication number: 20150147866
    Abstract: A resistive-switching memory element is described. The memory element includes a first electrode, a porous layer over the first electrode including a point defect embedded in a plurality of pores of the porous layer, and a second electrode over the porous layer, wherein the nonvolatile memory element is configured to switch between a high resistive state and a low resistive state.
    Type: Application
    Filed: February 4, 2015
    Publication date: May 28, 2015
    Inventors: Tony P. Chiang, Chi-I Lang, Prashant B. Phatak
  • Patent number: 9023438
    Abstract: Apparatus and methods for depositing materials on a plurality of site-isolated regions on a substrate are provided. The deposition uses PECVD or PEALD. The apparatus include an inner chamber with an aperture and barrier that can be used to isolate the regions during the deposition and prevent the remaining portions of the substrate from being exposed to the deposition process. The process parameters for the deposition process are varied among the site-isolate regions in a combinatorial manner.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: May 5, 2015
    Assignee: Intermolecular, Inc.
    Inventors: ShouQian Shao, Chi-I Lang, Jingang Su
  • Patent number: 8987143
    Abstract: Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber enclosing a substrate support, a remote plasma source, and a showerhead. A substrate heater can be mounted in the substrate support. A transport system moves the substrate support and is capable of positioning the substrate. The plasma system may be used to generate activated hydrogen species. The activated hydrogen species can be used to etch/clean semiconductor oxide surfaces such as silicon oxide or germanium oxide.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: March 24, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Ratsamee Limdulpaiboon, Chi-I Lang, Sandip Niyogi, J. Watanabe
  • Patent number: 8980709
    Abstract: A resistive-switching memory element is described. The memory element includes a first electrode, a porous layer over the first electrode including a point defect embedded in a plurality of pores of the porous layer, and a second electrode over the porous layer, wherein the nonvolatile memory element is configured to switch between a high resistive state and a low resistive state.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: March 17, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Tony P. Chiang, Chi-I Lang, Prashant B. Phatak
  • Publication number: 20150001555
    Abstract: Methods of modifying a patterned semiconductor substrate are presented including: providing a patterned semiconductor substrate surface including a dielectric region and a conductive region; and applying an amphiphilic surface modifier to the dielectric region to modify the dielectric region. In some embodiments, modifying the dielectric region includes modifying a wetting angle of the dielectric region. In some embodiments, modifying the wetting angle includes making a surface of the dielectric region hydrophilic. In some embodiments, methods further include applying an aqueous solution to the patterned semiconductor substrate surface. In some embodiments, the conductive region is selectively enhanced by the aqueous solution. In some embodiments, methods further include providing the dielectric region formed of a low-k dielectric material. In some embodiments, applying the amphiphilic surface modifier modifies an interaction of the low-k dielectric region with a subsequent process.
    Type: Application
    Filed: September 17, 2014
    Publication date: January 1, 2015
    Inventors: Anh Duong, Tony Chiang, Zachary M. Fresco, Nitin Kumar, Chi-I Lang, Jinhong Tong, Anna Tsizelmon
  • Patent number: 8920618
    Abstract: Apparatuses and methods for high-deposition-rate sputtering for depositing layers onto a substrate are disclosed. The apparatuses generally comprise a process chamber; one or more sputtering sources disposed within the process chamber, wherein each sputtering source comprises a sputtering target; a substrate support disposed within the process chamber; a shield positioned between the sputtering sources and the substrate, the shield comprising an aperture positioned under each sputtering source; and a transport system connected to the substrate support capable of positioning the substrate such that one of a plurality of site-isolated regions on the substrate can be exposed to sputtered material through the aperture positioned under each of the sputtering sources; wherein the spacing between the sputtering target and the substrate is less than 100 mm. The apparatus enables high deposition rate sputtering onto site-isolated regions on the substrate.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: December 30, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Hong Sheng Yang, Zhendong Hong, Chi-I Lang
  • Patent number: 8906207
    Abstract: The present disclosure includes a method for control of a film composition with co-sputter physical vapor deposition. In one implementation, the method includes: positioning first and second PVD guns above a substrate, selecting first and second collimators having first and second sets of physical characteristics, positioning the first and second collimators between the first and second PVD guns and the substrate, sputtering at least one material from the first and second PVD guns through the first and second collimators upon application of a first power and second power, wherein the first PVD gun has a first deposition rate from the first collimator at the first power, and the second PVD gun has a second deposition rate from the second collimator at the second power.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: December 9, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Hong Sheng Yang, Chi-I Lang, Tony Chiang
  • Patent number: 8901677
    Abstract: A germanium-containing semiconductor surface is prepared for formation of a dielectric overlayer (e.g., a thin layer of high-k gate dielectric) by (1) removal of native oxide, for example by wet cleaning, (2) additional cleaning with hydrogen species, (3) in-situ formation of a controlled monolayer of GeO2, and (4) in-situ deposition of the dielectric overlayer to prevent uncontrolled regrowth of native oxide. The monolayer of GeO2 promotes uniform nucleation of the dielectric overlayer, but it too thin to appreciably impact the effective oxide thickness of the dielectric overlayer.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: December 2, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Frank Greer, Edwin Adhiprakasha, Chi-I Lang, Ratsamee Limdulpaiboon, Sandip Niyogi, Kurt Pang, J. Watanabe
  • Patent number: 8893923
    Abstract: Provided are methods and systems for dispensing different chemicals used for high productivity combinatorial processing. A dispense panel may include multiple inlet lines for supplying different chemicals. Each inlet line is connected to its own three-way valve that either allows the supplied chemical to flow from the inlet line towards a dispense valve connected to a dispense manifold (during dispensing of the supplied chemical) or allows another chemical to flow from the dispense valve to a waste manifold (during priming of the dispense manifold with this other chemical). Specifically, during priming a chemical supplied from its inlet line and is passed through a corresponding three-way valve and is directed to its dispense valve and then into the dispense manifold. Other dispense valves and three-way valves of the dispense panel allow this chemical to flow out of the dispense manifold, thereby priming remaining parts of the panel.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: November 25, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Satbir Kahlon, Aaron T. Francis, Chi-I Lang, Gregory P. Lim, Jeffrey Chih-Hou Lowe, Robert Anthony Sculac
  • Patent number: 8889479
    Abstract: Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed by depositing a metal-containing material on a silicon-containing material. The metal-containing material may be oxidized to form a resistive-switching metal oxide. The silicon in the silicon-containing material reacts with the metal in the metal-containing material when heat is applied. This forms a metal silicide lower electrode for the nonvolatile memory element. An upper electrode may be deposited on top of the metal oxide. Because the silicon in the silicon-containing layer reacts with some of the metal in the metal-containing layer, the resistive-switching metal oxide that is formed is metal deficient when compared to a stoichiometric metal oxide formed from the same metal.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: November 18, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Nitin Kumar, Tony P. Chiang, Chi-I Lang, Prashant B. Phatak, Jinhong Tong