Abstract: A method of treating cancer. The method includes introducing an effective amount of an oxidative catalyzing agent including titanium oxide, zinc oxide, zirconium oxide, tungsten oxide or tin oxide into a biological entity, and irradiating the biological entity with a ray. The oxidative catalyzing agent produces hydroxyl or hydrogen peroxide radicals after irradiation with the ray thereon.

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor structure including a metal gate (MG) layer formed to fill in a trench between two adjacent interlayer dielectric (ILD) regions; performing a chemical mechanical polishing (CMP) process using a CMP system to planarize the MG layer and the ILD regions; and cleaning the planarized MG layer using a O3/DIW solution including ozone gas (O3) dissolved in deionized water (DIW). The MG layer is formed on the ILD regions.

Abstract: The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H3PO4 solution.

Abstract: A method includes forming a dummy gate of a transistor at a surface of a wafer, removing the dummy gate, and filling a metallic material into a trench left by the removed dummy gate. A Chemical Mechanical Polish (CMP) is then performed on the metallic material, wherein a remaining portion of the metallic material forms a metal gate of the transistor. After the CMP, a treatment is performed on an exposed top surface of the metal gate using an oxidation-and-etching agent comprising chlorine and oxygen.

Abstract: The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H3PO4 solution.

Abstract: A method includes forming a dummy gate of a transistor at a surface of a wafer, removing the dummy gate, and filling a metallic material into a trench left by the removed dummy gate. A Chemical Mechanical Polish (CMP) is then performed on the metallic material, wherein a remaining portion of the metallic material forms a metal gate of the transistor. After the CMP, a treatment is performed on an exposed top surface of the metal gate using an oxidation-and-etching agent comprising chlorine and oxygen.

Abstract: A method for forming a semiconductor device is provided. The method includes providing a semiconductor substrate and forming a metal gate stack including a metal gate electrode over the semiconductor substrate. The method also includes applying an oxidizing solution containing an oxidizing agent over the metal gate electrode to oxidize the metal gate electrode to form a metal oxide layer on the metal gate electrode.

Abstract: The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H3PO4 solution.

Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate with a metal gate stack formed on the semiconductor substrate, and the metal gate stack includes a metal gate electrode. The semiconductor device also includes a metal oxide layer formed over the metal gate stack and in direct contact with the metal gate electrode, and a thickness of the metal oxide layer is in a range from about 15 ? to about 40 ?. The metal oxide layer has a first portion made of an oxidized material of the metal gate electrode and has a second portion made of a material different from that of the first portion.

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor structure including a metal gate (MG) layer formed to fill in a trench between two adjacent interlayer dielectric (ILD) regions; performing a chemical mechanical polishing (CMP) process using a CMP system to planarize the MG layer and the ILD regions; and cleaning the planarized MG layer using a O3/DIW solution including ozone gas (O3) dissolved in deionized water (DIW). The MG layer is formed on the ILD regions.

Abstract: A method of manufacturing a semiconductor device includes providing a semiconductor substrate and forming a structure over the semiconductor substrate. The structure includes a sacrificial dielectric on the semiconductor substrate and a dummy gate over the sacrificial dielectric. The method further includes removing the dummy gate and the sacrificial dielectric from the structure thereby forming a trench. The method further includes filling a metal layer into the trench and covering over a top surface of an inter layer dielectric (ILD). The method also includes performing a chemical mechanical polishing (CMP) to expose the top surface of the ILD and heating the top surface of the ILD. Moreover, the method includes forming an etch stop layer on the top surface of the ILD.

Abstract: A method includes forming a dummy gate of a transistor at a surface of a wafer, removing the dummy gate, and filling a metallic material into a trench left by the removed dummy gate. A Chemical Mechanical Polish (CMP) is then performed on the metallic material, wherein a remaining portion of the metallic material forms a metal gate of the transistor. After the CMP, a treatment is performed on an exposed top surface of the metal gate using an oxidation-and-etching agent comprising chlorine and oxygen.

Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate with a metal gate stack formed on the semiconductor substrate, and the metal gate stack includes a metal gate electrode. The semiconductor device also includes a metal oxide layer formed over the metal gate stack and in direct contact with the metal gate electrode, and a thickness of the metal oxide layer is in a range from about 15 ? to about 40 ?. The metal oxide layer has a first portion made of an oxidized material of the metal gate electrode and has a second portion made of a material different from that of the first portion.

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a first gate structure over an iso region of a substrate and a second gate structure over a dense region of the substrate. The dense region has a greater pattern density than the iso region. The first and second gate structures each have a respective hard mask disposed thereon. The method includes removing the hard masks from the first and second gate structures. The removal of the hard mask from the second gate structure causes an opening to be formed in the second gate structure. The method includes performing a deposition process followed by a first polishing process to form a sacrificial component in the opening. The method includes performing a second polishing process to remove the sacrificial component and portions of the first and second gate structures.

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a first gate structure over an iso region of a substrate and a second gate structure over a dense region of the substrate. The dense region has a greater pattern density than the iso region. The first and second gate structures each have a respective hard mask disposed thereon. The method includes removing the hard masks from the first and second gate structures. The removal of the hard mask from the second gate structure causes an opening to be formed in the second gate structure. The method includes performing a deposition process followed by a first polishing process to form a sacrificial component in the opening. The method includes performing a second polishing process to remove the sacrificial component and portions of the first and second gate structures.

Abstract: An intelligent thin film solar cell having temperature dependent infrared light transmittance capability, comprising: a transparent substrate, an upper electrode layer, a photovoltaic layer, a lower electrode layer, a temperature dependent optical layer, and an ultra-thin conductive layer. Said upper electrode layer is disposed on said transparent substrate, said photovoltaic layer is disposed on said upper electrode layer, and said lower electrode layer is disposed on said photovoltaic layer. Said temperature dependent optical layer is disposed between said photovoltaic layer and said lower electrode layer, and its transmittance to infrared light is dependent on variations of temperature. When temperature of said temperature dependent optical layer increases to a specific range, transmittance of said temperature dependent optical layer to said infrared light is reduced.

Abstract: An office building, comprising a building body and at least a thin film solar cell. Said building body is provided with a top portion, and said thin film solar cell is arranged on said top portion of said building body. Said thin film solar cell absorbs green light, blue light, and ultraviolet light in sunlight, and converts them into electrical energy, and reflects a part of infrared light and said ultraviolet light that are not absorbed; while red light, orange light, and yellow light pass through said thin film solar cell and reach inside of said building body.

Abstract: An outdoor base station house having thin film solar cells, comprising: a sentry-box-shaped building body, at least a thin film solar cell, and a power source module. Said sentry-box-shaped building body is provided with a top portion, and said thin film solar cells are arranged on said top portion of said sentry-box-shaped building body. Said thin film solar cells absorb green light, blue light, and ultraviolet light, and convert them into electrical energy, and reflect part of infrared light and said ultraviolet light that are not absorbed. Red light, orange light, yellow light pass through said thin film solar cells and reach inside of said sentry-box-shaped building body. Said power source module is disposed inside said sentry-box-shaped building body, and stores electrical energy converted by thin film solar cells for supplying it to a wireless communication base station.

Abstract: A cell module, comprising: a first solar cell, and a second solar cell. Said first solar cell absorbs green light, blue light, and ultraviolet light and converts them into electrical energy; while red light, orange light, yellow light, and infrared light are allowed to pass through said first solar cell. Said second solar cell is located below said first solar cell and is shielded by said first solar cell, and is combined with said first solar cell into said cell module. Said second solar cell absorbs said red light, said orange light, said yellow light, and said infrared light passing through said first solar cell, and converts them into electrical energy.

Abstract: A support structure made of precast concrete and a building thereof, comprising a building top portion and at least a support structure. Said building top portion includes at least a thin film solar cell and a steel frame lateral beam structure supporting said thin film solar cell. Each said support structure includes a support column and a base, said support column supports said building top portion, and said base is at bottom of said support column. Said support column and said base form integrally into one piece by means of concrete material.