Patents by Inventor Chi Sheng Tseng
Chi Sheng Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12321513Abstract: The present disclosure provides a body-part tracking device and a body-part tracking method. The body-part tracking device includes a first electronic component and a first antenna element. The first antenna element is electrically connected to the first electronic component and configured to receive a first wave. The first electronic component is configured to, in response to the first wave, transmit a second wave.Type: GrantFiled: June 18, 2021Date of Patent: June 3, 2025Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chi Sheng Tseng, Lu-Ming Lai, Hui-Chung Liu, I Hung Wu, Kai-Sheng Pai
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Publication number: 20250096774Abstract: The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate, a first electronic component and a support component. The first electronic component is disposed on the substrate. The first electronic component has a backside surface facing a first surface of the substrate. The support component is disposed between the backside surface of the first electronic component and the first surface of the substrate. The backside surface of the first electronic component has a first portion connected to the support component and a second portion exposed from the support component.Type: ApplicationFiled: December 3, 2024Publication date: March 20, 2025Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chi Sheng TSENG, Lu-Ming LAI, Ching-Han HUANG, Kuo-Hua LAI, Hui-Chung LIU
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Patent number: 12184266Abstract: The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate, a first electronic component and a support component. The first electronic component is disposed on the substrate. The first electronic component has a backside surface facing a first surface of the substrate. The support component is disposed between the backside surface of the first electronic component and the first surface of the substrate. The backside surface of the first electronic component has a first portion connected to the support component and a second portion exposed from the support component.Type: GrantFiled: February 21, 2023Date of Patent: December 31, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chi Sheng Tseng, Lu-Ming Lai, Ching-Han Huang, Kuo-Hua Lai, Hui-Chung Liu
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Publication number: 20240243124Abstract: A method for fabricating a semiconductor device includes the steps of first forming a first gate structure on a substrate and then forming a first epitaxial layer adjacent to the first gate structure. Preferably, a top surface of the first epitaxial layer includes a first curve, a second curve, and a third curve connecting the first curve and the second curve, in which the first curve and the second curve include curves concave downward while the third curve includes a curve concave upward.Type: ApplicationFiled: February 15, 2023Publication date: July 18, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chih-Wei Yang, Shih-Min Lu, Chi-Sheng Tseng, Yao-Jhan Wang, Chun-Hsien Lin
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Patent number: 11817397Abstract: A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a carrier, a sensor module, a connector, and a stress buffer structure. The sensor module is disposed on the carrier. The connector is connected to the carrier. The stress buffer structure connects the connector to the sensor module.Type: GrantFiled: December 21, 2020Date of Patent: November 14, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chi Sheng Tseng, Lu-Ming Lai, Hui-Chung Liu, Yu-Che Huang
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Publication number: 20230208394Abstract: The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate, a first electronic component and a support component. The first electronic component is disposed on the substrate. The first electronic component has a backside surface facing a first surface of the substrate. The support component is disposed between the backside surface of the first electronic component and the first surface of the substrate. The backside surface of the first electronic component has a first portion connected to the support component and a second portion exposed from the support component.Type: ApplicationFiled: February 21, 2023Publication date: June 29, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chi Sheng TSENG, Lu-Ming LAI, Ching-Han HUANG, Kuo-Hua LAI, Hui-Chung LIU
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Patent number: 11588470Abstract: The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate, a first electronic component and a support component. The first electronic component is disposed on the substrate. The first electronic component has a backside surface facing a first surface of the substrate. The support component is disposed between the backside surface of the first electronic component and the first surface of the substrate. The backside surface of the first electronic component has a first portion connected to the support component and a second portion exposed from the support component.Type: GrantFiled: February 18, 2020Date of Patent: February 21, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chi Sheng Tseng, Lu-Ming Lai, Ching-Han Huang, Kuo-Hua Lai, Hui-Chung Liu
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Publication number: 20220404908Abstract: The present disclosure provides a body-part tracking device and a body-part tracking method. The body-part tracking device includes a first electronic component and a first antenna element. The first antenna element is electrically connected to the first electronic component and configured to receive a first wave. The first electronic component is configured to, in response to the first wave, transmit a second wave.Type: ApplicationFiled: June 18, 2021Publication date: December 22, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chi Sheng TSENG, Lu-Ming LAI, Hui-Chung LIU, I Hung WU, Kai-Sheng PAI
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Patent number: 11527671Abstract: An optical package structure includes a substrate, an emitter, a first detector and a light-absorption material. The substrate has a first surface and a second surface opposite to the first surface, the substrate includes a via defining a third surface extending from the first surface to the second surface. The emitter is disposed on the first surface of the substrate. The first detector is disposed on the first surface and aligned with the via of the substrate. The light-absorption material is disposed on the third surface of the substrate.Type: GrantFiled: December 31, 2019Date of Patent: December 13, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chi Sheng Tseng, Hui-Chung Liu, Ching-Han Huang
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Publication number: 20220199550Abstract: A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a carrier, a sensor module, a connector, and a stress buffer structure. The sensor module is disposed on the carrier. The connector is connected to the carrier. The stress buffer structure connects the connector to the sensor module.Type: ApplicationFiled: December 21, 2020Publication date: June 23, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chi Sheng TSENG, Lu-Ming LAI, Hui-Chung LIU, Yu-Che HUANG
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Patent number: 11296651Abstract: A semiconductor package structure includes an organic substrate having a first surface, a first recess depressed from the first surface, a first chip over the first surface and covering the first recess, thereby defining a first cavity enclosed by a back surface of the first chip and the first recess, and a second chip over the first chip. The first cavity is an air cavity or a vacuum cavity.Type: GrantFiled: October 19, 2020Date of Patent: April 5, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chi Sheng Tseng, Lu-Ming Lai, Ching-Han Huang, Hui-Chung Liu, Kuo-Hua Lai, Cheng-Ling Huang
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Patent number: 11289433Abstract: A semiconductor package structure includes a carrier, an antenna element, an electronic component, and a conductive structure. The antenna element, which includes an exposed portion, is disposed on the carrier. The conductive structure is disposed between the carrier and the exposed portion of the antenna element. The conductive structure electrically connects the electronic component to the carrier. The carrier, the exposed portion of the antenna element, and the conductive structure define an air space to accommodate the electronic component and to space the electronic component apart from the conductive structure.Type: GrantFiled: January 10, 2020Date of Patent: March 29, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chi Sheng Tseng, I Hung Wu
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Patent number: 11217499Abstract: A semiconductor package structure includes a substrate; a first die on the substrate, wherein an active surface of the first die is facing away from the substrate; a second die on the active surface of the first die, electrically connected to the first die through a plurality of conductive terminals; and a sealing structure on the active surface of the first die, surrounding the plurality of conductive terminals and abutting the second die thereby forming a cavity between the first die and the second die. A method for manufacturing the semiconductor package structure is also provided.Type: GrantFiled: June 21, 2019Date of Patent: January 4, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chi Sheng Tseng, Lu-Ming Lai, Hui-Chung Liu
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Publication number: 20210358823Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a semiconductor package structure includes a semiconductor die and a light absorbing layer. The semiconductor die has a first surface, a second surface and a third surface. An active layer of the semiconductor die is adjacent to the first surface. The second surface is opposite to the first surface. The third surface extends from the first surface to the second surface. The light absorbing layer covers the second surface and the third surface of the semiconductor die. The semiconductor die has a thickness defined from the first surface to the second surface, and the thickness of the semiconductor die is less than or equal to about 300 micrometers (?m).Type: ApplicationFiled: May 18, 2020Publication date: November 18, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chi Sheng TSENG, Lu-Ming LAI, Yu-Che HUANG, Shih-Chieh TANG, Yu-Min PENG, Hui-Chung LIU
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Patent number: 11174157Abstract: A semiconductor device package includes a semiconductor device, a non-semiconductor substrate over the semiconductor device, and a first connection element extending from the semiconductor device to the non-semiconductor substrate and electrically connecting the semiconductor device to the non-semiconductor substrate.Type: GrantFiled: June 25, 2019Date of Patent: November 16, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING INC.Inventors: Chi Sheng Tseng, Lu-Ming Lai, Yu-Hsuan Tsai, Yin-Hao Chen, Hsin Lin Wu, San-Kuei Yu
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Publication number: 20210257988Abstract: The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate, a first electronic component and a support component. The first electronic component is disposed on the substrate. The first electronic component has a backside surface facing a first surface of the substrate. The support component is disposed between the backside surface of the first electronic component and the first surface of the substrate. The backside surface of the first electronic component has a first portion connected to the support component and a second portion exposed from the support component.Type: ApplicationFiled: February 18, 2020Publication date: August 19, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chi Sheng TSENG, Lu-Ming LAI, Ching-Han HUANG, Kuo-Hua LAI, Hui-Chung LIU
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Patent number: 11088054Abstract: A lead frame includes a die pad having a pad top surface and a pad bottom surface opposite to the top pad surface, a plurality of leads, each having a top lead surface and a bottom lead surface opposite to the top lead surface and disposed around the die pad, and a first molding compound disposed between the die pad and each of the leads. The first molding compound exposes the top pad surface of the die pad by covering a portion of the periphery of the top pad surface of the die pad. A method for manufacturing the lead frame is also disclosed.Type: GrantFiled: September 13, 2019Date of Patent: August 10, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chi Sheng Tseng, Lu-Ming Lai, Ying-Chung Chen, Hui-Chung Liu
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Publication number: 20210202780Abstract: An optical package structure includes a substrate, an emitter, a first detector and a light-absorption material. The substrate has a first surface and a second surface opposite to the first surface, the substrate includes a via defining a third surface extending from the first surface to the second surface. The emitter is disposed on the first surface of the substrate. The first detector is disposed on the first surface and aligned with the via of the substrate. The light-absorption material is disposed on the third surface of the substrate.Type: ApplicationFiled: December 31, 2019Publication date: July 1, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chi Sheng TSENG, Hui-Chung LIU, Ching-Han HUANG
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Publication number: 20210082791Abstract: A lead frame includes a die pad having a pad top surface and a pad bottom surface opposite to the top pad surface, a plurality of leads, each having a top lead surface and a bottom lead surface opposite to the top lead surface and disposed around the die pad, and a first molding compound disposed between the die pad and each of the leads. The first molding compound exposes the top pad surface of the die pad by covering a portion of the periphery of the top pad surface of the die pad. A method for manufacturing the lead frame is also disclosed.Type: ApplicationFiled: September 13, 2019Publication date: March 18, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chi Sheng TSENG, Lu-Ming LAI, Ying-Chung CHEN, Hui-Chung LIU
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Publication number: 20210036658Abstract: A semiconductor package structure includes an organic substrate having a first surface, a first recess depressed from the first surface, a first chip over the first surface and covering the first recess, thereby defining a first cavity enclosed by a back surface of the first chip and the first recess, and a second chip over the first chip. The first cavity is an air cavity or a vacuum cavity.Type: ApplicationFiled: October 19, 2020Publication date: February 4, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chi Sheng TSENG, Lu-Ming LAI, Ching-Han HUANG, Hui-Chung LIU, Kuo-Hua LAI, Cheng-Ling HUANG