Patents by Inventor Chi-Sun Hwang

Chi-Sun Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240213372
    Abstract: Provided is a method for manufacturing a vertical channel thin film transistor. The method for manufacturing the vertical channel thin film transistor includes forming a bottom source drain electrode, forming a first interlayer insulating layer, forming first middle source drain electrodes, forming a second interlayer insulating layer, forming a top source drain electrode, forming an opening through which portions of the bottom source drain electrode, the first middle source drain electrodes, and the top source drain electrode are exposed, forming channel layers, forming a gate insulating layer on the channel layers, the bottom source drain electrode, the first middle source drain electrodes, and the top source drain electrode, and forming gate electrodes on the gate insulating layer.
    Type: Application
    Filed: October 16, 2023
    Publication date: June 27, 2024
    Inventors: Yong Hae KIM, Jong-Heon YANG, Seong-Mok CHO, Ji Hun CHOI, Jae-Eun PI, Chi-Sun HWANG
  • Patent number: 12021151
    Abstract: A vertical channel thin film transistor includes substrate, lower source/drain electrode, spacer layer, upper source/drain electrode covering portion of upper surface of the spacer layer, interlayer insulating pattern covering portion of upper surface of the upper source/drain electrode and upper surface of the spacer layer exposed by the upper source/drain electrode, contact hole disposed on the lower source/drain electrode and passing through the interlayer insulating pattern, the upper source/drain electrode, and the spacer layer, active pattern covering inner wall and bottom surface of the contact hole and extending over upper surface of the upper source/drain electrode and upper surface of the interlayer insulating pattern, gate insulating pattern filling portion of the contact hole and extending along upper surface of the active pattern, and gate electrode filling portion of the contact hole and extending along upper surface of the gate insulating pattern.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: June 25, 2024
    Assignees: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Chi-Sun Hwang, SangHee Park, KwangHeum Lee, Jae-Eun Pi, SeungHee Lee, Jong-Heon Yang, Ji Hun Choi
  • Patent number: 12013662
    Abstract: An apparatus which analyses a depth of a holographic image is provided. The apparatus includes an acquisition unit that acquires a hologram, a restoration unit that restores a three-dimensional holographic image by irradiating the hologram with a light source, an image sensing unit that senses a depth information image of the restored holographic image, and an analysis display unit that analyzes a depth quality of the holographic image, based on the sensed depth information image, and the image sensing unit uses a lensless type of photosensor.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: June 18, 2024
    Assignees: Electronics and Telecommunications Research Institute, MVTECH
    Inventors: Jae-Eun Pi, Yong Hae Kim, Jong-Heon Yang, Chul Woong Joo, Chi-Sun Hwang, Ha Kyun Lee, Seung Youl Kang, Gi Heon Kim, Joo Yeon Kim, Hee-ok Kim, Jeho Na, Jaehyun Moon, Won Jae Lee, Seong-Mok Cho, Ji Hun Choi
  • Publication number: 20240128653
    Abstract: Disclosed is a meta-structure. The meta-structure includes a lower electrode, a lower insulating layer on the lower electrode, a lower metal oxide layer on the lower insulating layer, a metal layer on the lower metal oxide layer, an upper metal oxide layer on the metal layer, an upper insulating layer on the upper metal oxide layer, and antenna electrodes on the upper insulating layer.
    Type: Application
    Filed: June 28, 2023
    Publication date: April 18, 2024
    Inventors: Yong Hae KIM, Chi-Sun HWANG, Joo Yeon KIM, Jaehyun MOON, Jong-Heon YANG, Kyunghee CHOI, Ji Hun CHOI
  • Publication number: 20240079413
    Abstract: A complementary thin film transistor (TFT) includes a substrate and a first TFT and a second TFT disposed on the substrate, wherein a first conductive semiconductor layer of the first TFT and a second gate electrode layer of the second TFT are disposed in the same layer and include the same material.
    Type: Application
    Filed: August 31, 2023
    Publication date: March 7, 2024
    Inventors: Himchan OH, Jong-Heon YANG, Ji Hun CHOI, Seung Youl KANG, Yong Hae KIM, Jeho NA, Jaehyun MOON, Chan Woo PARK, Sung Haeng CHO, Jae-Eun PI, Chi-Sun HWANG
  • Patent number: 11921383
    Abstract: Provided is a liquid crystal display device and a method for operating the liquid crystal display device. In the liquid crystal display device including a plurality of pixels, one pixel of the plurality of pixels includes a first sub pixel and a second sub pixel, which are adjacent to each other. The one pixel includes a first substrate, a first electrode provided on the first substrate, metamaterial layers provided on the first electrode, wherein the metamaterial layers include a first metamaterial layer within the first sub pixel and a second metamaterial layer within the second sub pixel, a liquid crystal layer provided on the first and second metamaterial layers, a second electrode provided on the liquid crystal layer, and a second substrate provided on the second electrode. The first and second metamaterial layers include metamaterials having properties different from each other, respectively.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: March 5, 2024
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Hae Kim, Chi-Sun Hwang
  • Publication number: 20240061306
    Abstract: Disclosed is a meta-structure. The meta-structure includes a lower electrode, a lower insulating layer on the lower electrode, a lower metal oxide layer on the lower insulating layer, a lower metal layer on the lower metal oxide layer, a middle metal oxide layer on the lower metal layer, an upper metal layer on the middle metal oxide layer, an upper metal oxide layer on the upper metal layer, an upper insulating layer on the upper metal oxide layer, and antenna electrodes on the upper insulating layer.
    Type: Application
    Filed: June 27, 2023
    Publication date: February 22, 2024
    Inventors: Yong Hae KIM, Chi-Sun HWANG, Kyunghee CHOI, Joo Yeon KIM, Jaehyun MOON, Jong-Heon YANG, Ji Hun CHOI
  • Publication number: 20240006516
    Abstract: An embodiment of the inventive concept provides a thin film transistor and a manufacturing method of the same. The manufacturing method includes forming a data electrode on one side of a substrate, forming a spacer layer on a portion of the data electrode and the other side of the substrate, forming a drain electrode on a top surface of the spacer layer, forming an active layer on a sidewall of the spacer layer, the drain electrode, and the data electrode, forming a gate insulation film that covers the active layer on the sidewall of the spacer layer, and forming a doped layer on the gate insulation film and the active layer outside the gate insulation film to form impurity regions at both sides, respectively, of the active layer.
    Type: Application
    Filed: May 22, 2023
    Publication date: January 4, 2024
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Yong Hae KIM, Chi-Sun HWANG, Jong-Heon YANG
  • Patent number: 11832486
    Abstract: Provided are a semiconductor device, a display panel, and a display device including the same. The semiconductor device includes a lower electrode on one side of a substrate, a spacer on another side of the substrate, a middle electrode on the spacer, a lower channel layer on portions of a sidewall of the spacer, the middle electrode, and the lower electrode, a lower gate insulating layer on the lower channel layer, a common gate electrode on the gate insulating layer, an upper gate insulating layer on the common gate electrode, an upper electrode on the spacer and the upper gate insulating layer of the middle electrode, an upper channel layer connected to the upper electrode and disposed on a sidewall of the upper gate insulating layer, and a contact electrode connected to a portion of the upper channel layer and passing through the lower gate insulating layer and the upper gate insulating layer outside the common gate electrode so as to be connected to the lower electrode.
    Type: Grant
    Filed: September 13, 2022
    Date of Patent: November 28, 2023
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jong-Heon Yang, Seung Youl Kang, Yong Hae Kim, Hee-ok Kim, Jeho Na, Jaehyun Moon, Chan Woo Park, Himchan Oh, Seong-Mok Cho, Sung Haeng Cho, Ji Hun Choi, Jae-Eun Pi, Chi-Sun Hwang
  • Publication number: 20230280620
    Abstract: Provided is a liquid crystal display device and a method for operating the liquid crystal display device. In the liquid crystal display device including a plurality of pixels, one pixel of the plurality of pixels includes a first sub pixel and a second sub pixel, which are adjacent to each other. The one pixel includes a first substrate, a first electrode provided on the first substrate, metamaterial layers provided on the first electrode, wherein the metamaterial layers include a first metamaterial layer within the first sub pixel and a second metamaterial layer within the second sub pixel, a liquid crystal layer provided on the first and second metamaterial layers, a second electrode provided on the liquid crystal layer, and a second substrate provided on the second electrode. The first and second metamaterial layers include metamaterials having properties different from each other, respectively.
    Type: Application
    Filed: December 19, 2022
    Publication date: September 7, 2023
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Yong Hae KIM, Chi-Sun HWANG
  • Patent number: 11726330
    Abstract: Provided are a display device and an augmented reality apparatus including the same. The display device includes a display panel including display blocks and an optics array including pin hole structures that one-to-one correspond to the display blocks. Here, each of the pin hole structures includes a pin hole and a shielding area surrounding the pin hole, and the display blocks are spaced apart from each other in a first direction parallel to a top surface of the display panel and a second direction crossing the first direction and parallel to the top surface of the display panel.
    Type: Grant
    Filed: January 21, 2021
    Date of Patent: August 15, 2023
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Seong-Mok Cho, Yong Hae Kim, Hyunkoo Lee, Sang Hoon Cheon, Kyunghee Choi, Chi-Sun Hwang
  • Patent number: 11706946
    Abstract: Provided is a stretchable display device. The stretchable display device includes a substrate and a base pattern on the substrate, wherein the base pattern comprises a first portion, a second portion, and a connection portion configured to connect the first portion to the second portion. The stretchable display device includes a lower electrode on the first portion of the base pattern; an upper electrode on the lower electrode, a light emitting structure between the lower electrode and the upper electrode, and a protective layer configured to cover top and side surfaces of the upper electrode, side surfaces of the light emitting structure, a side surface of the lower electrode, and a portion of a side surface of the base pattern. The upper electrode extends to a top surface of the connection portion and a top surface of the second portion of the base pattern, and the first portion and the second portion of the base pattern extend in a first direction parallel to a top surface of the substrate.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: July 18, 2023
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Ji-Young Oh, Himchan Oh, Chul Woong Joo, Seung Youl Kang, Chan Woo Park, Seongdeok Ahn, Jae-Eun Pi, Chi-Sun Hwang
  • Publication number: 20230091070
    Abstract: Provided are stretchable electronics and a method for manufacturing the same. The stretchable electronics may include a substrate, a plurality of electronic elements disposed to be spaced apart from each other on the substrate, and a wire structure disposed on the substrate to connect the plurality of electronic elements to each other. The wire structure may include an insulator extending from one of the electronic elements to the other of the adjacent electronic elements and a metal wire configured to cover a top surface and side surfaces of the insulator. The insulator may include at least one bent part in a plan view.
    Type: Application
    Filed: August 16, 2022
    Publication date: March 23, 2023
    Inventors: Ji Hun CHOI, Chan Woo PARK, Ji-Young OH, Seung Youl KANG, Yong Hae KIM, Hee-ok KIM, Jeho NA, Jaehyun MOON, Jong-Heon YANG, Himchan OH, Seong-Mok CHO, Sung Haeng CHO, Jae-Eun PI, Chi-Sun HWANG
  • Publication number: 20230083225
    Abstract: Provided are a semiconductor device, a display panel, and a display device including the same. The semiconductor device includes a lower electrode on one side of a substrate, a spacer on another side of the substrate, a middle electrode on the spacer, a lower channel layer on portions of a sidewall of the spacer, the middle electrode, and the lower electrode, a lower gate insulating layer on the lower channel layer, a common gate electrode on the gate insulating layer, an upper gate insulating layer on the common gate electrode, an upper electrode on the spacer and the upper gate insulating layer of the middle electrode, an upper channel layer connected to the upper electrode and disposed on a sidewall of the upper gate insulating layer, and a contact electrode connected to a portion of the upper channel layer and passing through the lower gate insulating layer and the upper gate insulating layer outside the common gate electrode so as to be connected to the lower electrode.
    Type: Application
    Filed: September 13, 2022
    Publication date: March 16, 2023
    Inventors: Jong-Heon YANG, Seung Youl KANG, Yong Hae KIM, Hee-ok KIM, Jeho NA, Jaehyun MOON, Chan Woo PARK, Himchan OH, Seong-Mok CHO, Sung Haeng CHO, Ji Hun CHOI, Jae-Eun PI, Chi-Sun HWANG
  • Patent number: 11604386
    Abstract: A method for manufacturing a window includes preparing a liquid crystal device comprising a support substrate, a first electrode, a liquid crystal layer, and a sacrificial structure. The method further includes removing the sacrificial structure from the liquid crystal device, forming a second electrode disposed on a glass layer, and attaching the liquid crystal device to the second electrode.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: March 14, 2023
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Gi Heon Kim, Sujung Kim, Yong Hae Kim, Chi-Sun Hwang
  • Patent number: 11550198
    Abstract: Provided is an electrochromic display device including: a first substrate; a second substrate on the first substrate; an electrolyte layer disposed between the first substrate and the second substrate; a first transparent electrode provided between the electrolyte layer and the first substrate; second transparent electrodes provided between the electrolyte layer and the second substrate; a first electrochromic layer provided between the first transparent electrode and the electrolyte layer; and a second electrochromic layer provided between the second transparent electrodes and the electrolyte layer, wherein the second transparent electrodes each extend in a first direction and be disposed apart from each other in a second direction perpendicular to the first direction, the second electrochromic layer extends between the second transparent electrodes and contacts a lower surface of the second substrate, the first electrochromic layer includes an inorganic electrochromic material, and the second electrochromic
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: January 10, 2023
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chil Seong Ah, Juhee Song, Hojun Ryu, Tae-Youb Kim, Sang Hoon Cheon, Doo-Hee Cho, Seong-Mok Cho, Chi-Sun Hwang
  • Patent number: 11487348
    Abstract: Provided is a pixel circuit. The pixel circuit includes a conversion element forming a voltage of an input level at a first node, a first transistor adjusting the voltage of the first node to a first level in response to a first signal received at a first time interval, a first capacitive element forming a voltage at a second node based on the voltage of the first node, a second transistor adjusting a level of the voltage of the second node to a second level in response to the first signal, a third transistor forming a voltage at a third node, a fourth transistor outputting a current in response to a second signal received in a second time interval, and a. fifth transistor adjusting the voltage of the third node to a third level in response to a third signal received in a third time interval.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: November 1, 2022
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Chunwon Byun, Young-deuk Jeon, Chi-Sun Hwang, Chan-mo Kang, Yun-Jeong Kim, Hye Jin Kim, Seongdeok Ahn, Jeong Ik Lee, Seong Hyun Kim, Bock Soon Na
  • Patent number: 11424299
    Abstract: Provided is a pressure sensitive display device including a sensing substrate, a reaction substrate provided on the sensing substrate, and spacers provided between the sensing substrate and the reaction substrate to space the sensing substrate apart from the reaction substrate. Here, the sensing substrate includes a flexible substrate and a touch electrode provided on one surface of the flexible substrate, which faces the reaction substrate. The reaction substrate includes a transparent substrate, a transparent electrode provided on one surface of the transparent substrate, which faces the sensing substrate, and a light emitting layer disposed on the transparent electrode.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: August 23, 2022
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Ji-Young Oh, Seung Youl Kang, Seongdeok Ahn, Jeong Ik Lee, Chi-Sun Hwang, Byoung-Hwa Kwon, Tae-Youb Kim, Jeho Na, Sooji Nam, Jaehyun Moon, Young Sam Park, Chan Woo Park, Doo-Hee Cho, Chul Woong Joo, Jae-Eun Pi
  • Patent number: 11392086
    Abstract: A hologram display device includes a light source unit that emits light, a spatial light modulator that modulates the light emitted from the light source unit, and a random pinhole panel. The random pinhole panel includes a plurality of pinholes of a random position or a random size and is arranged in line with an output part of the spatial light modulator. In the hologram display device and the method of manufacturing the hologram display device, a position and size of a random pinhole on the random pinhole are not limited to inside each pixel of the spatial light modulator.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: July 19, 2022
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yong Hae Kim, Seong-Mok Cho, Chi-Sun Hwang, Ji Hun Choi, Gi Heon Kim, Jong-Heon Yang, Sang Hoon Cheon, Kyunghee Choi, Jae-Eun Pi
  • Publication number: 20220214571
    Abstract: A method for manufacturing a window includes preparing a liquid crystal device comprising a support substrate, a first electrode, a liquid crystal layer, and a sacrificial structure. The method further includes removing the sacrificial structure from the liquid crystal device, forming a second electrode disposed on a glass layer, and attaching the liquid crystal device to the second electrode.
    Type: Application
    Filed: March 21, 2022
    Publication date: July 7, 2022
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Gi Heon KIM, Sujung KIM, Yong Hae KIM, Chi-Sun HWANG