Abstract: A temperature sensing device includes a resistor string and a control circuitry. The resistor string includes a variable resistor, a first resistor, and a second resistor which are coupled in series with each other. The resistor string is coupled between a sensing end and a reference ground voltage. The first resistor and the second resistor are coupled to a monitoring end to provide a monitoring voltage. The control circuitry compares the monitoring voltage with a plurality of reference voltages to generate sensing temperature information, and generate adjustment information according to the sensing temperature information. The control circuitry adjusts a resistance provided by the variable resistor according to the adjustment information. The first resistor is a polysilicon resistor, and the second resistor is a silicon carbide diffusion resistor.

Abstract: A driving voltage generating device includes a temperature detector, a controlling circuitry, a voltage generator, and an output stage circuitry. The temperature detector is coupled to a control terminal of a power transistor and is configured to generate temperature detection information by detecting an ambient temperature. The controlling circuitry is coupled to the temperature detector and generates an activation signal by determining whether the ambient temperature is abnormal according to the temperature detection information. The voltage generator generates an operation power according to the activation signal. The output stage circuitry is coupled to the voltage generator, generates a driving voltage according to the operation power, and provides the driving voltage to the control terminal of the power transistor.

Abstract: An electronic device and a temperature detection device thereof are provided. The temperature detection device includes a first resistor, a second resistor, and an operation circuit. The first resistor and the second resistor are coupled in series between a detection end and a first voltage. The first resistor and the second resistor divide a detection voltage on the detection end to generate a monitoring voltage. The operation circuit compares the monitoring voltage with a plurality of reference voltages to generate a plurality of comparison results. The operation circuit performs an operation on the comparison results to generate detection temperature information. The first resistor is a poly-silicon resistor and the second resistor is a silicon carbon (SiC) diffusion resistor.

Abstract: In an embodiment, a method of forming a structure includes forming a first transistor and a second transistor over a first substrate; forming a front-side interconnect structure over the first transistor and the second transistor; etching at least a backside of the first substrate to expose the first transistor and the second transistor; forming a first backside via electrically connected to the first transistor; forming a second backside via electrically connected to the second transistor; depositing a dielectric layer over the first backside via and the second backside via; forming a first conductive line in the dielectric layer, the first conductive line being a power rail electrically connected to the first transistor through the first backside via; and forming a second conductive line in the dielectric layer, the second conductive line being a signal line electrically connected to the second transistor through the second backside via.

Abstract: The present disclosure relates to a semiconductor device including a semiconductor substrate, word lines, mask layers, spacers, a conductive plug, a conductive cap layer, and a dielectric layer. The word lines are disposed over the semiconductor substrate. The mask layers are disposed over the plurality of word line, respectively. The spacers are disposed over opposite sidewalls of the word lines and opposite sidewalls of the mask layers, respectively. The conductive plug is disposed between the word lines. The conductive cap layer is disposed over the conductive plug. The dielectric layer is disposed over the word lines and the spacers. Each of the spacers includes an inner spacer, an outer spacer, and an air gap. The inner spacer is in contact with the respective word line and the respective mask layer. The air gap is disposed between the inner spacer and the outer spacer.

Abstract: Methods, systems, and apparatuses for image segmentation are provided. For example, a computing device may obtain an image, and may apply a process to the image to generate input image feature data and input image segmentation data. Further, the computing device may obtain reference image feature data and reference image classification data for a plurality of reference images. The computing device may generate reference image segmentation data based on the reference image feature data, the reference image classification data, and the input image feature data. The computing device may further blend the input image segmentation data and the reference image segmentation data to generate blended image segmentation data. The computing device may store the blended image segmentation data within a data repository. In some examples, the computing device provides the blended image segmentation data for display.

Abstract: A processing method of a single crystal material includes the following steps. A single crystal material is provided as an object to be modified. The amorphous phase modification apparatus is used for emitting a femtosecond laser beam to process an internal portion of the object to be modified. The processing includes using a femtosecond laser beam to form a plurality of processing lines in the internal portion of the object to be modified, wherein each of the processing lines include a zigzag pattern processing, and a processing line spacing between the plurality of processing lines is in a range of 200 ?m to 600 ?m, wherein after the object to be modified is processed, a modified layer is formed in the object to be modified. Slicing or separating out a portion in the object to be modified that includes the modified layer.

Abstract: A method, comprising: detecting an outage of at least one functionality in a live streaming; performing an first operation toward a second user terminal; storing data of the first operation in a database of the first user terminal; and displaying an effect corresponding to the first operation during the outage. The present disclosure may store the data of operation performed by the user terminal during outage and process the operation after the outage is recovered. Therefore, the streamers and viewers may feel interested and satisfied, instead of feeling anxious, and the user experience may be enhanced.

Abstract: A method includes bonding a first wafer to a second wafer, with a first plurality of dielectric layers in the first wafer and a second plurality of dielectric layers in the second wafer bonded between a first substrate of the first wafer and a second substrate in the second wafer. A first opening is formed in the first substrate, and the first plurality of dielectric layers and the second wafer are etched through the first opening to form a second opening. A metal pad in the second plurality of dielectric layers is exposed to the second opening. A conductive plug is formed extending into the first and the second openings.

Abstract: An immersion cooling system includes a pressure seal tank, an electronic apparatus, a pressure balance pipe and a relief valve. The pressure seal tank is configured to store coolant. A vapor space is formed in the pressure seal tank above the liquid level of the coolant. The electronic apparatus is completely immersed in the coolant. The pressure balance pipe has a gas collection length. The first port of the pressure balance pipe is disposed on the top surface of the pressure seal tank. The relief valve is disposed on the second port of the pressure balance pipe. The second port is farther away from the top surface of the pressure seal tank than the first port. The gas collection length of the pressure equalization tube allows the concentration of vaporized coolant at the first port to be greater than the concentration of vaporized coolant at the second port.

Abstract: An ammonium fluoride gas may be used to form a protection layer for one or more interlayer dielectric layers, one or more insulating caps, and/or one or more source/drain regions of a semiconductor device during a pre-clean etch process. The protection layer can be formed through an oversupply of nitrogen trifluoride during the pre-clean etch process. The oversupply of nitrogen trifluoride causes an increased formation of ammonium fluoride, which coats the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) with a thick protection layer. The protection layer protects the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) during the pre-clean process from being etched by fluorine ions formed during the pre-clean process.

Abstract: A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element. The first substrate includes a dielectric block in the first substrate; and a plurality of first conductive features formed in first inter-metal dielectric layers over the first substrate. The stacked IC device also includes a second semiconductor element bonded on the first semiconductor element. The second semiconductor element includes a second substrate and a plurality of second conductive features formed in second inter-metal dielectric layers over the second substrate. The stacked IC device also includes a conductive deep-interconnection-plug coupled between the first conductive features and the second conductive features. The conductive deep-interconnection-plug is isolated by dielectric block, the first inter-metal-dielectric layers and the second inter-metal-dielectric layers.

Abstract: The present application discloses semiconductor device, including a gate structure arranged on a substrate; a plurality of word lines arranged apart from the gate structure; two porous spacers arranged on two sides of the gate structure; and a first insulating layer arranged on the substrate laterally surrounding the gate structure and the porous spacers; and a second insulating layer arranged over the first insulating layer, wherein a top surface of the gate structure, top surfaces of the plurality of word lines and a top surface of the second insulating layer are level with each other, and wherein a porosity of the porous spacers is between about 25% and about 100%.

Abstract: A silicon carbide semiconductor power transistor includes a silicon carbide substrate, a first drift layer, a second drift layer on the substrate with V-grooves, buried doped regions in the first drift layer below the V-grooves, gates in the V-grooves, a gate insulation layer, a delta doping layer, a well region, source regions, well pick-up regions, conductive trenches, and doping portions. Each of the buried doped regions is a predetermined distance from a bottom of each of the V-grooves. The delta doping layer is disposed in the second drift layer, and the V-grooves are across the delta doping layer. The conductive trenches are disposed in the second drift layer, and each of the conductive trenches passes through the well pick-up regions and contacts with the well region. The doping portions are respectively on sidewalls of the conductive trenches in the well region.

Abstract: An imaging lens assembly of an optical verification system with a FOV greater than 120 degrees, and includes optical lenses from an object side to an image side. The one of the optical lens being the closest to the object side includes: an object side surface and an image side surface of an optical zone; an object side surface of a non-optical-zone surrounding the object side surface of the optical zone; an image side surface of a non-optical zone surrounding the image side surface of the optical zone; and a first connection portion disposed between the image side surface of the optical-zone and the image side surface of the non-optical zone, wherein a first angle between a tangential direction of a surface of the first connection portion and the radial direction is in a range of 15 to 50 degrees.