Abstract: The present invention relates to a reaction platform, which comprises: a machine body with a bottom plate for placing non-porous substrates; and a coater module configured on the top of the machine body and capable of maintaining a preset of a predetermined height for moving along the surface of non-porous substrate, wherein the coater module has one or more slits, and a target liquid can be directly injected or sucking in from the outside of the coater module through the slit, and spreading the target liquid onto a surface of the non-porous substrate while moving along the non-porous substrate; wherein the surface of the non-porous substrate has a target to be coated. The reaction platform of the present invention can not only save time, labor and cost, but also have accurate and reproducible experimental results, showing better results than traditional methods.

Abstract: A consensus-based power control apparatus is provided, which includes a real power control module and a reactive power control module. A real power consensus signal between a first power generating apparatus and a second power generating apparatus is provided and a frequency restoration signal is generated according to the real power consensus signal, thereby allowing the real power control module to generate a real power output signal. A reactive power consensus signal between the first power generating apparatus and the second power generating apparatus is provided and a voltage differential restoration signal is generated according to the reactive power consensus signal, thereby allowing the reactive power control module to generate a reactive power output signal. Therefore, the invention can control real power and reactive power input signals (i.e., actual real power and reactive power outputs) of the first power generating apparatus in a grid system.

Abstract: A consensus-based power control apparatus is provided, which includes a real power control module and a reactive power control module. A real power consensus signal between a first power generating apparatus and a second power generating apparatus is provided and a frequency restoration signal is generated according to the real power consensus signal, thereby allowing the real power control module to generate a real power output signal. A reactive power consensus signal between the first power generating apparatus and the second power generating apparatus is provided and a voltage differential restoration signal is generated according to the reactive power consensus signal, thereby allowing the reactive power control module to generate a reactive power output signal. Therefore, the invention can control real power and reactive power input signals (i.e., actual real power and reactive power outputs) of the first power generating apparatus in a grid system.

Abstract: A method for estimating voltage stability, includes establishing a multi-port equivalent model and the measurement-based equivalent impedance; calculating the reactive power response factor through two consecutive samples from wide-area phasor measurement unit measurement; finding the mitigation factor; constructing the modified coupled single-port model with the modified impedance and voltage; and using the modified maximal loading parameter for voltage stability assessment.

Abstract: A method for optimizing phasor measurement unit placement includes two phase, calculating a degree of each node of a power system; selecting a node with maximum degree as a center and propagate to the entire power system so as to form a spanning tree; selecting a feasible power dominating set (PDS) of minimum cardinality for the spanning tree in the Phase I. In phase II, use the Artificial Bees Colony Algorithm.

Abstract: This invention presents a method of novel nonlinear control for designing Static Synchronous Compensators (STATCOM). A passivity-based approach is proposed for designing robust nonlinear STATCOM controller. The mathematical model of STATCOM will be represented by an Euler-Lagrange (EL) system corresponding to a set of EL parameters. By employing the Park's transformation, the differential geometry approach is used to investigate the power system dynamics with considering STATCOM under the synchronous d-q frame. The energy-dissipative properties of the proposed model derived in the synchronous d-q rotating frame are fully retained. This model also consider the dynamic response of the changable load. Finally, the passivity-based control is employed by using energy shaping and damping injection techniques to produce the proper control signals for Voltage Source Converter. So that the system embedded with STATCOM is more robust and stable.

Abstract: A method to incorporate the steady-state model of the generalized power flow controller into a Newton-Raphson power flow algorithm adopts a flexible steady-state model of the generalized power flow controller, which can be applied to calculate the power flow solution of a power grid embedded with STATCOM, UPFC, GUPFC and the generalized power flow controller in a single framework. The method only incorporates the control variables of the shunt voltage sourced converter into the state vector of the Newton-Raphson power flow algorithm. The increment of the state variables due to incorporating the generalized power flow controller is less than the prior art. Further, the method can preserve the quadratic convergence characteristic of the Newton-Raphson power flow algorithm after embedding the generalized power flow controller into a power grid.

Abstract: The adjoint network reduction technique has been shown to reduce 50% of the computational complexity of constructing the congruence transformation matrix. The method was suitable for analyzing the special multi-port driving-point impedance of RLC interconnect circuits. This technique is extended for the general circumstances of RLC interconnects. Comparative studies among the conventional methods and the proposed methods are also investigated. Experimental results will demonstrate the accuracy and the efficiency of the proposed method.

Abstract: A method estimates the signal delay in a VLSI circuit and accurately estimates the delay and conversion time of a transmission signal in the circuit in order to prevent a designer of the VLSI circuit from erroneously judging the logic made by the designed circuit.

Abstract: A method to incorporate the steady-state model of the generalized power flow controller into a Newton-Raphson power flow algorithm is disclosed. The disclosed method adopts a flexible steady-state model of the generalized power flow controller, which can be applied to calculate the power flow solution of a power grid embedded with STATCOM, UPFC, GUPFC and the generalized power flow controller in a single framework. The disclosed method only incorporates the control variables of the shunt voltage sourced converter into the state vector of Newton-Raphson power flow algorithm. The increment of state variables due to incorporating the generalized power flow controller is less than the prior art. Further, the method can preserve the quadratic convergence characteristic of the Newton-Raphson power flow algorithm after embedding the generalized power flow controller into a power grid.

Abstract: A method of designing a synchronous circuit of VLSI for Clock Skew scheduling and optimization is used to optimize the skew of a digital synchronous VLSI system and formulize the issue of skew optimization into the issue of quadratic equation programming. For estimation of reliability, a quadratic equation cost function is used to analyze an ideal value of skew and an error between feasible solutions. During operation, several algorithms are used to speed up the operation and lower the complexity, and ISCAS'89 is used as a testing circuit.

Abstract: A model reduction method utilizing the rational Arnoldi method with adaptive orders (RAMAO) is applied to high-speed VLSI interconnect models. The method is based on an extension of the classical multi-point Pade approximation, using the rational Arnoldi iteration approach. Given a set of predetermined expansion points, an exact expression for the error between the output moment of the original system and that of the reduced-order system, related to each expansion point, is derived first. In each iteration of the proposed RAMAO algorithm, the expansion frequency corresponding to the maximum output moment error will be chosen. Hence, the corresponding reduced-order model yields the greatest improvement in output moments among all reduced-order models of the same order.

Abstract: Two-sided projection-based model reductions have become a necessity for efficient interconnect modeling and simulations in VLSI design. In order to choose the order of the reduced system that can really reflect the essential dynamics of the original interconnect, the element of reduced model of the transfer function can be considered as a stopping criteria to terminate the non-symmetric Lanczos iteration process. Furthermore, the approximate transfer function can also be expressed as the original interconnect model with some additive perturbations. The perturbation matrix only involves at most a rank-2 modification at the previous step of the non-symmetric algorithm. The information of stopping criteria will provide a guideline for the order selection scheme used in the Lanczos model-order reduction algorithm.

Abstract: This invention relates to a method of designing a digital integrated circuit for a multi-functional digital protective relay, emphasizing a digital module part, and input voltage and current signals are processed by a digital signal processor module to calculate the fundamental wave of the input voltage and current of protective relay, prevent the harmonic components in the input voltage or current from affecting the protective relay in operation; calculate for a root mean square value of voltage and current, being offered to a protective module next to determine a precise value, and the result is sent to the over voltage, under voltage, over current, and under current protective relay, the DSP using a pipeline-based structure, frequency-division fast Fourier transformation, and matrix spin digital algorithm to speed up the operation and reduce the occupied hardware area, which is a design for calculation and protection of the multi-functional digital protective relay.

Abstract: An interconnect model-order reduction method reduces a nano-level semiconductor interconnect network as an original interconnect network by using iteration-based Arnoldi algorithms. The method is performed based on a projection method and has become a necessity for efficient interconnect modeling and simulations. To select an order of the reduced-order model that can efficiently reflect essential dynamics of the original interconnect network, a residual error between transfer functions of the original interconnect network and the reduced interconnect model may be considered as a reference in determining if the iteration process should end, with analytical expressions of the residual error being derived herein. Furthermore, the approximate transfer function of the reduced interconnect model may also be expressed as an addition of the original interconnect model and some additive perturbations. A perturbation matrix is only related with resultant vectors at a previous step of the Arnoldi algorithm.

Abstract: This invention relates to a method of estimating the signal delay in a VLSI circuit and accurately estimating the delay and conversion time of a transmission signal in the circuit in order to prevent a designer of the VLSI circuit from erroneously judging the logic made by the designed circuit.

Abstract: This invention presents a method of novel nonlinear control for designing Static Synchronous Compensators (STATCOM). A passivity-based approach is proposed for designing robust nonlinear STATCOM controller. The mathematical model of STATCOM will be represented by an Euler-Lagrange (EL) system corresponding to a set of EL parameters. By employing the Park's transformation, the differential geometry approach is used to investigate the power system dynamics with considering STATCOM under the synchronous d-q frame. The energy-dissipative properties of the proposed model derived in the synchronous d-q rotating frame are fully retained. This model also consider the dynamic response of the changable load. Finally, the passivity-based control is employed by using energy shaping and damping injection techniques to produce the proper control signals for Voltage Source Converter. So that the system embedded with STATCOM is more robust and stable.

Abstract: A method of searching paths that are susceptible to electrostatic discharge (ESD) at the beginning of an integrated circuit (IC) design is disclosed that includes a circuit spreading out algorithm, a matrix closure algorithm, and a supernode algorithm. The found paths are required to satisfy conditions including that (a) they are connected from a gate of a transistor to a source or a drain thereof, and (b) the head node and the tail node of each path are pins of a top level of the IC. ?1/0/1 matrix multiplication is employed by both the circuit spreading out algorithm and the matrix closure algorithm so as to obtain a result of node connections after a plurality of matrix self-multiplications.

Abstract: A method of reducing a MIMO interconnect circuit system in a global Lanczos algorithm is used for estimation of the error margin between the original model and the reduced model of MIMO circuit system. In the algorithm, a projection matrix and then a circuit of declining order system are given. A turbulence system being added to the original system, the transfer function union is completely identical to the reduced system union given in the algorithm. It proves that the union of preceding 2q order of the transfer function of reduced system may be surely corresponding to that of original system. It is deduced from the turbulence system added to the original system that the union of preceding 2q order is equal to that of reduced system. In this invention, the algorithm is the basis of determination of the reduced circuit order in a model reduction algorithm a Krylov subspace.

Abstract: A method of designing a synchronous circuit of VLSI for Clock Skew scheduling and optimization is used to optimize the skew of a digital synchronous VLSI system and formulize the issue of skew optimization into the issue of quadratic equation programming. For estimation of reliability, a quadratic equation cost function is used to analyze an ideal value of skew and an error between feasible solutions. During operation, several algorithms are used to speed up the operation and lower the complexity, and ISCAS'89 is used as a testing circuit.