Patents by Inventor Chia-Ho Chen
Chia-Ho Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240151935Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a movable portion, a fixed portion, and a driving assembly. The movable portion is used to connect the optical element. The movable portion may move relative to the fixed portion. The driving assembly is used to drive the movable portion to move relative to the fixed portion.Type: ApplicationFiled: March 8, 2023Publication date: May 9, 2024Inventors: Hsiao-Hsin HU, Chih-Wen CHIANG, Chia-Che WU, Yu-Chiao LO, Yi-Ho CHEN, Chao-Chang HU, Sin-Jhong SONG
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Publication number: 20240151932Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a movable portion, a fixed portion, and a driving assembly. The movable portion is used to connect the optical element. The movable portion may move relative to the fixed portion. The driving assembly is used to drive the movable portion to move relative to the fixed portion.Type: ApplicationFiled: March 28, 2023Publication date: May 9, 2024Inventors: Hsiao-Hsin HU, Chih-Wen CHIANG, Chia-Che WU, Yu-Chiao LO, Yi-Ho CHEN, Chao-Chang HU, Sin-Jhong SONG
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Publication number: 20240152029Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a movable portion, a fixed portion, and a driving assembly. The movable portion is used to connect the optical element. The movable portion may move relative to the fixed portion. The driving assembly is used to drive the movable portion to move relative to the fixed portion.Type: ApplicationFiled: November 2, 2023Publication date: May 9, 2024Inventors: Hsiao-Hsin HU, Chih-Wen CHIANG, Chia-Che WU, Yu-Chiao LO, Yi-Ho CHEN, Chao-Chang HU, Sin-Jhong SONG
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Publication number: 20240155234Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a movable portion, a fixed portion, and a driving assembly. The movable portion is used to connect the optical element. The movable portion may move relative to the fixed portion. The driving assembly is used to drive the movable portion to move relative to the fixed portion.Type: ApplicationFiled: March 27, 2023Publication date: May 9, 2024Inventors: Hsiao-Hsin HU, Chih-Wen CHIANG, Chia-Che WU, Yu-Chiao LO, Yi-Ho CHEN, Chao-Chang HU, Sin-Jhong SONG
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Publication number: 20240151936Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a movable portion, a fixed portion, and a driving assembly. The movable portion is used to connect the optical element. The movable portion may move relative to the fixed portion. The driving assembly is used to drive the movable portion to move relative to the fixed portion.Type: ApplicationFiled: March 27, 2023Publication date: May 9, 2024Inventors: Hsiao-Hsin HU, Chih-Wen CHIANG, Chia-Che WU, Yu-Chiao LO, Yi-Ho CHEN, Chao-Chang HU, Sin-Jhong SONG
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Publication number: 20240128106Abstract: The invention discloses a container for a non-rectangular reticle, adapted for accommodating an elliptical reticle, and including a cover and a base which are configured to define an elliptical space when engaged with each other. The cover and the base have reticle retainers and reticle supports, respectively, which are configured to securely hold the elliptical reticle.Type: ApplicationFiled: September 21, 2023Publication date: April 18, 2024Inventors: Ming-Chien CHIU, Chia-Ho CHUANG, Hsin-Min HSUEH, Yu-Ruei CHEN
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Patent number: 11940060Abstract: The present invention provides a seal ring structure, which comprises a seal ring member. The seal ring member includes a first ring opening on one side and a second ring opening on the other. A periphery of the first ring opening includes a plurality of leak grooves. When the seal ring member and the valve ball squeeze each other, the plurality of leak grooves can reduce the torque required to rotate the valve ball. A leak-groove length of the plurality of leak grooves is smaller than a seal-ring-member length of the seal ring member. The plurality of leak grooves do not penetrate the seal ring member for avoiding leakage of fluid.Type: GrantFiled: August 5, 2022Date of Patent: March 26, 2024Assignee: METAL INDUSTRIES RESEARCH & DEVELOPMENT CENTREInventors: Ching-An Lin, Chin-Kang Chen, Chia-Ho Cheng
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Patent number: 11923304Abstract: The present disclosure relates to an integrated circuit. The integrated circuit includes a conductive interconnect disposed on a dielectric over a substrate. An interfacial layer is arranged along an upper surface of the conductive interconnect. A liner is arranged along a lower surface of the conductive interconnect. The liner and the interfacial layer surround the conductive interconnect. A middle layer is located over the interfacial layer and has a bottommost surface over the dielectric. A bottommost surface of the interfacial layer and the bottommost surface of the middle layer are both above a top of the conductive interconnect.Type: GrantFiled: November 28, 2022Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Su-Jen Sung, Chih-Chiang Chang, Chia-Ho Chen
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Publication number: 20230088795Abstract: The present disclosure relates to an integrated circuit. The integrated circuit includes a conductive interconnect disposed on a dielectric over a substrate. An interfacial layer is arranged along an upper surface of the conductive interconnect. A liner is arranged along a lower surface of the conductive interconnect. The liner and the interfacial layer surround the conductive interconnect. A middle layer is located over the interfacial layer and has a bottommost surface over the dielectric. A bottommost surface of the interfacial layer and the bottommost surface of the middle layer are both above a top of the conductive interconnect.Type: ApplicationFiled: November 28, 2022Publication date: March 23, 2023Inventors: Su-Jen Sung, Chih-Chiang Chang, Chia-Ho Chen
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Patent number: 11515255Abstract: The present disclosure relates to an integrated circuit having a conductive interconnect disposed on a dielectric over a substrate. A first liner is arranged along an upper surface of the conductive interconnect. A barrier layer is arranged along a lower surface of the conductive interconnect and contacts an upper surface of the dielectric. The barrier layer and the first liner surround the conductive interconnect. A second liner is located over the first liner and has a lower surface contacting the upper surface of the dielectric.Type: GrantFiled: November 25, 2020Date of Patent: November 29, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Su-Jen Sung, Chih-Chiang Chang, Chia-Ho Chen
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Publication number: 20210082831Abstract: The present disclosure relates to an integrated circuit having a conductive interconnect disposed on a dielectric over a substrate. A first liner is arranged along an upper surface of the conductive interconnect. A barrier layer is arranged along a lower surface of the conductive interconnect and contacts an upper surface of the dielectric. The barrier layer and the first liner surround the conductive interconnect. A second liner is located over the first liner and has a lower surface contacting the upper surface of the dielectric.Type: ApplicationFiled: November 25, 2020Publication date: March 18, 2021Inventors: Su-Jen Sung, Chih-Chiang Chang, Chia-Ho Chen
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Publication number: 20210008383Abstract: A short wave visualization probe device adapted to be electrically connected to a short wave diathermy device and adapted to treat body tissues is provided. The visualization probe device includes a housing unit, an electrode unit and a visualization unit. The electrode unit is disposed in the housing unit, is adapted to be electrically connected to the diathermy device and to generate an electromagnetic field when being actuated by the diathermy device so as to perform short wave diathermy on the body tissues. The visualization unit is disposed on the housing unit and is configured to generate a visually perceptible effect in response to exposure to the electromagnetic field generated by the electrode unit.Type: ApplicationFiled: July 11, 2019Publication date: January 14, 2021Inventors: Chia-Ho CHEN, Chen-Shen CHU, Li-Ming LIU
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Patent number: 10867920Abstract: The present disclosure, in some embodiments, relates to a method of forming an integrated circuit device. The method may be performed by forming a conductive line over a substrate and in contact with a liner. A dielectric barrier layer is formed on the conductive line. The dielectric barrier layer includes an interfacial layer contacting the conductive line, a middle layer contacting the interfacial layer, and an upper layer contacting the middle layer. The interfacial layer and the liner collectively completely surround the conductive line. An inter-level dielectric layer is formed along sidewalls of the upper layer.Type: GrantFiled: December 20, 2018Date of Patent: December 15, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Su-Jen Sung, Chih-Chiang Chang, Chia-Ho Chen
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Publication number: 20190148308Abstract: The present disclosure, in some embodiments, relates to a method of forming an integrated circuit device. The method may be performed by forming a conductive line over a substrate and in contact with a liner. A dielectric barrier layer is formed on the conductive line. The dielectric barrier layer includes an interfacial layer contacting the conductive line, a middle layer contacting the interfacial layer, and an upper layer contacting the middle layer. The interfacial layer and the liner collectively completely surround the conductive line. An inter-level dielectric layer is formed along sidewalls of the upper layer.Type: ApplicationFiled: December 20, 2018Publication date: May 16, 2019Inventors: Su-Jen Sung, Chih-Chiang Chang, Chia-Ho Chen
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Patent number: 10163795Abstract: The present disclosure relates to an integrated circuit device and an associated method of formation. The integrated circuit device includes a substrate, and a conductive metal interconnect line arranged within a dielectric material disposed over the substrate. An interfacial layer is in contact with an upper surface of the conductive metal interconnect line. An upper dielectric layer is arranged over the interfacial layer. A middle dielectric layer is arranged between the upper dielectric layer and the interfacial layer.Type: GrantFiled: November 4, 2016Date of Patent: December 25, 2018Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Su-Jen Sung, Chih-Chiang Chang, Chia-Ho Chen
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Patent number: 9741575Abstract: The present disclosure relates to a chemical vapor deposition apparatus and associated methods. In some embodiments, the CVD apparatus has a vacuum chamber and a gas import having a gas import axis through which a process gas is imported into the vacuum chamber and being arranged near an upper region of the vacuum chamber. At least one exhaust port is arranged near a bottom region of the vacuum chamber. The CVD apparatus also has a gas delivery ring with an outlet disposed under the gas import. A pressure near the outlet of the gas delivery ring is smaller than that of the rest of the vacuum chamber.Type: GrantFiled: March 10, 2014Date of Patent: August 22, 2017Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hsiang-Wei Lin, Chia-Ho Chen
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Publication number: 20170053875Abstract: The present disclosure relates to an integrated circuit device and an associated method of formation. The integrated circuit device includes a substrate, and a conductive metal interconnect line arranged within a dielectric material disposed over the substrate. An interfacial layer is in contact with an upper surface of the conductive metal interconnect line. An upper dielectric layer is arranged over the interfacial layer. A middle dielectric layer is arranged between the upper dielectric layer and the interfacial layer.Type: ApplicationFiled: November 4, 2016Publication date: February 23, 2017Inventors: Su-Jen Sung, Chih-Chiang Chang, Chia-Ho Chen
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Patent number: 9543125Abstract: Plasma-enhanced chemical vapor deposition (PECVD) devices enable the generation of a plasma in a plasma zone of a deposition chamber, which reacts with a surface of a substrate to form a deposited film in the fabrication of a semiconductor component. The plasma generator is often positioned over the center of the substrate, and the generated plasma often remains in the vicinity of the plasma generator, resulting in a thicker deposition near the center than at the edges of the substrate. Tighter process control is achievable by positioning one or more electromagnets in a periphery of the plasma zone and supplying power to generate a magnetic field, thereby inducing the charged plasma to achieve a more consistent distribution within the plasma zone and more uniform deposition on the substrate. Variations in the number, configuration, and powering of the electromagnets enable various redistributive effects on the plasma within the plasma zone.Type: GrantFiled: April 3, 2013Date of Patent: January 10, 2017Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Hsiang-Wei Lin, Chia-Ho Chen, Bo-Hung Lin
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Patent number: 9490209Abstract: Integrated circuit devices and method of forming them. The devices include a dielectric barrier layer formed over a copper-containing metal interconnect structure. The dielectric barrier layer inhibits electro-migration of Cu. The dielectric barrier layer includes a metal-containing layer that forms an interface with the interconnect structure. Incorporating metal within the interfacial layer improves adhesion of the dielectric barrier layer to copper lines and the like and provides superior electro-migration resistance over the operating lifetime of the devices.Type: GrantFiled: August 15, 2013Date of Patent: November 8, 2016Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Su-Jen Sung, Chih-Chiang Chang, Chia-Ho Chen
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Patent number: 9478480Abstract: In accordance with an embodiment, a structure comprises a substrate having a first area and a second area; a through substrate via (TSV) in the substrate penetrating the first area of the substrate; an isolation layer over the second area of the substrate, the isolation layer having a recess; and a conductive material in the recess of the isolation layer, the isolation layer being disposed between the conductive material and the substrate in the recess.Type: GrantFiled: November 14, 2014Date of Patent: October 25, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Yu Tsai, Shih-Hui Wang, Chien-Ming Chiu, Chia-Ho Chen, Fang Wen Tsai, Weng-Jin Wu, Jing-Cheng Lin, Wen-Chih Chiou, Shin-Puu Jeng, Chen-Hua Yu