Patents by Inventor Chia-Ming Hsu

Chia-Ming Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200348355
    Abstract: A reliability determination method, which is configured to test a batch of semiconductor devices, includes: obtaining a Welbull distribution of lifetime of the batch of semiconductor devices; dividing the Welbull distribution into at least a first section and a second section, wherein the first section and the second section meet a confidence interval; generating a first trend line of the first section and a second trend line of the second section according to the first confidence level, in which the first trend line has a first slope and the second trend line has a second slope; determining the first slope exceeds a second slope; and determining a predicted reliability of the batch of the semiconductor device under a target quality level according to the first section.
    Type: Application
    Filed: April 30, 2019
    Publication date: November 5, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Sheng-Hui LIANG, Huang-Lang PAI, Chia-Ming HSU, Chia-Lin CHEN
  • Patent number: 10804163
    Abstract: A method of forming a semiconductor structure includes: providing a substrate; forming a first pair of source/drain regions in the substrate; disposing an interlayer dielectric layer over the substrate, the interlayer dielectric layer having a first trench between the first pair of source/drain regions; depositing a dielectric layer in the first trench; depositing a barrier layer over the dielectric layer; removing the barrier layer from the first trench to expose the dielectric layer; depositing a work function layer over the dielectric layer in the first trench; and depositing a conductive layer over the work function layer in the first trench.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: October 13, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yi-Jing Lee, Ya-Yun Cheng, Hau-Yu Lin, I-Sheng Chen, Chia-Ming Hsu, Chih-Hsin Ko, Clement Hsingjen Wann
  • Patent number: 10714586
    Abstract: A semiconductor device includes a source/drain region, a source/drain silicide layer formed on the source/drain region, and a first contact disposed over the source/drain silicide layer. The first contact includes a first metal layer, an upper surface of the first metal layer is at least covered by a silicide layer, and the silicide layer includes a same metal element as the first metal layer.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: July 14, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Ming Hsu, Pei-Yu Chou, Chih-Pin Tsao, Kuang-Yuan Hsu, Jyh-Huei Chen
  • Patent number: 10687755
    Abstract: A wearable physiological monitoring device is provided. The wearable physiological monitoring device includes a wearable object, a sensing module and a processing module. The sensing module is disposed on the wearable object and is configured to stretch based on a local displacement of target organ of the under-test person contacted by the wearable object to generate a change of a sensing value thereof. The processing module is configured to calculate a physiological changing mode that includes physiological information and occurrence time information based on the change of the sensing value. The physiological information includes a number, duration, a degree or a combination of the above of the stretching of the wearable object to determine the health condition of the under-test person.
    Type: Grant
    Filed: January 18, 2018
    Date of Patent: June 23, 2020
    Assignee: MedicusTek Inc.
    Inventors: Chung-Cheng Wang, Chia-Ming Hsu, Yu-Chun Hsu, Yi-Yuan Chen
  • Publication number: 20200194459
    Abstract: A semiconductor device includes a SOI substrate, first and second active elements, and an interconnect structure. The SOI substrate includes a semiconductor layer which includes first and second semiconductor blocks separated from each other by an isolation structure. The first and second active elements are disposed on the first and second semiconductor blocks respectively. A source/drain region of the first active element is electrically connected to a gate structure of the second active element through a first path provided by the interconnect structure. The second semiconductor block is electrically connected to the second semiconductor block through a second path provided by the interconnect structure. The second path includes a contact that is in contact with the upper surface of the second semiconductor block.
    Type: Application
    Filed: December 18, 2018
    Publication date: June 18, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chia-Ming HSU, Hsu-Cheng LIU, Chia-Lin CHEN, Jian-Hsing LEE
  • Publication number: 20200133018
    Abstract: A DOE module including a transparent substrate, a first electrode, a second electrode, a first sensing wire, a sensing layer, a DOE layer, and an insulating layer is provided. The first electrode is disposed on the transparent substrate, and the second electrode is disposed on the transparent substrate. The first sensing wire is distributed on the transparent substrate and electrically connected to the first electrode. The sensing layer is distributed on the transparent substrate and electrically connected to the second electrode. The first sensing wire is insulated from the sensing layer to form a capacitance between the first sensing wire and the sensing layer. The DOE layer is disposed on the transparent substrate. The insulating layer covers the first sensing wire and the sensing layer. The insulating layer has a first opening and a second opening respectively exposing the first electrode and the second electrode.
    Type: Application
    Filed: August 23, 2019
    Publication date: April 30, 2020
    Applicant: HIMAX TECHNOLOGIES LIMITED
    Inventors: Biing-Seng Wu, Han-Yi Kuo, Kuan-Ming Chen, Chih-Yu Chuang, Shi-Jen Wu, Jui-Ni Li, Cheng-Hung Tsai, Chin-Yuan Chiang, Chia-Ming Hsu, Chiau-Ling Huang
  • Publication number: 20200135589
    Abstract: A method of forming a semiconductor structure includes: providing a substrate; forming a first pair of source/drain regions in the substrate; disposing an interlayer dielectric layer over the substrate, the interlayer dielectric layer having a first trench between the first pair of source/drain regions; depositing a dielectric layer in the first trench; depositing a barrier layer over the dielectric layer; removing the barrier layer from the first trench to expose the dielectric layer; depositing a work function layer over the dielectric layer in the first trench; and depositing a conductive layer over the work function layer in the first trench.
    Type: Application
    Filed: April 1, 2019
    Publication date: April 30, 2020
    Inventors: YI-JING LEE, YA-YUN CHENG, HAU-YU LIN, I-SHENG CHEN, CHIA-MING HSU, CHIH-HSIN KO, CLEMENT HSINGJEN WANN
  • Publication number: 20200134122
    Abstract: A method of operating an IC manufacturing system includes determining whether an n-type active region of a cell or a p-type active region of the cell is a first active region based on a timing critical path of the cell, positioning the first active region along a cell height direction in an IC layout diagram of a cell, the first active region having a first total number of fins extending in a direction perpendicular to the cell height direction. The method also includes positioning a second active region in the cell along the cell height direction, the second active region being the n-type or p-type opposite the n-type or p-type of the first active region and having a second total number of fins less than the first total number of fins and extending in the direction, and storing the IC layout diagram of the cell in a cell library.
    Type: Application
    Filed: October 11, 2019
    Publication date: April 30, 2020
    Inventors: Po-Hsiang HUANG, Sheng-Hsiung CHEN, Chih-Hsin KO, Fong-Yuan CHANG, Clement Hsingjen WANN, Li-Chun TIEN, Chia-Ming HSU
  • Patent number: 10570740
    Abstract: An axial fan includes a fan frame, an impeller and a motor. The fan frame has a frame body, a base and plural connecting members. The base is disposed at the center of a side of the frame body. The connecting members connect the frame body to the base. The impeller is accommodated in the frame body and disposed on the base. The impeller has a rotating shaft, a hub and plural blades disposed around the hub. The motor is disposed on the base and connects with the rotating shaft to drive the impeller to rotate. When the impeller rotates forwardly, the airflow is induced to flow through the connecting members, blades, and one side of the frame body away from the base. When the impeller rotates reversely, the airflow is induced to flow through the side of the frame body, blades and connecting members.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: February 25, 2020
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chien-Ming Lee, Chia-Ming Hsu, Jung-Yuan Chen, Ching-Sen Hsieh, Jian-Cun Lin, Shih-Yu Lai
  • Patent number: 10571259
    Abstract: An optical detecting apparatus for detecting a degree of freedom error of a spindle and has a standard bar and a sensor module, and is assembled between a spindle and a rotating platform of a powered machinery. The standard bar has a rod lens and a reflection face. The sensor module has two detecting groups, an oblique laser head, and a reflected spot displacement sensor. Each detecting group emits a laser light through the rod lens along the X-axis and the Y-axis of the powered machinery. The oblique laser head emits an oblique laser light to the reflected spot displacement sensor. When the spindle of the powered machinery generates errors after rotating, the sensor module receives the changes of the laser lights to obtain the displacement change signals of the standard bar for a calculation unit to detect the errors between the spindle and the rotating platform.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: February 25, 2020
    Assignee: National Formosa University
    Inventors: Wen-Yuh Jywe, Tung-Hsien Hsieh, Zhong-Liang Hsu, Chia-Ming Hsu, Yu-Wei Chang, Sen-Yi Huang, Tung-Hsing Hsieh
  • Patent number: 10527473
    Abstract: A microwave flowmeter and a flow rate measurement method are provided. The microwave flowmeter includes a transmitting circuit, a detecting circuit, and a computing unit. The transmitting circuit includes a substrate, a plurality of resonator elements, and a transmission line. Two ends of the transmission line receive high frequency electric feedings, so that the resonator elements separately generate corresponding microwaves and each of the microwaves has at least one resonant frequency. The detecting circuit detects offsets of the corresponding resonant frequencies that are caused when a fluid flows through the resonator elements, and records times at which the offsets happen. The computing unit is electrically connected to the detecting circuit, and computes a flow rate of the fluid according to the times at which the offsets happen of the resonant frequencies and locations that are of the resonator elements and that correspond to a flow path.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: January 7, 2020
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Ching-Lung Yang, Chia-Ming Hsu
  • Patent number: 10416031
    Abstract: A pressure sensing mat may include: a first substrate; a second substrate disposed opposite to the first substrate; a first electrode layer disposed on a side of the first substrate that faces the second substrate, the first electrode layer comprising a plurality of first electrode patterns; a second electrode layer disposed on a side of the second substrate that faces the first substrate, the second electrode layer comprising a plurality of second electrode patterns; and a spacer layer disposed between the first substrate and the second substrate and comprising a plurality of holes such that the first electrode patterns are configured to contact the second electrode patterns through the holes.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: September 17, 2019
    Assignee: MedicusTek, Inc.
    Inventors: Chia-Ming Hsu, Chung-Chih Lin, Chi Wen Liu, Chun Lin, Chao-Hung Chou
  • Patent number: 10410727
    Abstract: A non-volatile memory (NVM) includes at least one memory unit region, each including a memory array and having first memory cells in the odd columns and second memory cells in the even columns. Corresponding to each memory unit region, the NVM includes a multiplexer including first bit line decoders and second bit line decoders, a comparator circuit including a first input terminal and a second input terminal, and a bias generation circuit generating a bias voltage. When reading a data information from a first memory cell, a first output voltage of the first memory cell is sent to the first input terminal and the bias voltage is sent to the second input terminal. When reading a data information from a second memory cell, a second output voltage of the second memory cell is sent to the second input terminal and the bias voltage is sent to the first input terminal.
    Type: Grant
    Filed: July 5, 2017
    Date of Patent: September 10, 2019
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Yi Jin Kwon, Hao Ni, Jim Chia-Ming Hsu, Xiao Yan Liu
  • Patent number: 10396196
    Abstract: A semiconductor device includes a substrate, a semiconductor layer, a doped region, a device region, a first isolation structure, a second isolation structure and a terminal. The semiconductor layer is disposed over the substrate. The doped region is disposed in the semiconductor layer. The device region is disposed on the doped region and includes a source, a drain and a gate. The first isolation structure is disposed in the semiconductor layer and surrounds the doped region. The second isolation structure surrounds the first isolation structure and is spaced apart from the first isolation structure. The terminal is disposed between the first isolation structure and the second isolation structure, and is equipotential with the source.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: August 27, 2019
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Jui-Chun Chang, Shih-Kai Wu, Cheng-Yu Wang, Li-Yang Hong, Chia-Ming Hsu
  • Publication number: 20190231083
    Abstract: A mattress for patient care. The mattress includes a number of compressible cells and a number of sensors corresponding to the number of compressible cells. Each compressible cell is configured to contact, when inflated, a user in a contact area of a plurality of contact areas of the user. Each sensor is configured to generate a number of measurements, wherein each measurement relates to the contact area of a corresponding compressible cell. Each sensor is further configured to send the number of measurements to a pressure control device.
    Type: Application
    Filed: January 26, 2018
    Publication date: August 1, 2019
    Applicant: MedicusTek, Inc.
    Inventors: Chia-Ming Hsu, Yi-Yuan Chen, Tsai-Yu Lin, Lavina Che-Hsuan Thong, Aaron R. Clousing, Yu-Chun Hsu, Lee Lin
  • Publication number: 20190154478
    Abstract: A microwave flowmeter and a flow rate measurement method are provided. The microwave flowmeter includes a transmitting circuit, a detecting circuit, and a computing unit. The transmitting circuit includes a substrate, a plurality of resonator elements, and a transmission line. Two ends of the transmission line receive high frequency electric feedings, so that the resonator elements separately generate corresponding microwaves and each of the microwaves has at least one resonant frequency. The detecting circuit detects offsets of the corresponding resonant frequencies that are caused when a fluid flows through the resonator elements, and records times at which the offsets happen. The computing unit is electrically connected to the detecting circuit, and computes a flow rate of the fluid according to the times at which the offsets happen of the resonant frequencies and locations that are of the resonator elements and that correspond to a flow path.
    Type: Application
    Filed: November 29, 2017
    Publication date: May 23, 2019
    Applicant: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Ching-Lung YANG, Chia-Ming HSU
  • Publication number: 20190116987
    Abstract: A mattress, bed, cushion, or other device to support a user in a pre-determined posture. The mattress, bed, cushion, or other device includes compressible cells configured to inflate based on characteristics of particular contact areas of the user, and contact, in response to inflating based on the characteristics, the user in various contact areas to support the pre-determined posture. In particular, inflating the compressible cells based on characteristics of particular contact areas reduces the risk of the user developing pressure ulcers.
    Type: Application
    Filed: October 19, 2017
    Publication date: April 25, 2019
    Applicant: MedicusTek, Inc.
    Inventors: Aaron R. Clousing, Chia-Ming Hsu, Tsai-Yu Lin
  • Publication number: 20190117124
    Abstract: A sensor pad for monitoring user posture. The sensor pad includes a sensor array having first layer electrodes disposed on a first substrate that faces a second substrate, second layer electrodes disposed on a second substrate that faces the first substrate, a spacer layer disposed between the first substrate and the second substrate and having holes each corresponding to an overlapping region of the first layer electrodes and the second layer electrodes, where the first layer electrodes are configured to contact the second layer electrodes through at least one of the holes via a corresponding overlapping region when an external force is applied on the sensor pad by a user, a sensing circuit configured to generate an output signal in response to the external force, and a sensor correction circuit configured to prevent the sensing circuit from generating a false positive signal in the output signal.
    Type: Application
    Filed: October 19, 2017
    Publication date: April 25, 2019
    Applicant: MedicusTek, Inc.
    Inventors: Chia-Ming Hsu, Yu-Chun Hsu, Yi-Yuan Chen
  • Patent number: 10153351
    Abstract: In a method of manufacturing a semiconductor device, a first contact hole is formed in one or more dielectric layers disposed over a source/drain region or a gate electrode. An adhesive layer is formed in the first contact hole. A first metal layer is formed on the adhesive layer in the first contact hole. A silicide layer is formed on an upper surface of the first metal layer. The silicide layer includes a same metal element as the first metal layer.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: December 11, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Ming Hsu, Chih-Pin Tsao, Jyh-Huei Chen, Kuang-Yuan Hsu, Pei-Yu Chou
  • Publication number: 20180337244
    Abstract: A semiconductor device includes a source/drain region, a source/drain silicide layer formed on the source/drain region, and a first contact disposed over the source/drain silicide layer. The first contact includes a first metal layer, an upper surface of the first metal layer is at least covered by a silicide layer, and the silicide layer includes a same metal element as the first metal layer.
    Type: Application
    Filed: July 30, 2018
    Publication date: November 22, 2018
    Inventors: Chia-Ming HSU, Pei-Yu CHOU, Chih-Pin TSAO, Kuang-Yuan HSU, Jyh-Huei CHEN