Patents by Inventor Chia-Wei Tu

Chia-Wei Tu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140057431
    Abstract: Methods and apparatuses for wafer level packaging (WLP) semiconductor devices are disclosed. A redistribution layer (RDL) is formed on a first passivation layer in contact with a conductive pad over a surface of a die. The RDL layer is on top of a first region of the first passivation layer. A second passivation layer is formed on the RDL layer with an opening to expose the RDL layer, and over the first passivation layer. An under bump metallization (UBM) layer is formed over the second passivation layer in contact with the exposed RDL layer. A second region of the first passivation layer disjoint from the first region is determined by projecting an outer periphery of a solder ball or other connector onto the surface.
    Type: Application
    Filed: October 28, 2013
    Publication date: February 27, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Wei Tu, Yian-Liang Kuo, Tsung-Fu Tsai, Fu-Ying Huang, Ming-Song Sheu, Hsien-Wei Chen
  • Publication number: 20140054764
    Abstract: A semiconductor package includes a semiconductor substrate, a contact pad overlying the semiconductor substrate, an interconnect layer overlying the contact pad, a passivation layer formed between the contact pad and the interconnect layer, a bump overlying the interconnect layer, and a protection layer overlying the interconnect layer and the passivation layer and covering a lower portion of the bump. The protection layer includes a curved surface region.
    Type: Application
    Filed: August 24, 2012
    Publication date: February 27, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-Hsiung Lu, Ming-Da Cheng, Yi-Wen Wu, Yu-Peng Tsai, Chia-Wei Tu, Chung-Shi Liu
  • Publication number: 20130341800
    Abstract: A method includes forming an electrical connector over a substrate of a wafer, and molding a polymer layer, with at least a portion of the electrical connector molded in the polymer layer. A first sawing step is performed to form a trench in the polymer layer. After the first sawing step, a second sawing step is performed to saw the wafer into a plurality of dies.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Wei Tu, Yian-Liang Kuo, Wen-Hsiung Lu, Hsien-Wei Chen, Tsung-Fu Tsai
  • Publication number: 20130328190
    Abstract: Methods and apparatuses for wafer level packaging (WLP) of semiconductor devices are disclosed. A contact pad of a circuit may be connected to a solder bump by way of a post passivation interconnect (PPI) line and a PPI pad. The PPI pad may comprise a hollow part and an opening. The PPI pad may be formed together with the PPI line as one piece. The hollow part of the PPI pad can function to control the amount of solder flux used in the ball mounting process so that any extra amount of solder flux can escape from an opening of the solid part of the PPI pad. A solder ball can be mounted to the PPI pad directly without using any under bump metal (UBM) as a normal WLP package would need.
    Type: Application
    Filed: June 8, 2012
    Publication date: December 12, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Wen Wu, Ming-Che Ho, Wen-Hsiung Lu, Chia-Wei Tu, Chung-Shi Liu
  • Patent number: 8569886
    Abstract: Methods and apparatuses for wafer level packaging (WLP) semiconductor devices are disclosed. A redistribution layer (RDL) is formed on a first passivation layer in contact with a conductive pad over a surface of a die. The RDL layer is on top of a first region of the first passivation layer. A second passivation layer is formed on the RDL layer with an opening to expose the RDL layer, and over the first passivation layer. An under bump metallization (UBM) layer is formed over the second passivation layer in contact with the exposed RDL layer. A second region of the first passivation layer disjoint from the first region is determined by projecting an outer periphery of a solder ball or other connector onto the surface.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: October 29, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Wei Tu, Yian-Liang Kuo, Tsung-Fu Tsai, Ru-Ying Huang, Ming-Song Sheu, Hsien-Wei Chen
  • Publication number: 20130229190
    Abstract: Multiple test circuits are formed in a test board for each test chip. Alternatively and/or additionally, a test circuit extends through at least two layers among metallization layers of the test chip.
    Type: Application
    Filed: March 2, 2012
    Publication date: September 5, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shiang-Ruei SU, Liang-Chen LIN, Chia-Wei TU
  • Publication number: 20130127052
    Abstract: Methods and apparatuses for wafer level packaging (WLP) semiconductor devices are disclosed. A redistribution layer (RDL) is formed on a first passivation layer in contact with a conductive pad over a surface of a die. The RDL layer is on top of a first region of the first passivation layer. A second passivation layer is formed on the RDL layer with an opening to expose the RDL layer, and over the first passivation layer. An under bump metallization (UBM) layer is formed over the second passivation layer in contact with the exposed RDL layer. A second region of the first passivation layer disjoint from the first region is determined by projecting an outer periphery of a solder ball or other connector onto the surface.
    Type: Application
    Filed: November 22, 2011
    Publication date: May 23, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Wei Tu, Yian-Liang Kuo, Tsung-Fu Tsai, Ru-Ying Huang, Ming-Song Sheu, Hsien-Wei Chen
  • Publication number: 20130087925
    Abstract: A chip includes a dummy connector disposed at a top surface of the chip. A seal ring encircles a region directly underlying the dummy connector, with the region overlapping the dummy connector.
    Type: Application
    Filed: October 5, 2011
    Publication date: April 11, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu Tsai, Chia-Wei Tu, Yian-Liang Kuo, Ru-Ying Huang
  • Publication number: 20100134434
    Abstract: An electricity saving method of a communication device is provided. The method is applied to a communication device having a functional unit group. The functional unit group is consisted of a communication module and several functional modules. The electricity saving method includes the following steps. A call is received or given by the communication module. Whether the time of not pressing several keys and a touch screen of the communication device reaches a threshold time is determined. If yes, an unattended mode is activated to disable the functional modules.
    Type: Application
    Filed: November 27, 2009
    Publication date: June 3, 2010
    Applicant: INVENTEC CORPORATION
    Inventor: Chia-Wei TU
  • Publication number: 20100131612
    Abstract: A method for transmitting video data includes the following steps. A first portable electronic device is activated, and a video image is captured and displayed on a second portable electronic device. The second portable electronic device determines whether to enable a data synchronization function to transmit a to-be-transmitted file. If the data synchronization function is enabled, the second portable electronic device determines and transforms the format of the to-be-transmitted file. The second portable electronic device transmits the transformed to-be-transmitted file to the first portable electronic device to display the transformed to-be-transmitted file on the first portable electronic device.
    Type: Application
    Filed: November 27, 2009
    Publication date: May 27, 2010
    Applicant: INVENTEC CORPORATION
    Inventor: Chia-Wei TU
  • Publication number: 20030018257
    Abstract: A body fat thickness measurement apparatus. The apparatus comprises a transducer, an output control circuit, and a signal control device. The transducer outputs ultrasound waves with a frequency above 10 MHz and receives the ultrasound reflected back by the subject. The transducer then converts the reflected ultrasound to an analog signal. The output control circuit outputs a high voltage pulse depending on a predetermined time period or a position of the transducer. The signal control device receives the analog signal and converts it to a digital signal. A processor converts the digital signal into a video signal to be displayed on a monitor.
    Type: Application
    Filed: May 13, 2002
    Publication date: January 23, 2003
    Inventors: E-Chang Hsu, Chia-Wei Tu, You-Ren Fang, Jr-Shoung Sheu, Li-Yi Kao