Patents by Inventor Chia-Yun Cheng

Chia-Yun Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10397588
    Abstract: A method and apparatus of sharing an on-chip buffer or cache memory for a video coding system using coding modes including Inter prediction mode or Intra Block Copy (IntraBC) mode are disclosed. At least partial pre-deblocking reconstructed video data of a current picture is stored in an on-chip buffer or cache memory. If the current block is coded using IntraBC mode, the pre-deblocking reconstructed video data of the current picture stored in the on-chip buffer or cache memory are used to derive IntraBC prediction for the current block. In some embodiments, if the current block is coded using Inter prediction mode, Inter reference video data from the previous picture stored in the on-chip buffer or cache memory are used to derive Inter prediction for the current block. In another embodiment, the motion compensation/motion estimation unit is shared by the two modes.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: August 27, 2019
    Assignee: MEDIATEK INC.
    Inventors: Tzu-Der Chuang, Ping Chao, Ching-Yeh Chen, Yu-Chen Sun, Chih-Ming Wang, Chia-Yun Cheng, Han-Liang Chou, Yu-Wen Huang
  • Patent number: 10390028
    Abstract: Methods of palette coding to reduce the required coding process are disclosed. According to one method, smaller blocks are derived from a large block. The histogram of the large block is derived based on the histograms of smaller blocks in the large block. According to another method, one or more palette tables are derived based on multiple blocks. One palette table is used for each of the multiple blocks. According to yet another method, index map transpose is performed in the parsing stage according to the transpose flag of the index map. Accordingly, a buffer to store the transpose flags can be saved. According to still yet another method, the palette predictor update is performed using an index mapping table to avoid the need for shuffling the contents of the palette predictor stored in a palette buffer.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: August 20, 2019
    Assignee: MEDIATEK INC.
    Inventors: Yu-Chen Sun, Tzu-Der Chuang, Han-Liang Chou, Chia-Yun Cheng, Ching-Yeh Chen, Yu-Wen Huang
  • Patent number: 10375395
    Abstract: A video processing apparatus includes an external storage device, a hardware entropy engine, and a software execution engine. The hardware entropy engine performs entropy processing of a current picture, and further outputs count information to the external storage device during the entropy processing of the current picture. When loaded and executed by the software execution engine, a software program instructs the software execution engine to convert the count information into count table contents, and generate a count table in the external storage device according to at least the count table contents. The count table is referenced to apply a backward adaptation to a probability table that is selectively used by the hardware entropy engine to perform entropy processing of a next picture.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: August 6, 2019
    Assignee: MEDIATEK INC.
    Inventors: Sheng-Jen Wang, Yung-Chang Chang, Chia-Yun Cheng
  • Patent number: 10356438
    Abstract: In order to overcome the issue caused by a decoded block vector (BV) pointing to a reference block overlapping with an unavailable area, various methods are disclosed. According to one method, if the reference block overlaps with an unavailable area, the reference pixels in the unavailable area are generated for IntraBC prediction of the current block by padding from neighboring available pixels. The padding can be done in the horizontal direction and then the vertical direction. The padding may also done in the vertical direction first and then horizontal direction. In another method, if the reference block overlaps with an unavailable area, the reference pixels in the unavailable area are generated for IntraBC prediction of the current block by using previous decoded pixels in the unavailable area. A pre-defined value may also be used for the unavailable area.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: July 16, 2019
    Assignee: MEDIATEK INC.
    Inventors: Tzu-Der Chuang, Chia-Yun Cheng, Han-Liang Chou, Ching-Yeh Chen, Yu-Chen Sun, Yu-Wen Huang
  • Patent number: 10298951
    Abstract: A method and apparatus for video encoding or decoding used by an AVS2 (Second Generation of Audio Video Coding Standard) video encoder or decoder respectively are disclosed. According to this method, first motion vectors associated with spatial neighboring blocks of a current block are determined. For each spatial neighboring block, a value of 1 is assigned to a first BlockDistance associated with the spatial neighboring block if a corresponding first reference picture is a G picture or GB picture. Motion vector predictor candidates are derived from the first motion vectors by scaling each first motion vector according to a corresponding first BlockDistance and a current BlockDistance. A final motion vector predictor is determined among the motion vector predictor candidates.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: May 21, 2019
    Assignee: MEDIATEK INC.
    Inventors: Min-Hao Chiu, Chia-yun Cheng, Yung-Chang Chang
  • Publication number: 20190123833
    Abstract: A decoding apparatus is used for decoding region of interest (ROI) regions in an image, and includes a storage device, a pre-processing circuit, a decoding circuit, and an information fetching circuit. The pre-processing circuit performs a syntax pre-parsing operation upon a bitstream to obtain necessary information of the ROI regions, and stores the necessary information into the storage device. The decoding circuit performs a decoding operation upon the bitstream to decode the ROI regions, wherein the decoding operation includes syntax parsing of the bitstream. The information fetching circuit reads and analyzes the necessary information, and delivers at least a portion of the necessary information to the decoding circuit. A processing time of obtaining necessary information of one ROI region at the pre-processing circuit overlaps a processing time of decoding another ROI region at the decoding circuit.
    Type: Application
    Filed: October 18, 2018
    Publication date: April 25, 2019
    Inventors: Min-Hao Chiu, Chia-Yun Cheng, Yung-Chang Chang
  • Patent number: 10250912
    Abstract: An apparatus is capable of achieving high-throughput entropy decoding, and includes an arithmetic decoding processing circuitry and a variable-length decoder (VLD). The arithmetic decoding processing circuitry receives a video bitstream through a bitstream input, applies arithmetic decoding to at least a portion of the video bitstream to derive one or more arithmetic-decoded binary strings containing no arithmetic encoded binary string, and stores the arithmetic-decoded binary strings in the storage device. The variable-length decoder is coupled to the arithmetic decoding processing circuitry, the storage device and a VLD output. The variable-length decoder receives at least a portion of arithmetic-decoded bitstream when arithmetic-decoded bitstreams stored in the storage device are complete for a selected image unit, decodes at least a portion of arithmetic-decoded bitstream into one or more decoded syntax elements, and provides the decoded syntax elements through the VLD output.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: April 2, 2019
    Assignee: MEDIATEK INC.
    Inventors: Chia-Yun Cheng, Yung-Chang Chang
  • Patent number: 10244248
    Abstract: A residual processing circuit has a single-path pipeline and a single-path controller. The single-path pipeline has an inverse scan (IS) circuit, an inverse quantization (IQ) circuit and an inverse transform (IT) circuit arranged to process a current non-zero residual data block in a pipeline manner. The current non-zero residual data block is at least a portion of a transform unit. The single-path controller controls pipelined processing of the current non-zero residual data block at the single-path pipeline. The single-path controller instructs the IS circuit to start IS processing of a next non-zero residual data block before the IT circuit finishes a first half of IT processing of the current non-zero residual data block.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: March 26, 2019
    Assignee: MEDIATEK INC.
    Inventors: Min-Hao Chiu, Chia-Yun Cheng, Yung-Chang Chang
  • Patent number: 10230948
    Abstract: A video transmitting system includes a source buffer, a video encoder, a bitstream buffer, and a transmitting circuit. The source buffer receives pixel data of pixels of a video frame. The video encoder retrieve pixel data of a portion of the pixels of the video frame from the source buffer, and starts encoding the pixel data of the portion of the pixels before pixel data of a last pixel of the video frame is received by the source buffer. The bitstream buffer receives a network abstraction layer (NAL) stream from the video encoder, wherein the NAL stream is generated by encoding the pixel data of the portion of the pixels. The transmitting circuit retrieves the NAL stream from the bitstream buffer, and starts outputting the NAL stream before the pixel data of the last pixel of the video frame is encoded by the video encoder.
    Type: Grant
    Filed: February 1, 2017
    Date of Patent: March 12, 2019
    Assignee: MEDIATEK INC.
    Inventors: Chia-Yun Cheng, Han-Liang Chou, Yung-Chang Chang
  • Publication number: 20190075312
    Abstract: A video decoding method is used for decoding a multi-plane video bitstream. The multi-plane video bitstream includes a first video subset bitstream corresponding to a fundamental plane (FP) and at least one second video subset bitstream corresponding to at least one augmented plane (AP). The video decoding method includes decoding the first video subset bitstream, decoding the at least one second video subset bitstream, and performing resampling of one decoded FP frame to generate one resampled frame. Decoding the first video subset bitstream includes performing decoding of a first FP frame to generate a first decoded FP frame. Decoding the at least one second video subset bitstream includes performing decoding of a first AP frame to generate a first decoded AP frame. A processing time of performing decoding of the first FP frame overlaps a processing time of performing resampling of said one decoded FP frame.
    Type: Application
    Filed: September 6, 2018
    Publication date: March 7, 2019
    Inventors: Yung-Chang Chang, Chia-Yun Cheng, Chih-Ming Wang, Meng-Jye Hu, Cheng-Han Li
  • Patent number: 10205957
    Abstract: An apparatus for multi-standard bin decoding in a video decoder for decoding two video coded in two different video coding standards is disclosed. The apparatus includes a first bin decoder to decode one or more first bin strings, a second bin decoder to decode one or more second bin strings, a standard change control module coupled to the first bin decoder and the second bin decoder and a system controller coupled to the standard change control module, the first bin decoder and the second bin decoder. The standard change control module or the system controller selects either a next slice or picture to be decoded by the first bin decoder or the second bin decoder based on one or more control parameters including the decoding time information.
    Type: Grant
    Filed: January 18, 2016
    Date of Patent: February 12, 2019
    Assignee: MEDIATEK INC.
    Inventors: Chia-Yun Cheng, Sheng-Jen Wang, Yung-Chang Chang
  • Publication number: 20190037223
    Abstract: A method and apparatus of scalable video coding using Inter prediction mode for a video coding system are disclosed, where video data being coded comprise BP (Basic Resolution Pass) pictures and UP (Upgrade Resolution Pass) pictures. In one embodiment according to the present invention, the method comprises receiving information associated with input data corresponding to a target block in a target UP picture. When the target block is Inter coded according to a current MV (motion vector) and uses a collocated BP picture as one reference picture, one or more BP MVs (motion vectors) of the collocated BP picture are scaled to generate one or more RCP (resolution change processing) MVs. The current MV of the target block is encoded or decoded using an UP MV predictor derived based on one or more temporal MVPs including said one or more RCP MVs.
    Type: Application
    Filed: July 24, 2018
    Publication date: January 31, 2019
    Inventors: Yung-Chang CHANG, Chia-Yun CHENG, Cheng-Han LI
  • Patent number: 10123028
    Abstract: A syntax parsing apparatus includes a plurality of syntax parsing circuits and a dispatcher. Each of the syntax parsing circuits has at least entropy decoding capability. The syntax parsing circuits generate a plurality of entropy decoding results of a plurality of image regions within a same frame, respectively. The dispatcher assigns bitstream start points of the image regions to the syntax parsing circuits, and triggers the syntax parsing circuits to start entropy decoding, respectively.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: November 6, 2018
    Assignee: MEDIATEK INC.
    Inventors: Ming-Long Wu, Chia-Yun Cheng, Yung-Chang Chang
  • Patent number: 10104397
    Abstract: A video processing apparatus includes a reconstruct circuit, a storage device, and an intra prediction circuit. The reconstruct circuit generates reconstructed pixels of a first block of a picture. The storage device at least stores a portion of the reconstructed pixels of the first block, wherein a capacity of the storage device is smaller than a reconstructed data size of the picture. The intra prediction circuit performs intra prediction of a second block of the picture based at least partly on pixel data obtained from the storage device.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: October 16, 2018
    Assignee: MEDIATEK INC.
    Inventors: Meng-Jye Hu, Yung-Chang Chang, Chia-Yun Cheng
  • Publication number: 20180295380
    Abstract: A method and apparatus for video encoding or decoding used by an AVS2 (Second Generation of Audio Video Coding Standard) video encoder or decoder respectively are disclosed. According to this method, first motion vectors associated with spatial neighboring blocks of a current block are determined. For each spatial neighboring block, a value of 1 is assigned to a first BlockDistance associated with the spatial neighboring block if a corresponding first reference picture is a G picture or GB picture. Motion vector predictor candidates are derived from the first motion vectors by scaling each first motion vector according to a corresponding first BlockDistance and a current BlockDistance. A final motion vector predictor is determined among the motion vector predictor candidates.
    Type: Application
    Filed: December 6, 2017
    Publication date: October 11, 2018
    Inventors: Min-Hao Chiu, Chia-yun Cheng, Yung-Chang Chang
  • Patent number: 10075722
    Abstract: A multi-core video decoder system includes a plurality of video decoder cores and a storage device. The video decoder cores are used to decode a picture, wherein each of the video decoder cores decodes a portion of the picture. The storage device has at least one shared storage space accessed by different video decoder cores of the video decoder cores. In addition, an associated video decoding method includes: performing a plurality of video decoding operations to decode a picture, wherein each of the video decoding operations decodes a portion of the picture; and controlling different video decoding operations of the video decoding operations to access at least one shared storage space.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: September 11, 2018
    Assignee: MEDIATEK INC.
    Inventors: Chia-Yun Cheng, Shun-Hsiang Chuang, Yung-Chang Chang
  • Patent number: 10070070
    Abstract: One exemplary video processing apparatus includes a control circuit and a size selection circuit. The control circuit determines picture boundary information. The size selection circuit refers to at least the picture boundary information to select a size for a block associated with encoding of a picture, wherein selection of the size is constrained by the picture boundary information to ensure that the block with the selected size is not across a picture boundary of the picture.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: September 4, 2018
    Assignee: MEDIATEK INC.
    Inventors: Meng-Jye Hu, Yung-Chang Chang, Chia-Yun Cheng
  • Publication number: 20180152714
    Abstract: Methods of palette coding to reduce the required coding process are disclosed. According to one method, smaller blocks are derived from a large block. The histogram of the large block is derived based on the histograms of smaller blocks in the large block. According to another method, one or more palette tables are derived based on multiple blocks. One palette table is used for each of the multiple blocks. According to yet another method, index map transpose is performed in the parsing stage according to the transpose flag of the index map. Accordingly, a buffer to store the transpose flags can be saved. According to still yet another method, the palette predictor update is performed using an index mapping table to avoid the need for shuffling the contents of the palette predictor stored in a palette buffer.
    Type: Application
    Filed: June 3, 2016
    Publication date: May 31, 2018
    Inventors: Yu-Chen SUN, Tzu-Der CHUANG, Han-Liang CHOU, Chia-Yun Cheng, Ching-Yeh CHEN, Yu-Wen Huang
  • Publication number: 20180152727
    Abstract: In order to overcome the issue caused by a decoded block vector (BV) pointing to a reference block overlapping with an unavailable area, various methods are disclosed. According to one method, if the reference block overlaps with an unavailable area, the reference pixels in the unavailable area are generated for IntraBC prediction of the current block by padding from neighbouring available pixels. The padding can be done in the horizontal direction and then the vertical direction. The padding may also done in the vertical direction first and then horizontal direction. In another method, if the reference block overlaps with an unavailable area, the reference pixels in the unavailable area are generated for IntraBC prediction of the current block by using previous decoded pixels in the unavailable area. A pre-defined value may also be used for the unavailable area.
    Type: Application
    Filed: June 3, 2016
    Publication date: May 31, 2018
    Inventors: Tzu-Der CHUANG, Chia-Yun Cheng, Han-Liang Chou, Ching-Yeh Chen, Yu-Chen Sun, Yu-Wen Huang
  • Publication number: 20180139464
    Abstract: Aspects of the disclosure provide a video decoding system. The video decoding system can include a decoder core configured to selectively decode independently decodable tiles in a picture, each tile including largest coding units (LCUs) each associated with a pair of picture-based (X, Y) coordinates or tile-based (X, Y) coordinates, and memory management circuitry configured to translate one or two coordinates of a current LCU to generate one or two translated coordinates, and to determine a target memory space storing reference data for decoding the current LCU based on the one or two translated coordinates.
    Type: Application
    Filed: November 3, 2017
    Publication date: May 17, 2018
    Applicant: MEDIATEK INC.
    Inventors: Min-Hao CHIU, Ping Chao, Chia-Hung Kao, Huei-Min Lin, Hsiu-Yi Lin, Chi-Hung Chen, Chia-Yun Cheng, Chih-Ming Wang, Yung-Chang Chang